Delivery Specification

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1 Embedded Works Delivery Specification () Model Name: Description: EW-DNXA-92 IEEE802.11n a/b/g PCIe Half mini card Edition # Reason for revision Initial Document Issue date 2008/12/30

2 1. Introduction The EW-DNXA-92 (HB92) is a half mini card solution for IEEE n a/b/g wireless LAN embedded module. With b mode, it provides data rates of 1, 2, 5.5, and 11Mbps (DBPSK for 1Mbps DQPSK for 2Mbps CCK for 5.5&11Mbps), supporting IEEE b network specification for Direct Sequence Spread Spectrum (DSSS) signaling. With a and g mode, it implements half-duplex, orthogonal frequency division multiplexing (OFDM) technology supporting all IEEE a and g data rates (6 to 54Mbps BPSK for 6,9Mbps QPSK for 12,18Mbps 16QAM for 24,36Mbps 64QAM for 48,54Mbps). With n a/g mode, it implements half-duplex OFDM, baseband processing, supporting 130 Mbps and 300 Mbps for 20 MHz and 40 MHz channel operations respectively, sustaining various 11n data rate defined by the specification (possessing BPSK QPSK 16QAM and 64QAM for different data rate). Support spatial multiplexing, cyclic-delay diversity (CDD), and maximal ratio Combining (MRC). 20MHz BW 1 Nss: 65(72.2) Mbps maximal 2 Nss: 130( ) Mbps maximal 40MHz BW 1 Nss: 135(150) Mbps maximal 2 Nss: 270(300) Mbps maximal This module is a good solution for users who need embedded n a/b/g WLAN functionality Scope This document describes the hardware architecture and specification for the EW-DNXA-92 (HB92) Product Features High speed for wireless LAN connection: IEEE802.11b 11Mbps data rate by incorporating Direct Sequence Spread Spectrum (DSSS); IEEE a/g 54Mbps date rate with OFDM and 11Mbps with DSSS, IEEE802.11n 130Mbps/20MHz BW or 300Mbps/40MHz BW data rate with Orthogonal Frequency Division Multiplexing (OFDM). Provide seamless roaming within the IEEE n a/b/g WLAN infrastructure. Provide seamless roaming within the IEEE n a/b/g WLAN infrastructure IEEE n a/b/g compatible: allowing inter-operation among multiple vendors 64-bit, 128-bit, or 152-bit WEP encryption, set by ASCII and Hexadecimal mode Support AES, and TKIP encryption Smart selection function EW-DNXA-92 (HB92) Delivery Specification 1

3 Half mini card interface Site survey function Support MicroSoft Windows XP, 2000, Vista, Linux Interoperability Complying with WiFi Support WPA EW-DNXA-92 (HB92) Delivery Specification 2

4 2. Hardware Architecture 2.1 Hardware Block Diagram The major internal components and external interfaces of EW- DNXA-92 (HB92) are illustrated in Figure MHz XTAL EEPROM 2GHz Rx Chain 0 5GHz Rx Chain 0 5GHz Tx Chain 0 2GHz Tx Chain 0 FEM ANT_CON PCIe-CONNECTOR Merlin 2GHz Rx Chain 1 5GHz Rx Chain 1 5GHz Tx Chain 1 2GHz Tx Chain 1 FEM ANT_CON SW-REG 1.2V 3.3V SUPPLY 3.3V 3.3V Figure 1-1 EW-DNXA-92 (HB92) Major Component and System Interface EW-DNXA-92 (HB92) Delivery Specification 3

5 2.2 Main Chipset Information Item Vender Model # Single-Chip2x2 MIMO MAC/BB/Radio Atheros AR9280 (Merlin) MAC/Baseband/Radio Processor The Atheros AR9280 is a highly integrated single-chip solution for 2.4 and 5 GHz nready wireless local area networks (WLANs) that enables high-performance 2x2 MIMO configurations for wireless station applications demanding robust link quality and maximum throughput and range. The AR9280 integrates a multi-protocol MAC, baseband processor, analog-to-digital and digital-to-analog (ADC/DAC) converters, 2x2 MIMO radio transceiver, and PCI Express interface in an all-cmos device for low power and small form factor applications. The AR9280 implements half-duplex OFDM, CCK, and DSSS baseband processing, supporting up to 130 Mbps for 20 MHz and 300 Mbps for 40 MHz channel operations respectively, and IEEE a/b/g data rates. Additional features include signal detection, automatic gain control, frequency offset estimation, symbol timing, and channel estimation. The AR9280 MAC supports the wireless MAC protocol, i security, receive and transmit filtering, error recovery, and quality of service (QoS). The AR9280 supports two simultaneous traffic streams using up to two integrated transmit chains and receive chains for high throughput and range performance. Transmit chains combine baseband in-phase (I) and quadrature (Q) signals, convert them to the desired frequency, and drive the RF signal to multiple antennas. Receive chains use an integrated architecture that requires no off-chip intermediate frequency (IF) filters. The frequency synthesizer supports one-mhz steps to match frequencies defined by IEEE a/b/g/n specifications. 2.3 Antenna Connector There are two SMT Ultra-miniature coaxial connectors (U.FL-R-SMT) on board to support MIMO functionality. 2.4 LED Function WLAN: Signaling supported Slow-rate blinking Active status of Transmission (Tx/Rx/Stby) Off Radio off 2.5 Pin Definition Pin Number Pin Name Pin I/O Type Description 1 WAKE# Output Open Drain active Low signal. This signal is used to request that the system return from a sleep/suspended state to service EW-DNXA-92 (HB92) Delivery Specification 4

6 a function initiated wake event. Auxiliary Signals (3.3V Compliant) 2 3.3Vaux Power PCIE 3.3 V power supply 3 COEX1 Input/Output 4 GND Ground Return current path 5 COEX2 Input/Output V Power WLAN_Active (GPIO5 of AR9280) To allow for the implementation of wireless coexistence solutions between the radio(s) on the Mini Card and other off-card radio(s). BT_Active (GPIO6 of AR9280) To allow for the implementation of wireless coexistence solutions between the radio(s) on the Mini Card and other off-card radio(s). 1.5V source 7 CLKREQ# Output Reference clock request signal 8 UIM_PWR Output Power source for the UIM. Compliant to the ISO/IEC specification (VCC). 9 GND Ground Return current path 10 UIM_DATA Input/Output 11 REFCLK- Input 12 UIM_CLK Output 13 REFCLK+ Input 14 UIM_RESET Output 15 GND Ground Return current path 16 UIM_VPP Output 17 Reserved* (UIM_C8) UIM data signal. Compliant to the ISO/IEC specification (I/O). PCI Express differential reference clock (100 MHz) UIM clock signal. Compliant to the ISO/IEC specification (CLK). PCI Express differential reference clock (100 MHz) UIM reset signal. Compliant to the ISO/IEC specification (RST). Variable supply voltage (e.g., programming voltage) for class A devices. Refer to ISO/IEC for operating class definitions. This signal is reserved for future use for devices of other classes. Compliant to the ISO/IEC specification (VPP). No use 18 GND Ground Return current path 19 Reserved* (UIM_C4) No use EW-DNXA-92 (HB92) Delivery Specification 5

7 20 W_DISABLE# Input 21 GND Ground Return current path GPIO0 (AR9280) Active low signal. This signal is used by the system to disable radio operation on add-in cards that implement radio frequency applications. When implemented, this signal requires a pull-up resistor on the card. 22 PERST# Input Functional reset to the card 23 PERn0 Output Differential transmit of AR9280 PCI Express x1 data interface: one differential receive pair Vaux Power PCIE 3.3 V power supply 25 PERp0 Output 26 GND Ground Return current path 27 GND Ground Return current path V Power Differential transmit of AR9280 PCI Express data interface: one differential receive pair 1.5V source 29 GND Ground Return current path 30 SMB_CLK Input 31 PETn0 Input 32 SMB_DATA Input/Output 33 PETp0 Input 34 GND Ground Return current path 35 GND Ground Return current path 36 USB_D- Input/Output 37 GND Ground Return current path 38 USB_D+ Input/Output SMBus clock signal compliant to the SMBus 2.0 specification Differential receive of AR9280 PCI Express x1 data interface: one differential transmit pair SMBus data signal compliant to the SMBus 2.0 specification Differential receive of AR9280 PCI Express x1 data interface: one differential transmit pair USB serial data interface compliant to the USB 2.0 specification USB serial data interface compliant to the USB 2.0 specification Vaux Power PCIE 3.3 V power supply 40 GND Ground Return current path Vaux Power PCIE 3.3 V power supply EW-DNXA-92 (HB92) Delivery Specification 6

8 42 LED_WWAN# Output 43 GND Ground Return current path 44 LED_WLAN# Output 45 Reserved No use 46 LED_WPAN# Output 47 Reserved No use V Power Open drain, active low signals. These signals are used to allow the PCI Express Mini Card add-in card to provide status indicators via LED devices that will be provided by the system. GPIO1 (AR9280) Open drain, active low signals. These signals are used to allow the PCI Express Mini Card add-in card to provide status indicators via LED devices that will be provided by the system. Open drain, active low signals. These signals are used to allow the PCI Express Mini Card add-in card to provide status indicators via LED devices that will be provided by the system. 1.5V source 49 Reserved No use 50 GND Ground Return current path 51 Reserved No use Vaux Power PCIE 3.3 V power supply EW-DNXA-92 (HB92) Delivery Specification 7

9 3. Software Specification General Function Operation System Support Windows2000, XP, Vista, Linux Network Access Mode IEEE n a/b/g Infrastructure Mode Site Survey Support Access Points and IEEE n a/b/g Networks Scanning Capability Information List Selected Profile Information, Link Information and TCP/IP Information Profile Configuration Name Network Name (SSID) This is the name of the IEEE n a/b/g wireless network Network Connection Define if the STA is configured for infrastructure network Power Saving Allow the power management options: Off, Normal, and Maximum Wireless Mode Specify n a/g mode, a mode, b mode, g mode, or Auto-Select operation n Support For 300Mbps mode at 2.4/5GHz g/a Support For 54Mbps mode at 2.4/5GHz QoS Cooperate in a network using Quality of Service Country Code Selector Change Regulatory Domains Security Setting Encryption Type Unique Key Shared Keys Shared Key Length WEP, AES, and TKIP Define the unique encryption key for security for the current network configuration Define a set of shared encryption keys Full rate 40-bit, 104-bit, and 128-bit WEP encryption and decryption. Full rate 128-bit AES encryption and decryption Feature Smart Select --- Automatically scanning available either n, a, b, or g Access Point and switching connection by desire Automatically fall back data rate if signal strength become weakness Seamless roaming cross n, a, b, and g Access Point covered distance Future support d(Regulatory Domain), e(Quality of Service), and h(TPC/DFS) by software upgraded Automatic data rate and channel selection Vivid and user-friendly configuration tool n --- High speed data rate, up to 300Mbps Wi-Fi / WPA compliant Support 802.1x authentication, WPA Support WEP-64, WEP-128, WEP-152 and 128bit AES, and TKIP encryption EW-DNXA-92 (HB92) Delivery Specification 8

10 E 4. Appearance Top View Signature Label EW-DNXA-92 (HB92) Delivery Specification 9

11 4.1.2 PCBA Front side Back side Side View EW-DNXA-92 (HB92) Delivery Specification 10

12 EW-DNXA-92 (HB92) Delivery Specification 11

13 6. Specifications 6.1 Wireless LAN Form Factor: Half mini card Frequency band: B Mode: 2.400~ GHz G Mode: 2.400~ GHz A mode: 5.150GHz 5.250GHz 5.250GHz 5.350GHz 5.470GHz 5.725GHz 5.725GHz 5.850GHz Channel Spacing: N Mode: 5MHz (Bandwidth 20 or 40MHz) A Mode: 5MHz B Mode: 5MHz G Mode: 5MHz Modulation: N Mode: OFDM with BPSK, QPSK, 16-QAM, and 64-QAM (Compliant with IEEE n) A Mode: OFDM with BPSK, QPSK, 16-QAM, and 64-QAM (Compliant with IEEE a) B Mode: DSSS with DBPSK, DQPSK, and CCK (Compliant with IEEE b) G Mode: OFDM with BPSK, QPSK, 16-QAM, and 64-QAM DSSS with DBPSK, DQPSK, and CCK (Compliant with IEEE g) Host interface: PCI Express Mini Card Electromechanical Specification Revision 1.2 Channels Support: B Mode: 2.412~2.472 GHz (1CH~13CH) G Mode: 2.412~2.472 GHz (1CH~13CH) A Mode: 5.170GHz 5.,240GHz (34/36/38/40/42/44//46/48CH) 5.260GHz 5.320GHz (52/56/60/64CH) 5.500GHz 5.700GHz (100/104/108/112/116/120/124/128/132/136/140CH) EW-DNXA-92 (HB92) Delivery Specification 14

14 5.745GHz 5.825GHz (149/153/157/161/165CH) Supply Voltage: 3.3V±9% DC 6.2 Environmental Spec. Operating Temperature Range: 0degree C~60degree C Storage Temperature Range: -20degree C~80degree C Operating Humidity Range: 5%~90% 6.3 Specification Item Main chipset TX/RX Frequency range Modulation technique Key specifications Atheros AR9280 (Merlin) 2T2R USA: ~ 2.483GHz, 5.15 ~ 5.35GHz, 5.47 ~ 5.725GHz, ~ 5.85GHz Europe: ~ 2.483GHz, 5.15 ~ 5.35GHz, 5.47 ~ 5.725GHz Japan: ~ 2.497GHz, 4.90 ~ 5.091GHz, 5.15 ~ 5.35GHz, 5.47 ~ 5.725GHz China: ~ 2.483GHz, ~5.85GHz Legacy a/b/g DSSS (DBPSK, DQPSK, CCK) OFDM (BPSK, QPSK, 16-QAM, 64-QAM) DSSS (Direct Sequence Spread Spectrum) with DBPSK (Differential Binary Phase Shift Keying 1Mbps), DQPSK (Differential Quaternary Phase Shift Keying 2Mbps), and CCK (Complementary Code Keying 5.5&11Mbps), and OFDM (Orthogonal Frequency Division Multiplexing with BPSK for 6,9Mbps QPSK for 12,18Mbps 16QAM for 24,36Mbps 64QAM for 48,54Mbps) n a/g OFDM (BPSK, QPSK, 16-QAM, 64-QAM) Host interface PCI Express Mini Card Electromechanical Specification Revision 1.2 Channel spacing Channels support Operation voltage Power consumption 5MHz n b/g US/Canada: 11 (1 ~ 11) Major European country: 13 (1 ~ 13) France: 4 (10 ~ 13) Japan: 11b: 14 (1~13 or 14 th ), 11g: 13 (1 ~ 13) China: 13 (1 ~ 13) n a 1). US/Canada: 12 non-overlapping channels (36,40,44,48,52,56,60,64; 100,104,108,112,116,120,124,128,132,136,140; 149,153,157,161,165) 2). Europe: 19 non-overlapping channel (36,40,44,48,52,56,60,64; 100,104,108,112,116,120,124,128,132,136,140) 3). Japan: 19 non-overlapping channels (184,188,192,196,8,12,16; 36,40,44,48,52,56,60,64; 100,104,108,112,116,120,124,128,132,136,140) 4). China: 5 non-overlapping channels (149,153,157,161,165) 3.3V +/- 9% a b g n(2.4GHz) n(5GHz) (ma) Avg/Max Avg/Max Avg/Max Avg/Max Avg/Max EW-DNXA-92 (HB92) Delivery Specification 15

15 @25 o C Continue Tx 715/ / / / /931 FTP Tx 482/ / / / /837 FTP Rx 304/ / / / /821 Standby 260/ / / / /354 ***The maximum current consumption would be impacted by radiation environment and the driver mechanism. Target power tolerance 2.4GHz +2/-2dB 5.18GHz~5.32GHz +2/-2dB 5.5GHz~5.825GHz +2.5/-3dB a Test Frequencies 6-24_Target 36_Target 48_Target 54_Target b Test Frequencies 1/2_Target 5.5_Target 11_Target g Test Frequencies 6-24_Target 36_Target 48_Target 54_Target Output power n Freq. Range: Test Freq MCS 0/8 MCS 1/9 MCS 2/10 MCS 3/11 MCS 4/12 MCS 5/13 MCS 6/14 MCS 7/ Freq. Range: Test Freq MCS 0/8 MCS 1/9 MCS 2/10 MCS 3/11 MCS 4/12 MCS 5/13 MCS 6/14 MCS 7/ Freq. Range: Test Freq MCS 0/8 MCS 1/9 MCS 2/10 MCS 3/11 MCS 4/12 MCS 5/13 MCS 6/14 MCS 7/ EW-DNXA-92 (HB92) Delivery Specification 16

16 Freq. Range: Test Freq MCS 0/8 MCS 1/9 MCS 2/10 MCS 3/11 MCS 4/12 MCS 5/13 MCS 6/14 MCS 7/ The transmit modulation accuracy is measured using error vector magnitude (EVM). EVM is the magnitude of the phase difference as a function of time between an ideal reference signal and the measured transmitted signal. EVM a Modulation Code Rate Relative constellation error (db) Relative constellation error (db) IEEE Spec (1Tx db) Typical/Maximum (2Tx db) BPSK 1/ /-12 BPSK 3/ /-13 QPSK 1/ /-15 QPSK 3/ / QAM 1/ / QAM 3/ / QAM 2/ / QAM 3/ / b Modulation Code Rate Relative constellation error (db) Relative constellation error (db) IEEE Spec (1Tx db) Typical/Maximum (2Tx db) DBPSK /-12 DQPSK /-12 CCK / g Modulation Code Rate Relative constellation error (db) Relative constellation error (db) IEEE Spec (1Tx db) Typical/Maximum (2Tx db) BPSK 1/ /-12 BPSK 3/ /-15 QPSK 1/ /-15 QPSK 3/ /-15 EW-DNXA-92 (HB92) Delivery Specification 17

17 16-QAM 1/ / QAM 3/ / QAM 2/ / QAM 3/ / ng Modulation Code Rate Relative constellation error (db) Relative constellation error (db) IEEE Spec (1Tx db) Typical/Maximum (2Tx db) HT20 (MCS0) BPSK 1/ /-15 (MCS1) QPSK 1/ /-15 (MCS2) QPSK 3/ /-15 (MCS3) 16-QAM 1/ /-15 (MCS4) 16-QAM 3/ /-19 (MCS5) 64-QAM 2/ /-22 (MCS6) 64-QAM 3/ /-25 (MCS7) 64-QAM 5/ /-28 (MCS8) BPSK 1/ /-15 (MCS9) QPSK 1/ /-15 (MCS10) QPSK 3/ (MCS11) 16-QAM 1/ (MCS12) 16-QAM 3/ /-19 (MCS13) 64-QAM 2/ /-22 (MCS14) 64-QAM 3/ /-25 (MCS15) 64-QAM 5/ /-28 HT40 (MCS0) BPSK 1/ /-12 (MCS1) QPSK 1/ /-12 (MCS2) QPSK 3/ /-15 (MCS3) 16-QAM 1/ /-16 (MCS4) 16-QAM 3/ /-19 (MCS5) 64-QAM 2/ /-22 (MCS6) 64-QAM 3/ /-25 (MCS7) 64-QAM 5/ /-28 (MCS8) BPSK 1/ /-12 (MCS9) QPSK 1/ /-12 (MCS10) QPSK 3/ /-15 (MCS11) 16-QAM 1/ /-16 (MCS12) 16-QAM 3/ /-19 (MCS13) 64-QAM 2/ /-22 (MCS14) 64-QAM 3/ /-25 (MCS15) 64-QAM 5/ / na Modulation Code Rate Relative constellation error (db) Relative constellation error (db) IEEE Spec (1Tx db) Typical/Maximum (2Tx db) HT20 (MCS0) BPSK 1/ /-10 (MCS1) QPSK 1/ /-10 (MCS2) QPSK 3/ /-13 (MCS3) 16-QAM 1/ /-16 (MCS4) 16-QAM 3/ /-19 (MCS5) 64-QAM 2/ /-20 (MCS6) 64-QAM 3/ /-23 (MCS7) 64-QAM 5/ /-25 (MCS8) BPSK 1/ /-10 EW-DNXA-92 (HB92) Delivery Specification 18

18 (MCS9) QPSK 1/ /-10 (MCS10) QPSK 3/ /-13 (MCS11) 16-QAM 1/ /-16 (MCS12) 16-QAM 3/ /-19 (MCS13) 64-QAM 2/ (MCS14) 64-QAM 3/ /-22 (MCS15) 64-QAM 5/ /-23 HT40 (MCS0) BPSK 1/ /-10 (MCS1) QPSK 1/ /-10 (MCS2) QPSK 3/ /-13 (MCS3) 16-QAM 1/ /-16 (MCS4) 16-QAM 3/ /-19 (MCS5) 64-QAM 2/ /-20 (MCS6) 64-QAM 3/ /-24 (MCS7) 64-QAM 5/ /-25 (MCS8) BPSK 1/ /-10 (MCS9) QPSK 1/ /-10 (MCS10) QPSK 3/ /-13 (MCS11) 16-QAM 1/ /-16 (MCS12) 16-QAM 3/ /-19 (MCS13) 64-QAM 2/ (MCS14) 64-QAM 3/ /-21 (MCS15) 64-QAM 5/ /-23 Note: Some EVM specification on 11na HT mode of Atheros HB92 half mini card solution will not reach the minimum requirements of IEEE standard so far and had already been known a Modulation Code Rate IEEE Spec (1Rx dbm) Typical/Maximum (2Rx dbm) BPSK 1/ /-85 BPSK 3/ /-84 QPSK 1/ /-82 QPSK 3/ / QAM 1/ / QAM 3/ / QAM 2/ / QAM 3/ /-68 Sensitivity b Modulation IEEE Spec (1Rx dbm) Typical/Maximum (2Rx dbm) DBPSK not specified -93/-85 DQPSK not specified -93/-85 CCK not specified -91/ g Modulation Code Rate IEEE Spec (1Rx dbm) Typical/Maximum (2Rx dbm) BPSK 1/ /-85 BPSK 3/ /-84 QPSK 1/ /-82 QPSK 3/ / QAM 1/ / QAM 3/ / QAM 2/ / QAM 3/ / ng EW-DNXA-92 (HB92) Delivery Specification 19

19 Modulation Code Rate IEEE Spec (1Rx dbm) Typical/Maximum (2Rx dbm) HT20 (MCS0) BPSK 1/ /-85 (MCS1) QPSK 1/ /-82 (MCS2) QPSK 3/ /-80 (MCS3) 16-QAM 1/ /-77 (MCS4) 16-QAM 3/ /-73 (MCS5) 64-QAM 2/ /-69 (MCS6) 64-QAM 3/ /-68 (MCS7) 64-QAM 5/ /-67 HT40 (MCS0) BPSK 1/ /-82 (MCS1) QPSK 1/ /-79 (MCS2) QPSK 3/ /-77 (MCS3) 16-QAM 1/ /-74 (MCS4) 16-QAM 3/ /-70 (MCS5) 64-QAM 2/ /-66 (MCS6) 64-QAM 3/ /-65 (MCS7) 64-QAM 5/ / na Modulation Code Rate IEEE Spec (1Rx dbm) Typical/Maximum (2Rx dbm) HT20 (MCS0) BPSK 1/ /-85 (MCS1) QPSK 1/ /-82 (MCS2) QPSK 3/ /-80 (MCS3) 16-QAM 1/ /-77 (MCS4) 16-QAM 3/ /-73 (MCS5) 64-QAM 2/ /-69 (MCS6) 64-QAM 3/ /-68 (MCS7) 64-QAM 5/ /-67 HT40 (MCS0) BPSK 1/ /-82 (MCS1) QPSK 1/ /-79 (MCS2) QPSK 3/ /-77 (MCS3) 16-QAM 1/ /-74 (MCS4) 16-QAM 3/ /-70 (MCS5) 64-QAM 2/ /-66 (MCS6) 64-QAM 3/ /-65 (MCS7) 64-QAM 5/ /-64 Operation distance a Outdoor: Indoor: b Outdoor: Indoor: g Outdoor: Indoor: n Outdoor: 250 (MCS0: 1 Nss/20MHz BW) 30 (MCS15: 2 Nss/20MHz BW) EW-DNXA-92 (HB92) Delivery Specification 20

20 Transmit spectrum mask Transmit spectrum flatness Transmit center frequency tolerance Carrier suppression Transmit power on ramp and power down ramp time Receiver maximum input level 30 (MCS15: 2 Nss/40MHz BW) Indoor: 100 (MCS0: 1 Nss/20MHz BW) 20 (MCS15: 2 Nss/20MHz BW) 20 (MCS15: 2 Nss/40MHz BW) For transmitted spectral mask for 11a shall be less than 40dBr for fc 30MHz<f<fc+30MHz. For transmitted spectral mask for 11b shall be less than 50dBr for fc 22MHz<f<fc+22MHz. For transmitted spectral mask for 11g shall be less than 40dBr for fc 30MHz<f<fc+30MHz. For transmitted spectral mask for 11n 20MHz shall be less than 45dBr for fc 30MHz<f<fc+30MHz. For transmitted spectral mask for 11n 40MHz shall be less than 45dBr for fc 60MHz<f<fc+60MHz. For a/g the average energy of the constellations in each of spectral lines and will deviate no more than +/- 2dB from their average energy. For n 40MHz mode, the average energy of the constellations in each of spectral lines and will deviate no more than +/- 2dB from their average energy. The transmitted spectral flatness should be with in +2/- 4dB. The transmitted center frequency tolerance shall be ±20 ppm maximum a: The leakage of the center frequency component shall not exceed -15 db relative to overall transmitted power or, equivalently, +2 db relative to the average energy of the rest of the sub-carriers b: The RF carrier suppression, measured at the channel center frequency, shall be at least 15 db below the peak SIN(x)/x power spectrum g: The leakage of the center frequency component shall not exceed -15 db relative to overall transmitted power or, equivalently, +2 db relative to the average energy of the rest of the sub-carriers n: For all 20 MHz modes of transmission The leakage of the center frequency component shall not exceed -15 db relative to overall transmitted power or, equivalently, +2 db relative to the average energy of the rest of the sub-carriers. For all 40 MHz modes of transmission The center frequency leakage shall not exceed -18 db relative to overall transmitted power, or, equivalently, +2 db relative to the average energy of the rest of the sub-carriers. Delta > 15dB for a, b, g & 11n 20MHz Delta > 18dB for 11n 40MHz The transmitting power-on ramp for 10% to 90% of maximum power m shall be no greater than 2 µs. The transmitting power-down ramp for 90% to 10% of maximum power shall be no greater than 2 µs a Modulation Code Rate IEEE Spec (1Rx dbm) > b Modulation IEEE Spec (1Rx dbm) DBPSK >-10 DQPSK >-10 CCK >-10 EW-DNXA-92 (HB92) Delivery Specification 21

21 802.11g Modulation Code Rate IEEE Spec (1Rx dbm) > na Modulation Code Rate IEEE Spec (1Rx dbm) >-30 Operation system supported PCB dimension Security Operation mode Transfer data rate Operation temperature Storage temperature Wi-Fi alliance WHQL EMC certificate Media access protocol LED signaling Antenna ng Modulation Code Rate IEEE Spec (1Rx dbm) >-20 Windows 2K, XP, Vista /-0.15mm x /-0.15mm x 1.0+/-0.1mm 6L FR4 64-bit, 128-bit, 152-bit WEP Encryption 802.1x Authentication AES-CCM & TKIP Encryption Infrastructure & Ad-hoc mode (TBD) a: 6, 9, 12, 18, 24, 36, 48, 54Mbps b: 1, 2, 5.5, 11Mbps g: 6, 9, 12, 18, 24, 36, 48, 54Mbps 20MHz BW 1 Nss: 65(72.2) Mbps maximal 2 Nss: 130( ) Mbps maximal 40MHz BW 1 Nss: 135(150) Mbps maximal 2 Nss: 270(300) Mbps maximal 0 o ~ 60 o C -20 o ~ 80 o C WECA Compliant Microsoft 2K, XP, Vista Compliant FCC part 15 (USA) IC RSS210 (Canada) TELEC (Japan) ETSI, EN301893, EN60950 (Europe) VCCI CLASS B CSMA/CA with ACK architecture 32-bit MAC WLAN: Signaling supported Slow-rate blinking Active status of Transmission (Tx/Rx/Stby) Off Radio off 2 x SMT Ultra-miniature coaxial connectors (U.FL-R-SMT) EW-DNXA-92 (HB92) Delivery Specification 22

22 7. EQT test information No Test Item Sample Q'ty Test Duration Sample ID Before(ng1) End(ng1) Deviation Tx Rx Tx Rx ((E-B)/B)*100% Check 32F % -2.1% PASS 1 Storage / High 80,90%H 4 10/3~6 3B % -1.6% PASS % -1.7% PASS % -1.8% PASS 32F % -2.2% PASS 2 Storage / Low /30~10/3 3B % -1.7% PASS % -1.6% PASS % -1.6% PASS % 0.1% PASS 3 Operation / High 70,90%H 4 10/14~ % 0.0% PASS 44D % -1.6% PASS % -0.6% PASS % -3.3% PASS 4 Operation / Low /18~ % -0.7% PASS % 0.0% PASS 42F % 0.7% PASS 5 Cold boot test / /16 42C % -0.1% PASS % -1.1% PASS 32F % -1.9% PASS 6 Thermal Shock -20~70 4 9/27~29 3B % -1.2% PASS % -1.8% PASS % -1.1% PASS 7 Drop Test 30cm 2 10/7 32F % -3.0% PASS 3B % -4.8% PASS 8 Single Vibration 1G 2 10/22 44D % -2.4% PASS % -0.1% PASS No Test Item Sample Q'ty Test Duration Sample ID Before(nA36) End(nA36) Deviation Tx Rx Tx Rx ((E-B)/B)*100% Check 32F % -1.5% PASS 1 Storage / High 80,90%H 4 10/3~6 3B % -2.4% PASS % -1.0% PASS % -1.4% PASS 2 Storage / Low 4 9/30~10/3 32F % -1.7% PASS EW-DNXA-92 (HB92) Delivery Specification 23

23 -20 3B % -2.5% PASS % -0.9% PASS % -1.9% PASS % -3.7% PASS 3 Operation / High 70,90%H 4 10/14~ % 0.2% PASS 44D % -0.4% PASS % -0.2% PASS Operation / Low Cold boot test / Thermal Shock -20~70 Drop Test 30cm Single Vibration 1G % 0.0% PASS % -2.6% 10/18~21 PASS % 0.0% PASS 42F % 1.0% PASS 4 42C % -0.3% 10/16 PASS % -0.1% PASS 32F % -0.8% PASS 4 9/27~29 3B % -1.6% PASS % -0.3% PASS % -1.0% PASS 2 10/7 32F % -2.2% PASS 3B % -3.0% PASS 2 10/22 44D % -0.6% PASS EW-DNXA-92 (HB92) Delivery Specification 24

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