MLX90255-BC Linear Optical Array

Transcription

1 Features and Benefits Applications 128 x 1 Sensor-Element Organization (1 Not Connected, 1 dummy, 128 real, 1 dummy and 1 ark ) 385 ots-per-inch (PI) Sensor Pitch High Linearity and Uniformity for 256 Gray-Scale (8-Bit) Applications High Sensitivity: 0.7ms integration time for open cavity devices 0.7ms integration time for glass lid devices Special Gain Compensation for use with single LE light source Output Referenced to Ground Low Image Lag Single 5V Supply Replacement for TAOS, Inc. TSL1301 & TSL1401 and MLX90255BA Operation to 800kHz Linear Position Encoder Rotary Position Encoder Steering Torque and Angle Sensing (EPAS, ESP) Spectrometer Applications Bio-metrical Applications OCR and Barcode Applications Ordering Code Product Code Temperature Code Package Code Option Code Packing Form Code MLX90255 K WB BCM-000 TR MLX90255 K XA BCR-000 RE MLX90255 K XA BCR-000 TU Legend: Temperature Code: K for Temperature Range -40 C to 125 C Package Code: WB for GLP5, XA for SOIC24 Option Code: AAA-xxx: ie version xxx-000: Standard version Packing Form: RE for Reel TR for Tray Ordering example: MLX90255KWB-BCM-000-TR Page 1 of 13

2 1. Functional iagram CLK 1 Integrator Reset Sample Switching Logic Hold Q1 Q Bit Shift Register SI Q132 V 5 GN 4 3 Analog OUT External Load 2. escription The MLX90255BC linear sensor array consists of a 128 x 1 array of photodiodes, associated charge amplifier circuitry and a pixel data-hold function that provides simultaneous-integration start and stop times for all pixels. The pixels measure 200µm (H) by 66 µm (W). Operation is simplified by internal control logic that requires only a serial-input (SI) signal and a clock. The sensor consists of 128 photodiodes arranged in a linear array. Light energy falling on a photodiode generates photocurrent, which is integrated by the active integration circuitry associated with that pixel. uring the integration period, a sampling capacitor connects to the output of the integrator through an analog switch. The amount of charge accumulated at each pixel is directly proportional to the light intensity and the integration time. The output and reset of the integrators is controlled by a 132-bit shift register and reset logic. An output cycle is initiated by clocking in a logic 1 on SI. (Continued on page 6) Page 2 of 13

3 TABLE OF CONTENTS FEATURES AN BENEFITS... 1 APPLICATIONS... 1 ORERING INFORMATION FUNCTIONAL IAGRAM ESCRIPTION MLX90255BC ELECTRICAL SPECIFICATIONS GENERAL ESCRIPTION ABSOLUTE MAXIMUM RATINGS COSINE CORRECTION PERFORMANCE GRAPHS STANAR INFORMATION REGARING MANUFACTURABILITY OF MELEXIS PROUCTS WITH IFFERENT SOLERING PROCESSES ES PRECAUTIONS PACKAGE INFORMATION MLX90255KXA-BCR (SOIC-24 WITHOUT GLASS) PACKAGE IMENSIONS XA (SOIC-24 WITHOUT GLASS) PIN ESCRIPTION MLX90255KWB-BCM (GLP-5 WITH GLASS) PACKAGE IMENSIONS WB (GLP-5 WITH GLASS) PIN ESCRIPTION ISCLAIMER ISCLAIMER Page 3 of 13

4 3. MLX90255BC Electrical Specifications o o C Operating Parameters T A = -40 C to 125 C, V = 4.5V to 5.5V (unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Units Supply voltage Vdd V Input voltage Vi Vdd V High-level input voltage Vih 7. Vdd* Vdd V Low-level input voltage Vil Vdd*0.3 V Hysteresis on SI and CLK V Wavelength of light source nm Clock frequency Fclock khz Sensor integration time below 60 C (1) Sensor integration time (full temperature range) (2) charge transfer time (full temp range) Tint ms Tint ms Tqt µs Setup time, serial input Tsu(SI) ns Hold time, serial input (3) Th(SI) ns Operating free-air temperature Ta C Clock pulse duration (high) Tw(H) ns Clock pulse duration (low) Tw(L) ns Notes: (1) Reset until clock pulse 18 (on declining flank). Minimum integration time = (133-18) * CLK period + 10µs (this is the time the S&H cap needs to follow). At 1MHz clock speed, the minimum integration time becomes 0.125ms. (2) At 125 C, the integration time should be limited to 2ms. (3) The SI pulse must go low before the rising edge of the next clock pulse. Page 4 of 13

5 MLX90255BC Electrical specifications All tests are made with 0.7ms integration time at 25 C at 880nm and with a clock speed of 500kHz in, 250kHz out, and 500kHz, unless otherwise specified in the Test Conditions. 100% light under Test Conditions means that the light is set in such a way that there is 2.4V at the output of the chip. Parameter Symbol Test Conditions Min Typ Max Units Sensitivity for devices with glas lid Sensitivity At 25 C V/µW/ Sensitvity for open devices cm2 Polyimide Wafer Illumination (1) Illum100 At 25 C, 2.4V at output µw/cm² Average analog output (1) VaoLight At 25 C, 100% light 2.4 V Average analog output Initial offset At 25 C, 0% light V Average analog output Vaoark At 125 C, 0% light V Highest ark Vaodarkmax At 125 C, 0.25ms integration time 0.8 V Non Linearity Nlao1 All Temp ±0.5% ±1.2% FS Response Non Uniformity (2) PRNU All Temp, 100% light ±4.0% ±8.5% FS Interaction Test (3) PIT AT 25 C 5% 32. FS Noise Level (4) Vn All Temp 3 6 mv (RMS) Hold spec, same as PRNU PRNUH All Temp, 100% light, 62.5kHz ±4.0% ±8.5% FS Output Settling Time Ts All Temp ns Array Lag (5) Alag At 25 C 0.5% 33. FS ark Signal Non Uniformity (6) SNU At 25 C mv At 125 C mv Analog Output Saturation All Temp 3.0 V Change in sensitivity with %/ C Temperature at 880nm (7) Operating Free Temp C Supply Current (8) Idd ma (1) After power on, the first integration scan is not guaranteed correct. This scan is needed for initializing digital levels on chip. After a SI and 133 proper CLK signals, the system is fully initialized and all further scans are valid. The next SI will provide a valid scan. (2) Absolute Light measurements are very test-setup dependent and should be regarded with caution. Relative measurements are possible with ±1% accuracy. (3) PRNU is defined as the worst case deviation of any Value (pixel 3 till 130) to the average light value. Value = (Vout of a pixel at 100% light Vout of same pixel at 0% light) The MLX90255BC has a cosine shaped gain: external pixels have 15% more gain than middle pixels. (4) PIT = (Vout of pixel 10µW Vout of pixel / (5) Noise: We compare 5 different measurements, normalize them and then take the RMS value. (6) Array Lag is defined as: (Vaverage 0µW1 Vaverage 0µW2) / ((Vaverage 10µW Vaverage 0µW2). Where 0µW1 is a 0% light level, 1ms after a 100% light level. (there can still be some light effects). 0µW2 is a 0% light level, 10ms after a 100% light level, which should be a true dark reference. (7) SNU is defined as: (max Vout of pixel 0% light) - (min Vout of pixel 0% light) for pixels 3 thru 130 (8) Sensitivity always increases with rising temperature. (9) Idd is measured with Rload disconnected from the output pin. Page 5 of 13

6 4 General escription (continued from page 2) This causes all 132 sampling capacitors to be disconnected from their respective integrators and starts an integrator reset period. As the SI pulse is clocked through the shift register, the charge stored on the sampling capacitors is sequentially connected to a charge-coupled output amplifier that generates a voltage on the analog output AO. Two dummy pixel values are shifted out first, then the 128 actual pixel bits, followed by two additional dummy pixel bits, for a total of 132 data bits. Although there are only 132 pixels, 133 clock pulses are necessary for a complete shift out. The final pulse is used to re-initialize the shift register. The integrator reset period ends 18 clock cycles after the SI pulse is clocked in. So the light-integration starts after the 18 th CLK pulse. The light-integration ends at the next SI pulse. Between the end of the 133 rd clock pulse and the next SI pulse, a minimum time of 10µs is necessary for an effective S&H function. So the minimum integration time of the MLX90255BC is (133-18) * Ts + 10µs and thus dependent on clock speed. (Ts = clock period) After the 132 data bits are clocked out, the output becomes high impedance. (see figure) The AO is driven by a source follower that requires an external pulldown resistor. (typically 330 ) The output is nominally 125mV for no light input and 2.4V for a nominal full-scale output. The pixel gain is 15% bigger at the edges than in the middle (cosine correction) in order to get a flat output when illuminating the device with a single LE light source (see also Section 6). The MLX90255BC is intended for use in a wide variety of applications, including: image scanning, mark and code reading, optical character recognition (OCR) and contact imaging, edge detection and positioning, and optical linear and rotary encoding. The MLX90255BC is a replacement for the Texas Instruments' TSL1301 and TSL1401 parts. 5 Absolute Maximum Ratings Supply Voltage, Vdd +7V igital Input Current Range Operating Free-Air temperature range, Ta Storage temperature range, Tstg ES Sensitivity (Human Body Model according to CF-AEC- Q ) -20 to 20 ma -40 C to 125 C (automotive compliant optical package) -40 C to 125 C 2kV Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions Page 6 of 13

7 beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum -rated conditions for extended periods may affect device reliability. 6 Cosine Correction When using a single LE light source, which is placed above the middle of the die, the light intensity that falls onto the outer pixels is lower than the light intensity that falls onto the middle pixels (due to the distance die-le, the shape of the LE light emission and the sensitivity of pixels vs. angle of incident light). To compensate for these effects, each pixel in the array has a slightly different gain correction with respect to the centre of the array. For a light source to photodiode array distance of 15mm the relative pixels sensitivities are shown in the table below. number Relative Sensitivity number Relative Sensitivity number Relative Sensitivity number Relative Sensitivity Page 7 of 13

8 7 Performance Graphs T y pical Photodiode S p ectral Response Curve (%), w ithout Ant i R eflection C oating* *There is also an option for an Anti Reflection Coating. This will remove the interference ripples in the figure above. Wi th this special Anti Reflection Coating, the sensi tivity curve in function of wavelength will be somewhat lowe r (typically 4%) but will no longe r display interference ri pples. Page 8 of 13

9 8 Standard information regarding manufacturability of Melexis products with different soldering processes Our products are classified and qualified regarding soldering technology, solderability and moisture sensitivity level according to following test methods: Reflow Soldering SM s (Surface Mount evices) IPC/JEEC J-ST-020 Moisture/Reflow Sensitivity Classification for Nonhermetic Solid State Surface Mount evices (classification reflow profiles according to table 5-2) EIA/JEEC JES22-A113 Preconditioning of Nonhermetic Surface Mount evices Prior to Reliability Testing (reflow profiles according to table 2) Wave Soldering SM s (Surface Mount evices) and TH s (Through Hole evices) EN Resistance of plastic- encapsulated SM s to combined effect of moisture and soldering heat EIA/JEEC JES22-B106 and EN Resistance to soldering temperature for through-hole mounted devices Iron Soldering TH s (Through Hole evices) EN Resistance to soldering temperature for through-hole mounted devices Solderability SM s (Surface Mount evices) and TH s (Through Hole evices) EIA/JEEC JES22-B102 and EN Solderability For all soldering technologies deviating from above mentioned standard conditions (regarding peak temperature, temperature gradient, temperature profile etc) additional classification and qualification tests have to be agreed upon with Melexis. The application of Wave Soldering for SM s is allowed only after consulting Melexis regarding assurance of adhesive strength between device and board. Melexis recommends reviewing on our web site the General Guidelines soldering recommendation ( as well as trim&form recommendations ( Melexis is contributing to global environmental conservation by promoting lead free solutions. For more information on qualifications of RoHS compliant products (RoHS = European directive on the Restriction Of the use of certain Hazardous Substances) please visit the quality page on our website: 9 ES Precautions Electronic semiconductor products are sensitive to Electro Static ischarge (ES). Always observe Electro Static ischarge control procedures whenever handling semiconductor products. Page 9 of 13

10 10 Package Information a. MLX90255KXA-BCR (SOIC-24 without glass) package dimensions Page 10 of 13

11 b. XA (SOIC-24 without glass) Pin escription Pin Sym bol escription 5 SI Serial Input. Si defines the start of the data-out sequence 6 CLK Clock. CLK controls the charge transfer, pixel output and reset (together with SI) 7 A0 Analog Output 8 Vdd Supply voltage, for both analog and digital circuits 3,4,9,10, 15,16,21,22 Vss Ground (substrate). All Vss Pins are referenced to the substrate. c. MLX90255KWB-BCM (GLP-5 with glass) package dimensions Page 11 of 13

12 Pin d. WB (GLP-5 with glass) Pin escription Symb ol escription 1 SI Serial Input. Si defines the start of the data-out sequence 2 CLK Clock. CLK controls the charge transfer, pixel output and reset (together with SI) 3 A0 Analog Output 4 Vdd Supply voltage, for both analog and digital circuits 5 Vss Ground (substrate). All Vss Pins are referenced to the substrate. 11 isclaimer evices sold by Melexis are covered by the warranty and patent indemnification provisions appearing in its Term of Sale. Melexis makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. Melexis reserves the right to change specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with Melexis for current information. This product is intended for use in normal commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, Page 12 of 13

13 medical life-support or life-sustaining equipment are specifically not recommended without additional processing by Melexis for each application. The information furnished by Melexis is believed to be correct and accurate. However, Melexis shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interrupt of business or indirect, special incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of Melexis rendering of technical or other services Melexis NV. All rights reserved. For the latest version of this document, go to our website at Or for additional information contact Melexis irect: Europe, Africa, Asia: America: Phone: Phone: ISO/TS and ISO14001 Certified Page 13 of 13