Digital Systems Design

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1 ECOM 4311 Digital Systems Design Eng. Monther Abusultan Computer Engineering Dept. Islamic University of Gaza Page 1 ECOM4311 Digital Systems Design Module #2 Agenda 1. History of Digital Design Approach 2. HDLs 3. Design Abstraction 4. Modern Design Steps 5. Implementation Options (FPGAs) ECOM4311 Digital Systems Design Module #2 Page 2 1

2 In the beginning 1970's - designers used Paper/Pencil & Boolean Equations to create schematics - impractical in large designs 1980's - schematic based designs using electronic editors - this enabled Copy/Paste & Hierarchy - Design-reuse was enabled which increased design sizes mid 80's - HDL's became more common (created mid 80's) - Text-based Compilers (C, PASCAL) could be adapted to perform digital simulation - Larger Designs could be described using text Design Simulation Still separate Physical Implementation Page 3 More recently 1990's - Synthesis became practical due to increase in computational power of computers Synthesis - The creation of circuitry from a functional description ex) "Functional Description of MU" if (Sel = 0) = A else = B Synthesis A B Sel Page 4 2

Real Power 1990's - Now engineers had a power combination "HDL" if (Sel = 0) = A else = B "Simulation" "Synthesis" Sel A B Page 5 Abstraction Engineers could now stay at a higher level of abstraction

3 Real Power 1990's - Now engineers had a power combination "HDL" if (Sel = 0) = A else = B "Simulation" "Synthesis" Sel A B Page 5 Abstraction Engineers could now stay at a higher level of abstraction and rely on the tools to 1) Simulate. 2) Synthesize the circuitry. - This allows larger systems to be described/designed in the same time. - Since HW is expensive to build, using the tools to reduce prototyping was the next step. Page 6 3

4 Timing Verification - Let the tool "Verify" timing - Less time spent prepping design for a prototyping run Functional Simulation HDL Synthesis Technology Mapping Place/Route (extract RC's) Match? Post Implementation Simulation Fab Page 7 VHDL V = Very High Speed Integrated Circuit (VHSIC) H = Hardware D = Description L = Language - Originally Designed by IBM, TI, Intermetrics (all sponsored by US DoD) - Original Intent was to Document Behavior (instead of writing system manuals) - Original Intent was NOT synthesis, that came later - Simulation was a given, since the designs were already in text and we had text compilers (C,.) Page 8 4

5 VHDL & IEEE - In 1987, IEEE published the "VHDL Standard" - IEEE = First formal version of VHDL - Strong "Data Typing" - each signal/variable is typed (bit, bit_vector, real, integer) - assignments between different types NOT allowed - Did not handle multi-valued logic Page 9 VHDL & IEEE - High Impedance Tx/Rx Tx/Rx Tx/Rx - it is how circuits behave, strong drivers will control the bus when everyone is High-Z - When nobody is driving the bus, the bus is High-Z - So for true behavior, VHDL has to model High-Z - VHDL's built in types (bit and bit_vector) can only be 0 or 1, these don't cut it. - Weak/Strong - Busses have multiple drivers but some are weaker than others. - We should model these too. Page 10 5

6 VHDL & IEEE - VHDL allows users to come up with their own data types. - Since the world needed multi-valued logic, everyone started creating their own add-on packages. - this created a lot of confusion when multiple vendors worked together (i.e., Fab Shop and Designer) - In 1993, IEEE published an Upgrade - IEEE added support for Multi-Valued Logic through the "STD_LOGIC" package - better syntax consistency - Every time there is a need for a data type, industry will start to create add-ons, then IEEE will create a standard to reduce confusion. Page 11 VHDL & IEEE - Other package standards that were added to VHDL = "Real and Complex Data Types" = "Signed and Unsigned Data Types" - The rev of VHDL in 2003 (1076.3) is the most commonly used release. - The most recent update is in 2008 (VHDL 4.0) which was approved by IEEE in 2009 ( ). Page 12 6

7 VHDL Usage A fundamental motivation to use VHDL is that VHDL is a standard, technology/vendor independent language, and is therefore portable and reusable. The two main immediate applications of VHDL are in: The field of Programmable Logic Devices (CPLDs, FPGAs). The field of ASICs. Once the VHDL code has been written, it can be used either to implement the circuit in: a programmable device (from Altera, ilinx, Atmel, etc.) or can be submitted to a foundry for fabrication of an ASIC chip. Currently, many complex commercial chips (microcontrollers, for example) are designed using such an approach. ECOM4311 Digital Systems Design Module #2 Page 13 Design Abstraction At What level can we design? Page 14 7

8 Design Abstraction What does abstraction give us? - The higher in abstraction we go, the more complex & larger the system becomes - But, we let go over the details of how it performs (speed, fine tuning) - There are engineering jobs at each level What does VHDL model? - System : Chip : Register : Gate - VHDL let's us describe systems in two ways: 1) Structural (text netlist) 2) Behavioral (requires synthesis) Page 15 Digital Design Flow Designing Large Circuits - this is the ideal process Page 16 8

9 Digital Design Flow Designing Large Circuits - this is reality Page 17 What is an FPGA Field Programmable Gate Array An FPGA uses Re-urable Logic Blocks - we set the uration bits of this block to set its Boolean logic function - the uration is a Truth Table (or Look Up Table) of functionality 000 NOT() 001 NOT() 010 OR 011 NOR 100 AND 101 NAND 110 OR 111 NOR Page 18 9

10 LUT FOR 4-INPUT EVEN PARITY GENERATOR ADDRESS Input put Page 19 LUTs = Look Up Tables - we can program the LUTs to be whatever type of gate is needed by the design - there are a finite number of LUTs within a given FPGA (also called "resources") The LUTs are ured into an ARRAY on the silicon - Array of LUT's = Array of Gates = Gate Array Page 20 10

11 Programmable Interconnect - there are programmable interconnect switches that connect the LUTs LUT LUT LUT LUT LUT LUT LUT LUT LUT Page 21 Configuration - We start with a Gate Level Schematic of our design (from synthesis) - The FPGA LUTs are ured to implement Gates LUT LUT LUT LUT LUT LUT LUT LUT LUT Page 22 11

12 Configuration - The interconnect switches are then programmed to implement the net connections A INV AND LUT B C INV OR LUT LUT LUT LUT Page 23 Configuration - The LUT and Interconnect uration is volatile (i.e., it goes away when power is removed) - Since the programming is done by the user after fabrication, we call it "Field Programmable - That is where Field Programmable Gate Array comes from. A INV AND LUT B C INV OR LUT LUT LUT LUT ECOM4311 Digital Systems Design Module #2 Page 24 12

13 Switch box ECOM4311 Digital Systems Design Module #2 Page 25 Adding More Functionality - FPGA manufacturer's quickly learned that Flip-Flops would be useful - They put a DFF next to a 4-Input LUT to form a "Configurable Logic Block" (CLB) CLB CLB CLB CLB Page 26 13

- PowerPC 32/64 bits RISC - MicroBlaze* 32 bits RISC - NIOS II* 32 bits RISC - PicoBlaze* 8 bits RISC * This is provided as a

14 Adding Even More Functionality - To Improve performance, common logic functions were "hard coded" on the silicon - Block RAM - Adders / Multipliers - Global Clock Buffers - even Microprocessors! - PowerPC 32/64 bits RISC - MicroBlaze* 32 bits RISC - NIOS II* 32 bits RISC - PicoBlaze* 8 bits RISC * This is provided as a synthesizable component that can be Implemented on the logic fabric. Page 27 What else can we program? - Which Pins to use on the package - Clock - GPIOs - Reset - - What logic levels - CMOS_33, CMOS25, etc Page 28 14

15 Programming the FPGA - FPGA - we can program the FPGA directly - volatile nature means if we remove power, we'll lose program - EEPROM - we can download our code into an on-board EEProm - Upon power up, the EEProm will program the FPGA Page 29 FPGA Overview The Real World - historically (mid 90's) have been too expensive for deployment in commercial designs - ASICs have become very expensive and have become more powerful - As a result, it is now cost effective to use in designs - Learning how an FPGA operates and how to get performance out of them is a highly sought after engineer skill! Page 30 15

Why FPGAs? FPGA Overview. Why FPGAs?

Why FPGAs? FPGA Overview. Why FPGAs? Transistor-level Logic Circuits Positive Level-sensitive EECS150 - Digital Design Lecture 3 - Field Programmable Gate Arrays (FPGAs) January 28, 2003 John Wawrzynek Transistor Level clk clk clk Positive