COMP12111: Fundamentals of Computer Engineering

Size: px
Start display at page:

Download "COMP12111: Fundamentals of Computer Engineering"

Transcription

1 COMP2: Fundamentals of Computer Engineering Part I Course Overview & Introduction to Logic Paul Nutter

2 Introduction What is this course about? Computer hardware design o not electronics nothing nasty like transistors! o from logic gates to computers What should you get from it? An overview of the hardware design process o experience of various levels of design o some of the techniques involved An appreciation of the complexity involved o and how it is managed sensibly A flavour of the subject area Intel Core i7 six-core processor o maybe you will want to learn more maybe not 2

3 Academic Staff Dr Paul Nutter Office: IT9 Ground floor IT building Dr Ernie Hill Office: IT8 Ground floor IT building Prof Tom Thomson Office: IT2 Ground floor IT building 3

4 What does it involve? Lectures approx. 22 lectures, two per week, 2pm Tues, 2pm Fri Assessment Laboratory put knowledge into practice Examination test lecture and laboratory material ½ hour exam in January tests both knowledge and application of principles Laboratory and examination both count towards 5% of final mark Laboratories, scheduled weekly, each 2 hours (day/time depends on lab group) Start next week you need to collect a copy of the lab manual from the student support office make sure you prepare beforehand! 4

5 Recommended Textbooks There are a number of textbooks that cover some of the material covered in this course unit. Recommended: Principles of Computer Hardware Alan Clements, 4 th Edition, Oxford University Press, ISBN Digital Design with RTL Design, VHDL, and Verilog Frank Vahid, 2 nd Edition, Wiley, ISBN Please note: no single book covers ALL the material covered, so we don t insist that you buy any. There should be copies of both in the JRULM and the School library in the resource centre (Kilburn LF). 5

6 Course Overview Somewhat bottom up Logic Combinatorial logic Sequential logic Register Transfer Level Design tools and techniques Schematic capture and simulation Verilog HDL Computer subsystems Processors Memories Communication Conventional computers PWN EWH 6

7 What is in a computer? What does a computer actually do? It manipulates information - data How is information represented? The data is in a binary form, strings of s and s How is the information manipulated? The data is manipulated using transistors tiny switches A collection of transistors forms a logic gate that performs a particular logic function AND, OR etc Collections of logic functions form more complex functions ALU etc Data can be stored to memory where it s value is preserved, and retrieved later What does the information represent? Many things Version 2 COMP2: Logic 7

8 Introduction to Logic In the first set of lectures we will be looking at Binary logic and the electronic components that allow us to manipulate Binary data. How do we represent signals in a Computer? Boolean logic functions and the rules of Boolean algebra Logic gates how we implement Boolean functions Arithmetic operations how do computers add and subtract numbers? Abstraction and Hierarchy how do we control complex designs? Sequential systems time dependent behaviour in electronic systems and more There is lots information, most of which will be new and at first you may not appreciate it s importance. However, don t worry, the notes are self explanatory and most of the information is not covered in great detail (as it would if you were studying electronics for example). Version 2 COMP2: Logic 8

9 Digital Signals A signal is a message something which carries information. A digital signal is a signal that at any time can have one of a number of finite possible values, or states usually 2 as opposed to analogue signals that can take an infinite number of possible values. The states of digital signals can be interpreted in a variety of ways: TRUE/FALSE ( T / F ) High/Low / True/False are often used for control applications. s and s are the more common for representing data, especially when several bits are used (binary data example: 8-bit, 32-bit). Computers manipulate information in a digital form using binary signals as a collection of s and s we will look at what binary numbers can represent later. 9

10 Data Representation Digital computers DO NOT manipulate numbers, they manipulate binary signals (binary digits, bits, s and s) Individual bits (binary digits) can be used to represent Boolean {TRUE, FLASE} conditions. The active state can be chosen arbitrarily (see later) Bits are sometimes grouped together and used to represent other variables such as characters, numbers, instructions For example: The bit pattern (that s 6C7565 in hex) could represent: an ARM instruction LDCVSL P, R6, [R5], #-&4 a decimal number a floating point number a string.865x 27 (approximately) Paul It s a question of how you interpret things! we will look more at Boolean representations later

11 Boolean Functions AND, OR and NOT Boolean algebra uses variables whose values can be only or the digital logic states. The two basic logic functions have binary inputs and binary outputs (i.e. inputs and outputs that are either or ). Name Input/Output Operation Symbol AND 2 inputs output Output is (true) if both input variables are. OR 2 input output Output is (true) is either input variable is + The other essential logic function is the unary operator - NOT True = NOT(False), False = NOT(True), or = NOT(), =NOT()

12 Truth Tables We represent logical functions using logical truth tables that indicate all the possible states of a logical function. AND Inputs Output Inputs Output OR Inputs Output F F F F T F T F F or (more common) T T T NOT* *(or inversion, complement) Input Output NOT(X) = X It is possible to draw a truth table to define any function. truth tables for functions with n inputs have 2 n entries. 2

13 NAND, NOR Two more Boolean functions are worthy of their own names NAND : which is AND followed by NOT NOR : which is OR followed by NOT NAND Inputs AND NAND NOR Inputs OR NOR NAND and NOR gates are often used in logic circuit design 3

14 Exclusive-OR Another useful Boolean logic function is the Exclusive-OR gate (EXOR, XOR) The two-input OR function is true if one or more of its inputs are true the exclusive-or is similar, but it excludes the case when both inputs are true. XOR Inputs XOR the XOR operation is often indicated by the symbol + it may be constructed from other (AND/OR/NOT) functions 4

15 De Morgan s Theorem De Morgan s theorem (named after Augustus De Morgan 86-87) is used to express the relationship between AND, OR, NAND and NOR In words A+B = A.B A.B = A+B The complement (inversion) of a sum equals the the product of the complements; the complement of a product equals the sum of the complements. No(fish OR chips) =No(fish) AND No(chips) No(fish AND chips) =No(fish) OR No(chips) 5

16 Other Boolean Functions For n variables there are 2 2n possible Boolean functions... so there are 6 (2 4 ) possible 2-input Boolean functions For two Boolean inputs A and B A B A B A B A.B A.B A.B A.B A+B A+B A+B A+B A=B A B most are of no use. 6

17 Logic Gates Logic expressions are sometimes expressed algebraically; they may also be expressed schematically as gates that are represented using symbols. AND gate Inputs A B C Output C=A.B signal direction OR gate XOR gate A B C A B C C=A+B C=A + B 7

18 Logic Gates Inversion is represented by a bubble : NOT gate NAND gate NOR gate A C A B C A B C C=A C=A.B C=A+B As well as inversion at the output (to form the NAND and NOR gates), we can invert inputs: A B C Gates with more inputs are also possible: 3- and 4-input AND gates. C=A+B 8

19 Multiplexers Another common device is the multiplexer, or mux. The mux is a switching device, that selects binary information from one of its many input lines and directs it to a single output line. The 2: mux has the circuit symbol : d The status of the control input, s determines which of the two inputs is connected to the output. d =d s s = = Thus, the mux acts like an electronic switch that selects which source is connected to the output. A mux can have any number of inputs, but must have enough control inputs to be able to select each input (a 4: mux has 4 inputs and 2 control lines, 32: mux has 32 inputs and 5 control lines). Version 2 COMP2: Logic 9

20 Data What does it mean? Take a 32-bit word and you can interpret it as you wish (as illustrated previously). However Instructions Integers a common interpretation some interpretations prove more useful than others! usually the only operation preformed is decoding o to work out what it does! o performed by specialised hardware o more later the most common data interpretation bits are interpreted as or s the bits are numbered i, from i= to n- starting at (2 n- 2 n ) each bit has a significance of 2 i Operations provided usually include: addition, subtraction, multiplication, division, and comparison 2

21 What is the integer value? A decimal number, such as,529 represents a quantity that is equal to: or mathematically thousand + 5 hundreds + 2 tens + 9 units x = so at stage the coefficients take the values -9 which are multiplied by the appropriate power of. The decimal number system has a radix, or base, of, since it uses digits and the coefficients are multiplied by powers of. The binary number system has a base of 2, it has coefficients of and, and these are multiplied by powers of 2. So = = = = 9 Simples 2

22 Arithmetic Operations Addition Remember addition in decimal =2, which is 2 carry =, which is carry Binary addition is similar, just remember that each each digit has a value of and, the sum of 2 gives a carry + +=2 sum of carry of ++=2 sum of carry of ++=3 sum of carry of (2+) 22

23 Arithmetic Operations Subtraction Subtraction is the same as adding a negative number but how do you represent a negative number The most common method of representing negative numbers is 2 s complement : -8 = -7 = -6 = -5 = -4 = -3 = -2 = - = = = 2 = 3 = 4 = 5 = 6 = 7 = Positive numbers remain the same, but the msb is the sign bit, indicates a positive number Numbers represented in this way can be added (ignore any carry which falls off the end)

24 Application of Logic Gates The basic gates (AND, OR, NOT etc.) can be connected together to create a circuit to perform a particular (arbitrary) logic function A simple example of implementing a logic function: P=A.B+C.D AND A and B AND C and D OR the result A B C D P You will do some more examples in the lab 24

25 Addition of Binary Numbers using Logic Gates To perform binary addition we need a circuit that can add two binary values and produce a sum value and a carry. Truth Table A B A B S C o A B S A B C o This is a half adder To implement an adder that could add two n-bit numbers, you must also be able to add a carry in also this circuit is called a full adder you will look at this in the lab. Version 2 COMP2: Logic 25

26 Timing Diagrams Truth tables depict all the possible outcomes of a logic function, but they are static, i.e. they do not demonstrate dynamic (time varying) behaviour. Another method of showing a logic function is to use a timing diagram. For example, the AND gate: A B C! changes in logic level are not instantaneous output calculation takes some time (propagation delay) a timing diagram may help highlight possible hazards Timing diagrams are useful when describing sequential circuits 26

27 When is a signal Active? Intuitively, one thinks as a as an active or true signal this may not be the case. Consider a signal that indicates a door open condition; the same signal also represents door closed, but at the same time that one interpretation is TRUE the other must be FALSE Door Shut Door Open Door Shut Door Open As an example, a security guard may want to know if a door is opened, whilst a submarine captain wants to know that a door is shut! It is quite common to find some Boolean signals are active in one state whereas others are active in the opposite state. signals where high is interpreted as true are called active high signals - open signals where low is interpreted as true are called active low signals - open data signals, where there is no clear true/false case are neither 27

28 Abstraction Computers are complex things far too complex to think about all the elements at once! Intel Core i7 six-core processor Abstraction makes it possible to design, build and test complex systems. Input Function Output Any function should be: reasonably sensible simple enough to understand self-contained have defined interfaces Example: Add two numbers 28

29 Hierarchy Split a complex design into more manageable and reusable chunks! System & Architecture Devices Blocks Subblocks Gates Transistors Physics 29

30 An example of Hierarchy A general purpose binary adder comprises a number of individual operations. Although it would be possible to build this as a single, monolithic entity this would be difficult. Instead the problem can be broken down hierarchically: The sum of n bit numbers requires n adders to perform each sum Each sum is the sum of 3 bits (A i, B i, and a carry in,c i ) We design the logic to add 3 bits (which can be two 2-bit sums) and replicate over all n bits A i +B i +C i =(A i +B i )+C i It is easiest to: Define, design and test each function once Encapsulate each function in its own symbol Reuse logic as much as is feasible Keeping individual functions small makes them more tractable These principles apply to the design of anything even software! 3

31 Buses You may have heard of buses in the context of computers, it is a much used word A bus is a collection of signals, grouped together for convenience: address bus, data bus Input Bus Input Bus Output Bus Largely, we will stick to using bus as a designator for a collection of bits that form an individual variable. Thus, a 32-bit computer (such as an ARM) will have a 32-bit adder but normally this will have two input buses. In the lab, you will see these named according to two different conventions: busname<3:> busname[3:] 3

32 Flip-flops (Latches) The flip-flop is an important component within any computer A flop-flop is a bistable device, i.e. it assumes one of two stable states Activation of input(s) causes the flip-flop to assume one of the two states which it remembers even after the input(s) are deactivated. It remains in this state until driven into another state by suitable activation of one or more inputs. It is a simple one bit memory element. With a memory element we are able to implement sequential logic. Flip-flops come in many varieties: the RS (or sometimes SR) flip-flop, the D-type flip-flop, the J-K flip-flop (we won t look at this) 32

33 S-R Flip-flop R S R S S set input ( set to ) R reset input ( set to ) S R Note: instructing the flip-flop to set and reset at the same time should be avoided. 33

34 How? S = (initially reset) R = (initially set) R = S R R = S R S = S = S = (after S = ) R = S R R = (after R = ) R = S R S = S = Version 2 COMP2: Logic 34

35 D-type Latch (The Transparent Latch) based on the S-R flip-flop an easier-to-use device single data input, D separate control enable, En D En Circuit symbol D En En = Latch is frozen. is constant and independent En = Latch is transparent. =D. The D-type latch is also known as a transparent latch because, when enabled, the value that is input travels straight through to the output. 35

36 D-type Flip-flop the most common/useful state holding device considerably more complex (internally) than other devices very simple to use Master Slave D D D D En En Clk Master & slave act so that the input, D, is sampled only on active (in this case rising) clock edges Clk D master 36

37 Reality Intrudes An edge-triggered device samples its input the instant the clock rises (or falls in some cases) Unfortunately all circuits have some delay nothing happens instantaneously An edge-triggered device samples its input during a short interval around the time that the clock rises or falls. The interval is a characteristic of the device and is defined by: the set-up time (T SU ) the hold time (T H ) The data must be stable in this interval if the flip-flop is to function correctly. There is also an associated time the propagation delay (T PD ) which is the time taken for the output to change. Clk D T SU T H T PD In a well-engineering system T PD >T H 37

38 State A flip-flop is capable of storing state. It is a single bit memory. State allows us to build sequential machines rather than evaluating combinatorially. Example Although (in principle) any problem could be solved combinatorially, sequential algorithms allow problems to be solved practically. Sequential algorithms break problems down in steps evaluated in time. Each step passes information to its successors as the system s state. Small problems are tractable 5 x 3 5 Larger problems can be broken down into a sequence of steps 357 x The state of a system is its total internal memory condition a bit can have one of two states a byte (8 bits) has one of 256 states a 32-bit word can adopt one of 4,294,967,296 states 38

39 Clocks Most computers are synchronous in that state changes are caused to happen as a result of a system-wide clock The clock is an infinite stream of pulse usually a square wave Period Time Edge-triggered circuits respond to one of the two edges of the clock (rising or falling) The clock ensures that all state changes throughout the system happen simultaneously This allows the logic to be described as independent equations without worrying about timing or what happens while the circuits are switching. 39

40 Summary We have looked at: Data representation how we use binary to represent information in computers Boolean logic and the rules for manipulating Boolean expressions o Truth tables o DeMorgan s theroem Boolean logic and the rules for manipulating Boolean expressions Gates and schematics for representing digital circuits Number representation in binary and simple mathematical operations o 2 s complement arithmetic The issue of timing signals do not change state instantaneously Abstraction & Hierarchy for simplifying design Sequential systems o The D-type flip-flop Version 2 COMP2: Logic 4

The basic logic gates are the inverter (or NOT gate), the AND gate, the OR gate and the exclusive-or gate (XOR). If you put an inverter in front of

The basic logic gates are the inverter (or NOT gate), the AND gate, the OR gate and the exclusive-or gate (XOR). If you put an inverter in front of 1 The basic logic gates are the inverter (or NOT gate), the AND gate, the OR gate and the exclusive-or gate (XOR). If you put an inverter in front of the AND gate, you get the NAND gate etc. 2 One of the

More information

The word digital implies information in computers is represented by variables that take a limited number of discrete values.

The word digital implies information in computers is represented by variables that take a limited number of discrete values. Class Overview Cover hardware operation of digital computers. First, consider the various digital components used in the organization and design. Second, go through the necessary steps to design a basic

More information

Objectives. Combinational logics Sequential logics Finite state machine Arithmetic circuits Datapath

Objectives. Combinational logics Sequential logics Finite state machine Arithmetic circuits Datapath Objectives Combinational logics Sequential logics Finite state machine Arithmetic circuits Datapath In the previous chapters we have studied how to develop a specification from a given application, and

More information

COMP2611: Computer Organization. Introduction to Digital Logic

COMP2611: Computer Organization. Introduction to Digital Logic 1 COMP2611: Computer Organization Sequential Logic Time 2 Till now, we have essentially ignored the issue of time. We assume digital circuits: Perform their computations instantaneously Stateless: once

More information

1. True/False Questions (10 x 1p each = 10p) (a) I forgot to write down my name and student ID number.

1. True/False Questions (10 x 1p each = 10p) (a) I forgot to write down my name and student ID number. CprE 281: Digital Logic Midterm 2: Friday Oct 30, 2015 Student Name: Student ID Number: Lab Section: Mon 9-12(N) Mon 12-3(P) Mon 5-8(R) Tue 11-2(U) (circle one) Tue 2-5(M) Wed 8-11(J) Wed 6-9(Y) Thur 11-2(Q)

More information

211: Computer Architecture Summer 2016

211: Computer Architecture Summer 2016 211: Computer Architecture Summer 2016 Liu Liu Topic: Storage Project3 Digital Logic - Digital Logic: Recap - Review: truth table => SOP => simplification - dual / complement - Minterm / Maxterm - SOP

More information

Combinational vs Sequential

Combinational vs Sequential Combinational vs Sequential inputs X Combinational Circuits outputs Z A combinational circuit: At any time, outputs depends only on inputs Changing inputs changes outputs No regard for previous inputs

More information

CHAPTER 4: Logic Circuits

CHAPTER 4: Logic Circuits CHAPTER 4: Logic Circuits II. Sequential Circuits Combinational circuits o The outputs depend only on the current input values o It uses only logic gates, decoders, multiplexers, ALUs Sequential circuits

More information

AIM: To study and verify the truth table of logic gates

AIM: To study and verify the truth table of logic gates EXPERIMENT: 1- LOGIC GATES AIM: To study and verify the truth table of logic gates LEARNING OBJECTIVE: Identify various Logic gates and their output. COMPONENTS REQUIRED: KL-31001 Digital Logic Lab( Main

More information

DIGITAL CIRCUIT COMBINATORIAL LOGIC

DIGITAL CIRCUIT COMBINATORIAL LOGIC DIGITAL CIRCUIT COMBINATORIAL LOGIC Logic levels: one zero true false high low CMOS logic levels: 1 => 0.7 V DD 0.4 V DD = noise margin 0 =< 0.3 V DD Positive logic: high = 1 = true low = 0 = false Negative

More information

CHAPTER 4: Logic Circuits

CHAPTER 4: Logic Circuits CHAPTER 4: Logic Circuits II. Sequential Circuits Combinational circuits o The outputs depend only on the current input values o It uses only logic gates, decoders, multiplexers, ALUs Sequential circuits

More information

Chapter 3. Boolean Algebra and Digital Logic

Chapter 3. Boolean Algebra and Digital Logic Chapter 3 Boolean Algebra and Digital Logic Chapter 3 Objectives Understand the relationship between Boolean logic and digital computer circuits. Learn how to design simple logic circuits. Understand how

More information

1. Convert the decimal number to binary, octal, and hexadecimal.

1. Convert the decimal number to binary, octal, and hexadecimal. 1. Convert the decimal number 435.64 to binary, octal, and hexadecimal. 2. Part A. Convert the circuit below into NAND gates. Insert or remove inverters as necessary. Part B. What is the propagation delay

More information

COE328 Course Outline. Fall 2007

COE328 Course Outline. Fall 2007 COE28 Course Outline Fall 2007 1 Objectives This course covers the basics of digital logic circuits and design. Through the basic understanding of Boolean algebra and number systems it introduces the student

More information

Introduction to Digital Logic Missouri S&T University CPE 2210 Exam 3 Logistics

Introduction to Digital Logic Missouri S&T University CPE 2210 Exam 3 Logistics Introduction to Digital Logic Missouri S&T University CPE 2210 Exam 3 Logistics Egemen K. Çetinkaya Egemen K. Çetinkaya Department of Electrical & Computer Engineering Missouri University of Science and

More information

DIGITAL SYSTEM FUNDAMENTALS (ECE421) DIGITAL ELECTRONICS FUNDAMENTAL (ECE422) LATCHES and FLIP-FLOPS

DIGITAL SYSTEM FUNDAMENTALS (ECE421) DIGITAL ELECTRONICS FUNDAMENTAL (ECE422) LATCHES and FLIP-FLOPS COURSE / CODE DIGITAL SYSTEM FUNDAMENTALS (ECE421) DIGITAL ELECTRONICS FUNDAMENTAL (ECE422) LATCHES and FLIP-FLOPS In the same way that logic gates are the building blocks of combinatorial circuits, latches

More information

EE292: Fundamentals of ECE

EE292: Fundamentals of ECE EE292: Fundamentals of ECE Fall 2012 TTh 10:00-11:15 SEB 1242 Lecture 23 121120 http://www.ee.unlv.edu/~b1morris/ee292/ 2 Outline Review Combinatorial Logic Sequential Logic 3 Combinatorial Logic Circuits

More information

EXPERIMENT: 1. Graphic Symbol: OR: The output of OR gate is true when one of the inputs A and B or both the inputs are true.

EXPERIMENT: 1. Graphic Symbol: OR: The output of OR gate is true when one of the inputs A and B or both the inputs are true. EXPERIMENT: 1 DATE: VERIFICATION OF BASIC LOGIC GATES AIM: To verify the truth tables of Basic Logic Gates NOT, OR, AND, NAND, NOR, Ex-OR and Ex-NOR. APPARATUS: mention the required IC numbers, Connecting

More information

DIGITAL SYSTEM DESIGN UNIT I (2 MARKS)

DIGITAL SYSTEM DESIGN UNIT I (2 MARKS) DIGITAL SYSTEM DESIGN UNIT I (2 MARKS) 1. Convert Binary number (111101100) 2 to Octal equivalent. 2. Convert Binary (1101100010011011) 2 to Hexadecimal equivalent. 3. Simplify the following Boolean function

More information

Solution to Digital Logic )What is the magnitude comparator? Design a logic circuit for 4 bit magnitude comparator and explain it,

Solution to Digital Logic )What is the magnitude comparator? Design a logic circuit for 4 bit magnitude comparator and explain it, Solution to Digital Logic -2067 Solution to digital logic 2067 1.)What is the magnitude comparator? Design a logic circuit for 4 bit magnitude comparator and explain it, A Magnitude comparator is a combinational

More information

Chapter 4. Logic Design

Chapter 4. Logic Design Chapter 4 Logic Design 4.1 Introduction. In previous Chapter we studied gates and combinational circuits, which made by gates (AND, OR, NOT etc.). That can be represented by circuit diagram, truth table

More information

North Shore Community College

North Shore Community College North Shore Community College Course Number: IEL217 Section: MAL Course Name: Digital Electronics 1 Semester: Credit: 4 Hours: Three hours of Lecture, Two hours Laboratory per week Thursdays 8:00am (See

More information

D Latch (Transparent Latch)

D Latch (Transparent Latch) D Latch (Transparent Latch) -One way to eliminate the undesirable condition of the indeterminate state in the SR latch is to ensure that inputs S and R are never equal to 1 at the same time. This is done

More information

Flip Flop. S-R Flip Flop. Sequential Circuits. Block diagram. Prepared by:- Anwar Bari

Flip Flop. S-R Flip Flop. Sequential Circuits. Block diagram. Prepared by:- Anwar Bari Sequential Circuits The combinational circuit does not use any memory. Hence the previous state of input does not have any effect on the present state of the circuit. But sequential circuit has memory

More information

Logic Design ( Part 3) Sequential Logic- Finite State Machines (Chapter 3)

Logic Design ( Part 3) Sequential Logic- Finite State Machines (Chapter 3) Logic esign ( Part ) Sequential Logic- Finite State Machines (Chapter ) Based on slides McGraw-Hill Additional material 00/00/006 Lewis/Martin Additional material 008 Roth Additional material 00 Taylor

More information

MODULE 3. Combinational & Sequential logic

MODULE 3. Combinational & Sequential logic MODULE 3 Combinational & Sequential logic Combinational Logic Introduction Logic circuit may be classified into two categories. Combinational logic circuits 2. Sequential logic circuits A combinational

More information

Physics 323. Experiment # 10 - Digital Circuits

Physics 323. Experiment # 10 - Digital Circuits Physics 323 Experiment # 10 - Digital Circuits Purpose This is a brief introduction to digital (logic) circuits using both combinational and sequential logic. The basic building blocks will be the Transistor

More information

CPS311 Lecture: Sequential Circuits

CPS311 Lecture: Sequential Circuits CPS311 Lecture: Sequential Circuits Last revised August 4, 2015 Objectives: 1. To introduce asynchronous and synchronous flip-flops (latches and pulsetriggered, plus asynchronous preset/clear) 2. To introduce

More information

Logic Gates, Timers, Flip-Flops & Counters. Subhasish Chandra Assistant Professor Department of Physics Institute of Forensic Science, Nagpur

Logic Gates, Timers, Flip-Flops & Counters. Subhasish Chandra Assistant Professor Department of Physics Institute of Forensic Science, Nagpur Logic Gates, Timers, Flip-Flops & Counters Subhasish Chandra Assistant Professor Department of Physics Institute of Forensic Science, Nagpur Logic Gates Transistor NOT Gate Let I C be the collector current.

More information

Find the equivalent decimal value for the given value Other number system to decimal ( Sample)

Find the equivalent decimal value for the given value Other number system to decimal ( Sample) VELAMMAL COLLEGE OF ENGINEERING AND TECHNOLOGY, MADURAI 65 009 Department of Information Technology Model Exam-II-Question bank PART A (Answer for all Questions) (8 X = 6) K CO Marks Find the equivalent

More information

WINTER 15 EXAMINATION Model Answer

WINTER 15 EXAMINATION Model Answer Important Instructions to examiners: 1) The answers should be examined by key words and not as word-to-word as given in the model answer scheme. 2) The model answer and the answer written by candidate

More information

Logic. Andrew Mark Allen March 4, 2012

Logic. Andrew Mark Allen March 4, 2012 Logic Andrew Mark Allen - 05370299 March 4, 2012 Abstract NAND gates and inverters were used to construct several different logic gates whose operations were investigate under various inputs. Then the

More information

AM AM AM AM PM PM PM

AM AM AM AM PM PM PM FACULTY OF ENGINEERING AND TECHNOLOGY DEPARTMENT OF COMPUTER SCIENCE & ENGINEERING COURSE PLAN Course Code : CS0003 Course Title : DIGITAL COMPUTER FUNDAMENTALS Semester : III Course Time : Jun 204 to

More information

Analogue Versus Digital [5 M]

Analogue Versus Digital [5 M] Q.1 a. Analogue Versus Digital [5 M] There are two basic ways of representing the numerical values of the various physical quantities with which we constantly deal in our day-to-day lives. One of the ways,

More information

Sequential Logic. E&CE 223 Digital Circuits and Systems (A. Kennings) Page 1

Sequential Logic. E&CE 223 Digital Circuits and Systems (A. Kennings) Page 1 Sequential Logic E&CE 223 igital Circuits and Systems (A. Kennings) Page 1 Sequential Circuits Have considered only combinational circuits in which circuit outputs are determined entirely by current circuit

More information

Introduction to Digital Logic Missouri S&T University CPE 2210 Exam 2 Logistics

Introduction to Digital Logic Missouri S&T University CPE 2210 Exam 2 Logistics Introduction to Digital Logic Missouri S&T University CPE 2210 Exam 2 Logistics Egemen K. Çetinkaya Egemen K. Çetinkaya Department of Electrical & Computer Engineering Missouri University of Science and

More information

Last time, we saw how latches can be used as memory in a circuit

Last time, we saw how latches can be used as memory in a circuit Flip-Flops Last time, we saw how latches can be used as memory in a circuit Latches introduce new problems: We need to know when to enable a latch We also need to quickly disable a latch In other words,

More information

Slide Set 7. for ENEL 353 Fall Steve Norman, PhD, PEng. Electrical & Computer Engineering Schulich School of Engineering University of Calgary

Slide Set 7. for ENEL 353 Fall Steve Norman, PhD, PEng. Electrical & Computer Engineering Schulich School of Engineering University of Calgary Slide Set 7 for ENEL 353 Fall 216 Steve Norman, PhD, PEng Electrical & Computer Engineering Schulich School of Engineering University of Calgary Fall Term, 216 SN s ENEL 353 Fall 216 Slide Set 7 slide

More information

Computer Systems Architecture

Computer Systems Architecture Computer Systems Architecture Fundamentals Of Digital Logic 1 Our Goal Understand Fundamentals and basics Concepts How computers work at the lowest level Avoid whenever possible Complexity Implementation

More information

CS 61C: Great Ideas in Computer Architecture

CS 61C: Great Ideas in Computer Architecture CS 6C: Great Ideas in Computer Architecture Combinational and Sequential Logic, Boolean Algebra Instructor: Alan Christopher 7/23/24 Summer 24 -- Lecture #8 Review of Last Lecture OpenMP as simple parallel

More information

Electrical and Telecommunications Engineering Technology_TCET3122/TC520. NEW YORK CITY COLLEGE OF TECHNOLOGY The City University of New York

Electrical and Telecommunications Engineering Technology_TCET3122/TC520. NEW YORK CITY COLLEGE OF TECHNOLOGY The City University of New York NEW YORK CITY COLLEGE OF TECHNOLOGY The City University of New York DEPARTMENT: SUBJECT CODE AND TITLE: COURSE DESCRIPTION: REQUIRED: Electrical and Telecommunications Engineering Technology TCET 3122/TC

More information

Microprocessor Design

Microprocessor Design Microprocessor Design Principles and Practices With VHDL Enoch O. Hwang Brooks / Cole 2004 To my wife and children Windy, Jonathan and Michelle Contents 1. Designing a Microprocessor... 2 1.1 Overview

More information

MODU LE DAY. Class-A, B, AB and C amplifiers - basic concepts, power, efficiency Basic concepts of Feedback and Oscillation. Day 1

MODU LE DAY. Class-A, B, AB and C amplifiers - basic concepts, power, efficiency Basic concepts of Feedback and Oscillation. Day 1 DAY MODU LE TOPIC QUESTIONS Day 1 Day 2 Day 3 Day 4 I Class-A, B, AB and C amplifiers - basic concepts, power, efficiency Basic concepts of Feedback and Oscillation Phase Shift Wein Bridge oscillators.

More information

Contents Circuits... 1

Contents Circuits... 1 Contents Circuits... 1 Categories of Circuits... 1 Description of the operations of circuits... 2 Classification of Combinational Logic... 2 1. Adder... 3 2. Decoder:... 3 Memory Address Decoder... 5 Encoder...

More information

BCN1043. By Dr. Mritha Ramalingam. Faculty of Computer Systems & Software Engineering

BCN1043. By Dr. Mritha Ramalingam. Faculty of Computer Systems & Software Engineering BCN1043 By Dr. Mritha Ramalingam Faculty of Computer Systems & Software Engineering mritha@ump.edu.my http://ocw.ump.edu.my/ authors Dr. Mohd Nizam Mohmad Kahar (mnizam@ump.edu.my) Jamaludin Sallim (jamal@ump.edu.my)

More information

Chapter. Synchronous Sequential Circuits

Chapter. Synchronous Sequential Circuits Chapter 5 Synchronous Sequential Circuits Logic Circuits- Review Logic Circuits 2 Combinational Circuits Consists of logic gates whose outputs are determined from the current combination of inputs. Performs

More information

PHYSICS 5620 LAB 9 Basic Digital Circuits and Flip-Flops

PHYSICS 5620 LAB 9 Basic Digital Circuits and Flip-Flops PHYSICS 5620 LAB 9 Basic Digital Circuits and Flip-Flops Objective Construct a two-bit binary decoder. Study multiplexers (MUX) and demultiplexers (DEMUX). Construct an RS flip-flop from discrete gates.

More information

COE 202: Digital Logic Design Sequential Circuits Part 1. Dr. Ahmad Almulhem ahmadsm AT kfupm Phone: Office:

COE 202: Digital Logic Design Sequential Circuits Part 1. Dr. Ahmad Almulhem   ahmadsm AT kfupm Phone: Office: COE 202: Digital Logic Design Sequential Circuits Part 1 Dr. Ahmad Almulhem Email: ahmadsm AT kfupm Phone: 860-7554 Office: 22-324 Objectives Sequential Circuits Memory Elements Latches Flip-Flops Combinational

More information

Principles of Computer Architecture. Appendix A: Digital Logic

Principles of Computer Architecture. Appendix A: Digital Logic A-1 Appendix A - Digital Logic Principles of Computer Architecture Miles Murdocca and Vincent Heuring Appendix A: Digital Logic A-2 Appendix A - Digital Logic Chapter Contents A.1 Introduction A.2 Combinational

More information

Chapter 5: Synchronous Sequential Logic

Chapter 5: Synchronous Sequential Logic Chapter 5: Synchronous Sequential Logic NCNU_2016_DD_5_1 Digital systems may contain memory for storing information. Combinational circuits contains no memory elements the outputs depends only on the inputs

More information

Where Are We Now? e.g., ADD $S0 $S1 $S2?? Computed by digital circuit. CSCI 402: Computer Architectures. Some basics of Logic Design (Appendix B)

Where Are We Now? e.g., ADD $S0 $S1 $S2?? Computed by digital circuit. CSCI 402: Computer Architectures. Some basics of Logic Design (Appendix B) Where Are We Now? Chapter 1: computer systems overview and computer performance Chapter 2: ISA (machine-spoken language), different formats, and various instructions Chapter 3: We will learn how those

More information

CSE115: Digital Design Lecture 23: Latches & Flip-Flops

CSE115: Digital Design Lecture 23: Latches & Flip-Flops Faculty of Engineering CSE115: Digital Design Lecture 23: Latches & Flip-Flops Sections 7.1-7.2 Suggested Reading A Generic Digital Processor Building Blocks for Digital Architectures INPUT - OUTPUT Interconnect:

More information

Logic Devices for Interfacing, The 8085 MPU Lecture 4

Logic Devices for Interfacing, The 8085 MPU Lecture 4 Logic Devices for Interfacing, The 8085 MPU Lecture 4 1 Logic Devices for Interfacing Tri-State devices Buffer Bidirectional Buffer Decoder Encoder D Flip Flop :Latch and Clocked 2 Tri-state Logic Outputs

More information

St. MARTIN S ENGINEERING COLLEGE

St. MARTIN S ENGINEERING COLLEGE St. MARTIN S ENGINEERING COLLEGE Dhulapally, Kompally, Secunderabad-500014. Branch Year&Sem Subject Name : Electronics and Communication Engineering : II B. Tech I Semester : SWITCHING THEORY AND LOGIC

More information

Chapter Contents. Appendix A: Digital Logic. Some Definitions

Chapter Contents. Appendix A: Digital Logic. Some Definitions A- Appendix A - Digital Logic A-2 Appendix A - Digital Logic Chapter Contents Principles of Computer Architecture Miles Murdocca and Vincent Heuring Appendix A: Digital Logic A. Introduction A.2 Combinational

More information

Introduction to Digital Electronics

Introduction to Digital Electronics Introduction to Digital Electronics by Agner Fog, 2018-10-15. Contents 1. Number systems... 3 1.1. Decimal, binary, and hexadecimal numbers... 3 1.2. Conversion from another number system to decimal...

More information

R13 SET - 1 '' ''' '' ' '''' Code No: RT21053

R13 SET - 1 '' ''' '' ' '''' Code No: RT21053 SET - 1 1. a) What are the characteristics of 2 s complement numbers? b) State the purpose of reducing the switching functions to minimal form. c) Define half adder. d) What are the basic operations in

More information

Digital Networks and Systems Laboratory 2 Basic Digital Building Blocks Time 4 hours

Digital Networks and Systems Laboratory 2 Basic Digital Building Blocks Time 4 hours Digital Networks and Systems Laboratory 2 Basic Digital Building Blocks Time 4 hours Aim To investigate the basic digital circuit building blocks constructed from combinatorial logic or dedicated Integrated

More information

COMP sequential logic 1 Jan. 25, 2016

COMP sequential logic 1 Jan. 25, 2016 OMP 273 5 - sequential logic 1 Jan. 25, 2016 Sequential ircuits All of the circuits that I have discussed up to now are combinational digital circuits. For these circuits, each output is a logical combination

More information

Chapter 5 Sequential Circuits

Chapter 5 Sequential Circuits Logic and Computer Design Fundamentals Chapter 5 Sequential Circuits Part 2 Sequential Circuit Design Charles Kime & Thomas Kaminski 28 Pearson Education, Inc. (Hyperlinks are active in View Show mode)

More information

6.3 Sequential Circuits (plus a few Combinational)

6.3 Sequential Circuits (plus a few Combinational) 6.3 Sequential Circuits (plus a few Combinational) Logic Gates: Fundamental Building Blocks Introduction to Computer Science Robert Sedgewick and Kevin Wayne Copyright 2005 http://www.cs.princeton.edu/introcs

More information

Multiplexor (aka MUX) An example, yet VERY useful circuit!

Multiplexor (aka MUX) An example, yet VERY useful circuit! Multiplexor (aka MUX) An example, yet VERY useful circuit! A B 0 1 Y S A B Y 0 0 x 0 0 1 x 1 1 x 0 0 1 x 1 1 S=1 S=0 Y = (S)? B:A; Y=S A+SB when S = 0: output A 1: output B 56 A 32-bit MUX Use 32 1-bit

More information

CS 110 Computer Architecture. Finite State Machines, Functional Units. Instructor: Sören Schwertfeger.

CS 110 Computer Architecture. Finite State Machines, Functional Units. Instructor: Sören Schwertfeger. CS 110 Computer Architecture Finite State Machines, Functional Units Instructor: Sören Schwertfeger http://shtech.org/courses/ca/ School of Information Science and Technology SIST ShanghaiTech University

More information

SEMESTER ONE EXAMINATIONS 2002

SEMESTER ONE EXAMINATIONS 2002 SEMESTER ONE EXAMINATIONS 2002 EE101 Digital Electronics Solutions Question 1. An assembly line has 3 failsafe sensors and 1 emergency shutdown switch. The Line should keep moving unless any of the following

More information

MC9211 Computer Organization

MC9211 Computer Organization MC9211 Computer Organization Unit 2 : Combinational and Sequential Circuits Lesson2 : Sequential Circuits (KSB) (MCA) (2009-12/ODD) (2009-10/1 A&B) Coverage Lesson2 Outlines the formal procedures for the

More information

MODEL QUESTIONS WITH ANSWERS THIRD SEMESTER B.TECH DEGREE EXAMINATION DECEMBER CS 203: Switching Theory and Logic Design. Time: 3 Hrs Marks: 100

MODEL QUESTIONS WITH ANSWERS THIRD SEMESTER B.TECH DEGREE EXAMINATION DECEMBER CS 203: Switching Theory and Logic Design. Time: 3 Hrs Marks: 100 MODEL QUESTIONS WITH ANSWERS THIRD SEMESTER B.TECH DEGREE EXAMINATION DECEMBER 2016 CS 203: Switching Theory and Logic Design Time: 3 Hrs Marks: 100 PART A ( Answer All Questions Each carries 3 Marks )

More information

TIME SCHEDULE. MODULE TOPICS PERIODS 1 Number system & Boolean algebra 17 Test I 1 2 Logic families &Combinational logic

TIME SCHEDULE. MODULE TOPICS PERIODS 1 Number system & Boolean algebra 17 Test I 1 2 Logic families &Combinational logic COURSE TITLE : DIGITAL INSTRUMENTS PRINCIPLE COURSE CODE : 3075 COURSE CATEGORY : B PERIODS/WEEK : 4 PERIODS/SEMESTER : 72 CREDITS : 4 TIME SCHEDULE MODULE TOPICS PERIODS 1 Number system & Boolean algebra

More information

CS6201 UNIT I PART-A. Develop or build the following Boolean function with NAND gate F(x,y,z)=(1,2,3,5,7).

CS6201 UNIT I PART-A. Develop or build the following Boolean function with NAND gate F(x,y,z)=(1,2,3,5,7). VALLIAMMAI ENGINEERING COLLEGE SRM Nagar, Kattankulathur-603203 DEPARTMENT OF COMPUTER SCIENCE AND ENGINEERING Academic Year: 2015-16 BANK - EVEN SEMESTER UNIT I PART-A 1 Find the octal equivalent of hexadecimal

More information

Computer Architecture and Organization

Computer Architecture and Organization A-1 Appendix A - Digital Logic Computer Architecture and Organization Miles Murdocca and Vincent Heuring Appendix A Digital Logic A-2 Appendix A - Digital Logic Chapter Contents A.1 Introduction A.2 Combinational

More information

Unit 11. Latches and Flip-Flops

Unit 11. Latches and Flip-Flops Unit 11 Latches and Flip-Flops 1 Combinational Circuits A combinational circuit consists of logic gates whose outputs, at any time, are determined by combining the values of the inputs. For n input variables,

More information

R13. II B. Tech I Semester Regular Examinations, Jan DIGITAL LOGIC DESIGN (Com. to CSE, IT) PART-A

R13. II B. Tech I Semester Regular Examinations, Jan DIGITAL LOGIC DESIGN (Com. to CSE, IT) PART-A SET - 1 Note: Question Paper consists of two parts (Part-A and Part-B) Answer ALL the question in Part-A Answer any THREE Questions from Part-B a) What are the characteristics of 2 s complement numbers?

More information

Tribhuvan University Institute of Science and Technology Bachelor of Science in Computer Science and Information Technology

Tribhuvan University Institute of Science and Technology Bachelor of Science in Computer Science and Information Technology Tribhuvan University Institute of Science and Technology Bachelor of Science in Computer Science and Information Technology Course Title: Digital Logic Full Marks: 60 + 0 + 0 Course No.: CSC Pass Marks:

More information

Department of Electrical and Computer Engineering Mid-Term Examination Winter 2012

Department of Electrical and Computer Engineering Mid-Term Examination Winter 2012 1 McGill University Faculty of Engineering ECSE-221B Introduction to Computer Engineering Department of Electrical and Computer Engineering Mid-Term Examination Winter 2012 Examiner: Rola Harmouche Date:

More information

Sequential Circuits. Output depends only and immediately on the inputs Have no memory (dependence on past values of the inputs)

Sequential Circuits. Output depends only and immediately on the inputs Have no memory (dependence on past values of the inputs) Sequential Circuits Combinational circuits Output depends only and immediately on the inputs Have no memory (dependence on past values of the inputs) Sequential circuits Combination circuits with memory

More information

Contents Slide Set 6. Introduction to Chapter 7 of the textbook. Outline of Slide Set 6. An outline of the first part of Chapter 7

Contents Slide Set 6. Introduction to Chapter 7 of the textbook. Outline of Slide Set 6. An outline of the first part of Chapter 7 CM 69 W4 Section Slide Set 6 slide 2/9 Contents Slide Set 6 for CM 69 Winter 24 Lecture Section Steve Norman, PhD, PEng Electrical & Computer Engineering Schulich School of Engineering University of Calgary

More information

Sequential Digital Design. Laboratory Manual. Experiment #3. Flip Flop Storage Elements

Sequential Digital Design. Laboratory Manual. Experiment #3. Flip Flop Storage Elements The Islamic University of Gaza Engineering Faculty Department of Computer Engineering Spring 2018 ECOM 2022 Khaleel I. Shaheen Sequential Digital Design Laboratory Manual Experiment #3 Flip Flop Storage

More information

WELCOME. ECE 2030: Introduction to Computer Engineering* Richard M. Dansereau Copyright by R.M. Dansereau,

WELCOME. ECE 2030: Introduction to Computer Engineering* Richard M. Dansereau Copyright by R.M. Dansereau, CHAPTER I- CHAPTER I WELCOME TO ECE 23: Introduction to Computer Engineering* Richard M. Dansereau rdanse@pobox.com Copyright by R.M. Dansereau, 2-2 * ELEMENTS OF NOTES AFTER W. KINSNER, UNIVERSITY OF

More information

More Digital Circuits

More Digital Circuits More Digital Circuits 1 Signals and Waveforms: Showing Time & Grouping 2 Signals and Waveforms: Circuit Delay 2 3 4 5 3 10 0 1 5 13 4 6 3 Sample Debugging Waveform 4 Type of Circuits Synchronous Digital

More information

Lecture 8: Sequential Logic

Lecture 8: Sequential Logic Lecture 8: Sequential Logic Last lecture discussed how we can use digital electronics to do combinatorial logic we designed circuits that gave an immediate output when presented with a given set of inputs

More information

Synchronous Sequential Logic

Synchronous Sequential Logic Synchronous Sequential Logic -A Sequential Circuit consists of a combinational circuit to which storage elements are connected to form a feedback path. The storage elements are devices capable of storing

More information

Advanced Devices. Registers Counters Multiplexers Decoders Adders. CSC258 Lecture Slides Steve Engels, 2006 Slide 1 of 20

Advanced Devices. Registers Counters Multiplexers Decoders Adders. CSC258 Lecture Slides Steve Engels, 2006 Slide 1 of 20 Advanced Devices Using a combination of gates and flip-flops, we can construct more sophisticated logical devices. These devices, while more complex, are still considered fundamental to basic logic design.

More information

Sequential logic circuits

Sequential logic circuits Computer Mathematics Week 10 Sequential logic circuits College of Information Science and Engineering Ritsumeikan University last week combinational digital circuits signals and busses logic gates and,

More information

WINTER 14 EXAMINATION

WINTER 14 EXAMINATION Subject Code: 17320 WINTER 14 EXAMINATION Model Answer Important Instructions to examiners: 1) The answers should be examined by key words and not as word-to-word as given in the model answer scheme. 2)

More information

EMT 125 Digital Electronic Principles I CHAPTER 6 : FLIP-FLOP

EMT 125 Digital Electronic Principles I CHAPTER 6 : FLIP-FLOP EMT 125 Digital Electronic Principles I CHAPTER 6 : FLIP-FLOP 1 Chapter Overview Latches Gated Latches Edge-triggered flip-flops Master-slave flip-flops Flip-flop operating characteristics Flip-flop applications

More information

LATCHES & FLIP-FLOP. Chapter 7

LATCHES & FLIP-FLOP. Chapter 7 LATCHES & FLIP-FLOP Chapter 7 INTRODUCTION Latch and flip flops are categorized as bistable devices which have two stable states,called SET and RESET. They can retain either of this states indefinitely

More information

Sequential Circuits: Latches & Flip-Flops

Sequential Circuits: Latches & Flip-Flops Sequential Circuits: Latches & Flip-Flops Overview Storage Elements Latches SR, JK, D, and T Characteristic Tables, Characteristic Equations, Eecution Tables, and State Diagrams Standard Symbols Flip-Flops

More information

Logic Design II (17.342) Spring Lecture Outline

Logic Design II (17.342) Spring Lecture Outline Logic Design II (17.342) Spring 2012 Lecture Outline Class # 03 February 09, 2012 Dohn Bowden 1 Today s Lecture Registers and Counters Chapter 12 2 Course Admin 3 Administrative Admin for tonight Syllabus

More information

MAHARASHTRA STATE BOARD OF TECHNICAL EDUCATION (Autonomous) (ISO/IEC Certified)

MAHARASHTRA STATE BOARD OF TECHNICAL EDUCATION (Autonomous) (ISO/IEC Certified) Important Instructions to examiners: 1) The answers should be examined by key words and not as word-to-word as given in the model answer scheme. 2) The model answer and the answer written by candidate

More information

Name Of The Experiment: Sequential circuit design Latch, Flip-flop and Registers

Name Of The Experiment: Sequential circuit design Latch, Flip-flop and Registers EEE 304 Experiment No. 07 Name Of The Experiment: Sequential circuit design Latch, Flip-flop and Registers Important: Submit your Prelab at the beginning of the lab. Prelab 1: Construct a S-R Latch and

More information

Department of Computer Science and Engineering Question Bank- Even Semester:

Department of Computer Science and Engineering Question Bank- Even Semester: Department of Computer Science and Engineering Question Bank- Even Semester: 2014-2015 CS6201& DIGITAL PRINCIPLES AND SYSTEM DESIGN (Common to IT & CSE, Regulation 2013) UNIT-I 1. Convert the following

More information

DEPARTMENT OF COMPUTER SCIENCE & ENGINEERING

DEPARTMENT OF COMPUTER SCIENCE & ENGINEERING DRONACHARYA GROUP OF INSTITUTIONS, GREATER NOIDA Affiliated to Mahamaya Technical University, Noida Approved by AICTE DEPARTMENT OF COMPUTER SCIENCE & ENGINEERING Lab Manual for Computer Organization Lab

More information

First Name Last Name November 10, 2009 CS-343 Exam 2

First Name Last Name November 10, 2009 CS-343 Exam 2 CS-343 Exam 2 Instructions: For multiple choice questions, circle the letter of the one best choice unless the question explicitly states that it might have multiple correct answers. There is no penalty

More information

CS302 Digital Logic Design Solved Objective Midterm Papers For Preparation of Midterm Exam

CS302 Digital Logic Design Solved Objective Midterm Papers For Preparation of Midterm Exam CS302 Digital Logic Design Solved Objective Midterm Papers For Preparation of Midterm Exam MIDTERM EXAMINATION Spring 2012 Question No: 1 ( Marks: 1 ) - Please choose one A SOP expression is equal to 1

More information

Laboratory 1 - Introduction to Digital Electronics and Lab Equipment (Logic Analyzers, Digital Oscilloscope, and FPGA-based Labkit)

Laboratory 1 - Introduction to Digital Electronics and Lab Equipment (Logic Analyzers, Digital Oscilloscope, and FPGA-based Labkit) Massachusetts Institute of Technology Department of Electrical Engineering and Computer Science 6. - Introductory Digital Systems Laboratory (Spring 006) Laboratory - Introduction to Digital Electronics

More information

FPGA Design. Part I - Hardware Components. Thomas Lenzi

FPGA Design. Part I - Hardware Components. Thomas Lenzi FPGA Design Part I - Hardware Components Thomas Lenzi Approach We believe that having knowledge of the hardware components that compose an FPGA allow for better firmware design. Being able to visualise

More information

Synchronous Sequential Logic

Synchronous Sequential Logic Synchronous Sequential Logic Ranga Rodrigo August 2, 2009 1 Behavioral Modeling Behavioral modeling represents digital circuits at a functional and algorithmic level. It is used mostly to describe sequential

More information

SEQUENTIAL LOGIC. Satish Chandra Assistant Professor Department of Physics P P N College, Kanpur

SEQUENTIAL LOGIC. Satish Chandra Assistant Professor Department of Physics P P N College, Kanpur SEQUENTIAL LOGIC Satish Chandra Assistant Professor Department of Physics P P N College, Kanpur www.satish0402.weebly.com OSCILLATORS Oscillators is an amplifier which derives its input from output. Oscillators

More information

Digital Design, Kyung Hee Univ. Chapter 5. Synchronous Sequential Logic

Digital Design, Kyung Hee Univ. Chapter 5. Synchronous Sequential Logic Chapter 5. Synchronous Sequential Logic 1 5.1 Introduction Electronic products: ability to send, receive, store, retrieve, and process information in binary format Dependence on past values of inputs Sequential

More information

CHAPTER 1 LATCHES & FLIP-FLOPS

CHAPTER 1 LATCHES & FLIP-FLOPS CHAPTER 1 LATCHES & FLIP-FLOPS 1 Outcome After learning this chapter, student should be able to; Recognize the difference between latches and flipflops Analyze the operation of the flip flop Draw the output

More information

REPEAT EXAMINATIONS 2002

REPEAT EXAMINATIONS 2002 REPEAT EXAMINATIONS 2002 EE101 Digital Electronics Solutions Question 1. An engine has 4 fail-safe sensors. The engine should keep running unless any of the following conditions arise: o If sensor 2 is

More information