ADC Channel Scan with Software PSoC 3 / PSoC 5

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Donna Boone
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ADC Channel Scan with Software PSoC 3 / PSoC 5 Project Objective This project demonstrates how to multiplex analog signals to the ADC and display the results on the LCD.

This document illustrates three channels multiplexing. These channels are connected to two voltage digital-to-analog converters (VDAC) and a potentiometer on the Development Kit.

1 ADC Channel Scan with Software PSoC 3 / PSoC 5 Project Objective This project demonstrates how to multiplex analog signals to the ADC and display the results on the LCD. Overview In many situations, the ADC must measure more than one signal. In this design, the analog multiplexer (AMUX) component from PSoC Creator multiplexes the ADC channels. This document illustrates three channels multiplexing. These channels are connected to two voltage digital-to-analog converters (VDAC) and a potentiometer on the Development Kit. The channel is switched in the software after every end of conversion (EOC) of the ADC. The project scans the channels continuously and displays the results on the LCD. Top Design The following figure illustrates how the project multiplexes the analog signals to the ADC and displays the results on the LCD.

3 V and 5 v), the ADC module has two resister dividers (Vdda/4 and Vdda/3) to derive the internal ADC reference from the supply voltage.

2 Component Configuration ADC_DelSig The ADC internal reference should be between 0.9 and 1.3 V for proper operation. To support radiometric measurement, the ADC module provides an option to generate the reference from the supply voltage (Vdda). To cater to wide supply range (3.3 V and 5 v), the ADC module has two resister dividers (Vdda/4 and Vdda/3) to derive the internal ADC reference from the supply voltage. In PSoC Creator, you must specify the supply voltage in the System tab in Design-Wide-Resources (shown in the following figure) to automatically select the appropriate reference setting. The ADC customizer shows the selected reference, as shown in the previous figure. For example, when 3.3 v is selected, the ADC module uses Vdda/3 (1.1 v) for internal reference. When 5.0 v is selected, the ADC module uses Vdda/4 (1.25 v) for internal reference. Note Because PSoC 3 ES2 silicon and PSoC 5 silicon does not have the Vdda/3 option to generate the internal reference, do not use 3.3 v for radiometric measurement (Vssa to Vdda reference). You must use multi-sample mode when the ADC input switches between multiple signals. Multi-sample mode resets the modulator and flushes out data in decimation filters between each sample automatically. Previous

3 samples do not affect the current conversion. Note that the sample rate of multi-sample mode is one-fourth the sample rate of continuous conversion. AMuxSeq VDAC8_Ch1

4 Operation The analog multiplexer for the sequential channel switching (AMuxSeq) component in PSoC Creator multiplexes the channels to the ADC input. This is software mux, and the channel switching is done in firmware after every end of conversion (EOC) of the ADC. The ADC stops after every EOC, and it restarts after the channel is switched. This reduces crosstalk between channels. Because the multiplexing is done in firmware, the scanning rate is determined by the CPU speed. Time required for one scan = Time to execute the following lines of code + ADC conversion time + Interrupt latency. This project demonstrates three-channel multiplexing. The three analog input channels are converted sequentially and displayed on the LCD in the same order along with channel numbers. Channel 1 is connected to VDAC8_Ch1 output, Channel 2 is connected to the potentiometer, and Channel 3 is connected to VDAC8_Ch3 output. The following code snippet shows continuous scanning of channels: /* The ADC stops after every conversion. This is to reduce the crosstalk between channels */ ADC_DelSig_StopConvert (); /* Connect next channel */ AMuxSeq_Next(); /* Get the ADC result for the present channel */ adc_value[ch_index]=adc_delsig_getresult8(); /* Increment the channel ch_index for the next channel*/ ch_index=(ch_index+1)%3; /* Start the ADC after the channel is switched */ ADC_DelSig_StartConvert(); Hardware Connections The project is tested with PSoC Development Kit CY8CKIT-001. For more information, refer to the PSoC Development Kit Board Guide, provided with the kit. Place the Character LCD on P18 of the DVK. Power the LCD by placing the jumper J12 in the ON position. Connect the potentiometer output VR to the pin P0[2]. Power the potentiometer by placing the jumper J11. Connect switch SW1 on the DVK to pin P0[0]. Connect switch SW2 on the DVK to pin P1[2]. Set switch SW3 to 5 V.

5 Output Use the device selector window (Project > Device Selector) in PSoC Creator to select the appropriate device and device revision. If you are using a PSoC 3 device with production revision (such as CY8C3866AXI-040), use the following selection. Similarly, select an appropriate device number to work with the PSoC 5 device family (such as CY8C5588AXI-060) Note For engineering samples, device revision is marked on the package as part of the device number. Production silicon does not have ES marking. Build the project and program the device. The three analog input channels are converted sequentially and displayed on the LCD in the same order along with the channel numbers. Channel 1 is connected to VDAC8_Ch1 output, Channel 2 is connected to the potentiometer, and Channel 3 is connected to VDAC8_Ch3 output. Press SW1 to increase VDAC8_Ch1 output; observe the corresponding change in the channel value on the LCD display. VDAC8_Ch1 voltage is observed at the pin P0[1] (Pin_Ch1). Vary the potentiometer output; observe the corresponding change in the channel value on the LCD display. Press SW2 to increase VDAC8_Ch3 output; observe the corresponding change in the channel value on the LCD display. VDAC8_Ch3 voltage is observed at the pin P0[4] (Pin_Ch3). Note The delta-sigma ADC is inherently a differential ADC and single-ended mode is implemented by connecting the negative input to ground. You may observe a large count when the input is closer to 0 V due to offset. For a more detailed explanation, see EP56170: Getting started with the Delta Sigma ADC PSoC 3 / PSoC 5.

Software Analog Video Inputs

Software Analog Video Inputs Software FG-38-II has signed drivers for 32-bit and 64-bit Microsoft Windows. The standard interfaces such as Microsoft Video for Windows / WDM and Twain are supported to use third party video software.