STV6414A Audio/video switch matrix Features Description

Transcription

1 STV644A Audio/video switch matrix Features I²C bus control Standby mode with interrupt signal output Video section 3 CVBS inputs, 2 CVBS outputs 3 Y/C inputs, 2 Y/C outputs Switchable LPFs (low pass filters) on 6 inputs 6 db gain on all CVBS/Y and C outputs Integrated 5 Ω buffers 2 RGB/FB inputs, tri-state RGB/FB output with 6 db adjustable gain (from +3 db to +9 db) Video muting on all outputs 2 slow blanking inputs/outputs Sync bottom clamp on all CVBS/Y and RGB inputs, average clamp on C inputs SVHS switch on C VCR output Bandwidth: 5 MHz Crosstalk: 5 db minimum Audio section 3 stereo inputs, 3 stereo outputs Stereo-to-mono sound capability /6/9 db selectable gain on one stereo input Full range volume control with soft control Audio muting on all outputs Description The STV644A is a highly integrated I²C buscontrolled audio and video switch matrix, optimized for use in digital set-top box applications. It provides the audio and video routings required in a two SCART set-top box design. In an LQFP64 (.4 mm) package, the STV644A is compatible with the STV643. Table. Device summary Order code Packaging STV644AD STV644ADT LQFP64 (.4 mm) (Low-profile Quad Flat Package) Marking: STV644ADT Tray Tape and reel June 28 Rev /

2 Contents STV644A Contents General information I/O pin description Electrical characteristics Latch-up data Recommended operating conditions Audio section characteristics Video section characteristics Chroma section characteristics Blanking section I²C bus characteristics I²C bus selection I²C bus addresses Input/output groups Application diagram Package mechanical data Lead-free packaging Revision history /32

3 STV644A General information 3/32 General information Figure. STV644A pinout diagram FBOUT_TV NC VDD NC SCL SDA GND IT_OUT SLB_TV R/CIN_VCR SLB_VCR GIN_VCR VCC2 BIN_VCR LOUT_TV NC NC NC VCCB 5 BOUT_TV VCCB 4 GOUT_TV GNDB R/COUT_TV VCCB 3 Y/CVBSOUT_TV VCCB 2 COUT_VCR VCCB Y/CVBSOUT_VCR ROUT_TV VCCAO LOUT_VCR ROUT_VCR LOUT_CINCH ROUT_CINCH NC GNDA VCCA RIN_TV LIN_TV CVBSIN_TV RIN_VCR LIN_VCR Y/CVBSIN_VCR GND DECA NC BIN_ENC LIN_ENC GIN_ENC RIN_ENC R/CIN_ENC NC CIN_ENC NC YIN_ENC GND Y/CVBSIN_ENC DECV NC VCC STV644A FBIN_VCR FBIN_ENC

4 General information STV644A. I/O pin description Table 2. I/O pin description Pin No. Name Function VCC +5 V Supply 2 NC Not connected 3 DECV Video decoupling capacitor 4 Y/CVBSIN_ENC Y/CVBS input from encoder 5 GND Ground 6 YIN_ENC Y input from encoder 7 NC Not connected 8 CIN_ENC Chroma input from encoder 9 NC Not connected R/CIN_ENC Red/Chroma input from encoder RIN_ENC Audio right, input from encoder 2 GIN_ENC Green input from encoder 3 LIN_ENC Audio left, input from encoder 4 BIN_ENC Blue input from encoder 5 NC Not connected 6 DECA Audio decoupling capacitor 7 GND Ground 8 Y/CVBSIN_VCR Y/CVBS input from VCR SCART 9 LIN_VCR Audio left, input from VCR SCART 2 RIN_VCR Audio right, input from VCR SCART 2 CVBSIN_TV CVBS input from TV SCART 22 LIN_TV Audio left, input from TV SCART 23 RIN_TV Audio right, input from TV SCART 24 VCCA (see Figure 2) 9V audio supply voltage output if VCCAO is used as 2V supply voltage input or 9V audio supply voltage input, VCCAO must be used as 9V supply voltage input 25 GNDA Audio ground 26 NC Not connected 27 ROUT_CINCH Audio right output to CINCH 28 LOUT_CINCH Audio left output to CINCH 29 ROUT_VCR Audio right output to VCR SCART 3 LOUT_VCR Audio left output to VCR SCART 4/32

5 STV644A General information Table 2. I/O pin description (continued) Pin No. Name Function 3 VCCAO (see Figure 2) 2V supply voltage input, VCCA is regulated 9V output for decoupling or 9v Supply Voltage input, VCCA must be used as 9V supply voltage input. 32 ROUT_TV Audio right output to TV SCART 33 LOUT_TV Audio left output to TV SCART 34 NC Not connected 35 NC Not connected 36 NC Not connected 37 VCCB5 Video output buffer supply pin 38 BOUT_TV Blue output to TV SCART 39 VCCB4 Video output buffer supply pin 4 GOUT_TV Green output to TV SCART 4 GNDB Video buffer ground 42 R/COUT_TV Red/Chroma output to TV SCART 43 VCCB3 Video output buffer supply pin 44 Y/CVBSOUT_TV Y/CVBS output to TV SCART 45 VCCB2 Video output buffer supply pin 46 COUT_VCR Chroma output to VCR SCART 47 VCCB Video output buffer supply pin 48 Y/CVBSOUT_VCR Y/CVBS output to VCR SCART 49 FBOUT_TV Fast blanking output to TV SCART 5 FBIN_VCR Fast blanking input from VCR SCART 5 FBIN_ENC Fast blanking input from encoder 52 NC Not connected 53 VDD +5 V I²C supply 54 NC Not connected 55 SCL I²C bus clock 56 SDA I²C bus data 57 GND Ground digital 58 IT_OUT Interrupt output 59 SLB_TV Slow blanking input/output from TV SCART 6 R/CIN_VCR Red input (or C Input) from VCR SCART 6 SLB_VCR Slow blanking input/output from VCR SCART 62 GIN_VCR Green input from VCR SCART 5/32

6 General information STV644A Table 2. I/O pin description (continued) Pin No. Name Function 63 VCC2 +2 V supply 64 BIN_VCR Blue input from VCR SCART Figure 2. Power supply configuration STV644A STV644A 63 VCC2 9 volt output 2V 3 VCCAO VCCA 24 9V 3 VCCAO VCCA 24 9 volt input Audio ground Audio ground In applications where a 2 volt supply from slow blanking is used to derive the internal audio 9 Volt supply voltage, the VCCAO pin must be connected to the 2 volt supply as shown in the example. The VCCA pin will show the regulated 9 volt audio supply voltage which must be decoupled by capacitors. In applications having a dedicated audio supply voltage, the VCCAO pin must be connected together with the VCCA pin to the audio supply as shown in the example. The VCCA pin acts as power supply input for the internal audio block. 6/32

7 STV644A General information Figure 3. STV644A block diagram FBIN_ENC FBIN_VCR FBIN_ENC FBIN_VCR FBOUT_TV FB Switch BIN_ENC BIN_VCR GIN_ENC GIN_VCR R/CIN_ENC R/CIN_VCR CIN_ENC LPF LPF LPF LPF BIN_ENC BIN_VCR Mute GIN_ENC GIN_VCR Mute R/CIN_ENC R/CIN_VCR Mute R/CIN_VCR CIN_ENC R/CIN_ENC Mute RGB Switch 3 to 9 db 3 to 9 db 3 to 9 db 6 db R/C Switch Tri-State BOUT_TV GOUT_TV R/COUT_TV C Switch Y/CVBSIN_VCR YIN_ENC LPF Y/CVBSIN_VCR YIN_ENC Y/CVBSIN_ENC Mute 6 db Y/CVBSOUT_TV Y/CVBS Switch Y/CVBSIN_ENC LPF Mute CIN_ENC R/CIN_ENC Mute 6 db COUT_VCR CVBSIN_TV CVBSIN_TV Y_ENC Y/CVBSIN_ENC Mute C Switch 6 db Slow Blanking Monitor Interrupt Signal IT_OUT SLB_TV SLB_VCR Y/CVBSOUT_VCR Y/CVBS Switch LIN_ENC LIN_TV RIN_ENC /6/9 db /6/9 db LIN_ENC LIN_TV Mute RIN_ENC RIN_TV Mute VCR Switch Stereo/Mono /6 db LOUT_VCR ROUT_VCR ROUT_CINCH RIN_TV LIN_VCR RIN_VCR LIN_ENC LIN_VCR LIN_TV Mute RIN_ENC RIN_VCR RIN_TV Mute TV Switch -62 db /6 db -62 db /6 db /6 db Stereo/Mono I²C Bus Decoder LOUT_CINCH LOUT_TV ROUT_TV SDA SCL 7/32

8 General information STV644A Figure 4. STV644A functional diagram STV644A Audio L Audio R CINCH Output R/C G B Fast Blanking CVBS RGB and FB Switches R/C G B Fast Blanking SCART TV Audio L Audio R CVBS/Y Audio L Audio R Slow Blanking CVBS/Y Switches CVBS/Y C Audio L Audio R Y Encoder Chroma Switches R/C G B Micro Interrupt Audio Switches Slow Blanking I/O Control Fast Blanking CVBS/Y Audio L Audio R CVBS/Y C Audio L SCART2 VCR Audio R Slow Blanking 8/32

9 STV644A Electrical characteristics 2 Electrical characteristics Table 3. Absolute maximum ratings Symbol Parameter Value Unit V CC2 Supply voltage for slow blanking sections 3.2 V V CCAO Supply voltage for audio drivers 3.2 V V CCA Supply voltage for digital audio sections V V DD Supply voltage for digital sections 6 V V CC, V CCBI Supply voltage for video sections 6 V V IN Input voltage at pin (in reference to GND) Audio pins Video pins Bus pins Slow Blanking pins, V CCA, V CC or V CCBI V, 5.5, V CC2 V ESD Maximum ESD Voltage allowed. (human body model: pf capacitor discharged through.5 kohm serial resistor) ±4 kv Table 4. Thermal data Symbol Parameter Value Unit R thja Maximum junction-to-ambient thermal resistance 58 C/W T STG Storage temperature -2, +5 C T OPER Operating free air temperature range to +7 C T j Maximum junction temperature 5 C 2. Latch-up data At an ambient temperature of 25 C, all pins meet the following specifications: I trigger = 2 ma or I trigger = -2 ma. 2.2 Recommended operating conditions T AMB = 25 C, V CCAO = 2 V, V CC = 5 V, V CC2 = 2 V, V DD = 5 V, R LOUTA = kω, R LOUTV = 5 Ω (unless otherwise specified) Table 5. Recommended operating conditions Symbol Parameter Test conditions Min Typ Max Unit Supply voltages V DD Digital supply voltage V V CCAO Audio operating supply voltage - Decoupling capacitor on V CCA.2 - Connected to V CCA V 9/32

10 Electrical characteristics STV644A Table 5. Recommended operating conditions (continued) Symbol Parameter Test conditions Min Typ Max Unit V CC Video operating supply voltage V V CC2 Slow blanking control supply voltage V Active mode (all channels ON) I DD Digital supply current V DD = 5 V 6 ma I CCA Audio supply current V CCAO = 2 V, no load 8 5 ma I CCV Total video supply current (V CC +V CCB +V CCB2 +V CCB3 +V CC B4 +V CCB5 ) V CC = 5 V, no load, LPF OFF V CC = 5 V, no load, LPF ON V CC = 5 V, with load, LPF OFF V CC = 5 V, with load, LPF ON ma I CC2 2 V supply current V CC2 = 2 V SLB input mode SLB output mode, no load 3 4 ma Standby mode (all channels OFF + LPF OFF) I DD Digital supply current V DD = 5 V 6 ma I CCAstd Audio supply current V CCA = 2 V, no load 3 ma I CCVstd Total video supply current V CC = 5 V ma 2.3 Audio section characteristics T AMB = 25 C, V CCAO = 2 V, V CC = 5 V, V CC2 = 2 V, V DD = 5 V, R GA = 6 Ω, R LOUTA = kω, R GV = 5 Ω, R LOUTV = 5 Ω, unless otherwise specified. Table 6. Audio section characteristics Symbol Parameter Test conditions Min Typ Max Unit SVR SVRK Supply voltage rejection Supply voltage rejection V RIPPLE = 5 mv RMS at Hz, Gain= db DECA filter cap = 47 µf DECA filter cap = 22 µf V RIPPLE = 5 mv RMS at khz, Gain = db db 7 8 db V INDC Input DC level 3.2 V V INAC Input signal amplitude 2 V RMS R IN Input resistance 3 5 kω R INmatch Input resistance matching ±2 ± % F RANGE Bandwidth -3 db,.5 V RMS, R LOAD = kω, Gain = db 5 khz Flatness Spread of gain in audio band -.5 V RMS, 2 Hz to 2 khz, Gain = db.5 db /32

11 STV644A Electrical characteristics Table 6. Audio section characteristics (continued) Symbol Parameter Test conditions Min Typ Max Unit CS Channel separation, from audio inputs Between L & R of TV outputs V IN =.5V RMS at khz on one input, R LOAD = kω, Gain = db db db Ci Channel isolation from video inputs V IN = V PP at 5 khz on one point 85 db V OUT Output DC level V CCA = 9 V V CCA/2 V V OFF DC offset change Switching between inputs ±5 mv R OUT Output resistance 6 2 W PHD ASN eni G Phase difference S/N ratio Equivalent rms input voltage noise db gain V RMS input on each input channel at khz V IN = V RMS at khz input weighted CCIR quasi peak, Gain = db BW = 2 Hz, 2 khz Flat, Gain = db.5 V RMS, R LOAD = kω, Gain = db 3 deg db 5 µv db G STEP Gain step -62 db to +6 db (see Figure 5) 2 db G MATCH G MATCH2 THD THD6 THD9 Gain matching between different inputs of one output Gain matching between left/right outputs of one input channel Total harmonic distortion ENC Input at db ENC Input at 6 db ENC Input at 9 db V IN =.5 V RMS at khz, Gain = db V IN =.5 V RMS at khz, Gain = db V OUT =.5 V RMS at khz, LPF at 8 khz, Volume level adjustment = db db db V CL Output clipping level THD =.2%, khz V RMS R L Output load resistance V IN = V RMS, THD =.3%, Gain = db % kω Mute Mute suppression V IN =.5 V RMS, on one point -9 db /32

12 Electrical characteristics STV644A Figure 5. Volume control characteristics ±.5 db 8 3 Step Number -36 ±.5 db -62 db + 2 db -.5 db 2.4 Video section characteristics T AMB =25 C, V CCAO = 2 V, V CC = 5 V, V CC2 = 2 V, V DD = 5 V, R LOUTA = kω, R LOUTV = 5 Ω, unless otherwise specified. Table 7. Video characteristics Symbol Parameter Test conditions Min Typ Max Unit V DCIN DC input level Bottom sync pulse 2 V I CLAMP Clamping current at V DCIN - 4 mv 2 ma I LEAK Input leakage current V IN = V DCIN + V µa C IN Input capacitance 2 pf V IN Max input signal V CC = 5 V.5 V PP DYN Dynamic output signal V CC = 5 V 3 V PP BW Flatness Bandwidth at -3 db - Y/CVBS - RGB Spread of gain in video band (5 khz - 2 MHz) - Y/CVBS - RGB Input without low pass filter V IN = V PP V IN = V PP V INC = muted Input without low pass filter V IN = V PP V IN = V PP, V INC = muted 5 5 +/-.5 +/-.5 BW LPF Low pass filter bandwidth at -3dB V IN = V PP, CL=pF 7.5 Mhz ATT Low pass filter attenuation 27 MHz db MHz db 2/32

13 STV644A Electrical characteristics Table 7. CTi CTo Crosstalk isolation between input channel Crosstalk Isolation between output channel V IN = V PP at 4.43 MHz on one point V IN = V PP at f = 4.43 MHz, on one point, R LOAD = 5Ω 6 db 5 db R OUT Output resistance 5 Ω G RGB Gain at RGB outputs V IN = V pp, gain = 6 db db G RGBM Gain matching between R, G, B V IN = V pp, gain = 6 db db G RGBSTEP Step of gain 3 db to 6 db db G YCVBS Gain on Y,/CVBS channels V IN = V PP db G YCVBSM Gain matching between Y, CVBS inputs V IN = V PP db DC OUT DC output voltage Bottom sync pulse.6 V DPHI Differential phase V IN = V PP at 4.43 MHz 5 deg. DG Differential gain V IN = V PP at 4.43 MHz 5 % Mute Video characteristics (continued) Symbol Parameter Test conditions Min Typ Max Unit Mute suppression V IN = V PP at 5 MHz on one point -55 db LNL Luminance non-linearity.3 3 % VSN Video S/N Ratio Refer to note below 65 db Note: S/N = 2 log (V OUT black to white =.7 V PP / V Noise (mv RMS ) weighted CCIR 567). 2.5 Chroma section characteristics T AMB =25 C, V CCAO = 2 V, V CC = 5 V, V CC2 = 2 V, V DD = 5 V, R LOUTA = kω, R LOUTV = 5 Ω, unless otherwise specified. Table 8. Chroma section characteristics Symbol Parameter Test conditions Min Typ Max Unit V DCIN DC input level 3 V R IN Input resistance 3 5 kω C IN Input capacitance 2 pf V IN Max input signal.5 V PP DYN Dynamic output signal 3 V PP DC OUT DC output VCR voltage 2.2 V CBW Chroma bandwidth C IN = V PP at -3 db 5 MHz CTi Crosstalk isolation between input channel V IN = V PP at 4.43 MHz on one input 55 db 3/32

14 Electrical characteristics STV644A Table 8. CTo Crosstalk isolation between output channel V IN = V PP at 4.43 MHz on one input, R LOAD = 5 Ω 5 db R OUT Output resistance 5 W G OUTC Gain at OUTC V IN = V pp db G CM Mute CToYdel Z COUT_V CR Chroma section characteristics (continued) Symbol Parameter Test conditions Min Typ Max Unit Gain matching between C inputs Mute suppression Chroma to luma delay, source Y/C Output impedance when switched to ground V IN = V PP db V IN = V PP at 4.43 MHz on one input 55 db V PP at 4.43 MHz 2 ns 2.7V applied to COUT_VCR with series 75Ω Resistor 2 W 2.6 Blanking section T AMB =25 C, V CCAO = 2 V, V CC = 5 V, V CC2 = 2 V, V DD = 5 V, R LOUTA = kω, R LOUTV = 5 Ω, unless otherwise specified. Table 9. Slow blanking section Symbol Parameter Test conditions Min Typ Max Unit Input mode SLBlow Input low level threshold V SLBhigh Input high level threshold V I IN Input current 5 µa Output mode SLBlow Output low level (int. TV).2.5 V SLBmed Output medium level (ext. 6/9) V SLBhigh Output high level (ext. 4/3) 2 V Table. Fast blanking section Symbol Parameter Test conditions Min Typ Max Unit Input mode FBlow/high Input low/high level threshold V I IN Input current 2 µa Output mode FB LOW Output Low Level.5 V R LOAD = 5 Ω FB HIGH Output High Level V 4/32

15 STV644A Electrical characteristics Table. Fast blanking section (continued) Symbol Parameter Test conditions Min Typ Max Unit FB DEL Fast Blanking RGB delay At 5% on digital RGB transients, at 2 V on FB rise transient, at V on FB fall, C LOAD = pf maximum 5 ns FB TRANS FB Transitions at FB output Rise Time Fall Time C LOAD = pf maximum between % and 9% between 9% and % ns ns Table. Interrupt output Symbol Parameter Test conditions Min Typ Max Unit IT-Leak High level leakage External pull-up to 5 V µa IT-Low Output low level (active) I IN = ma I IN = ma.3.7 V V Note: The interrupt is forced low when a change is detected on slow blanking inputs. It can be used in standby mode to wake up the microprocessor. It is released when the I²C bus register is read. Table 2. Address selection input Symbol Parameter Test conditions Min Typ Max Unit ADDsel_ L ADDsel_ H Address selection low level.2 V Address selection high level 2.5 V DD V I LEAK Leakage current µa 5/32

16 Electrical characteristics STV644A 2.7 I²C bus characteristics T AMB = 25 C, V CCAO = 2 V, V CC = 5 V, V CC2 = 2 V, V DD = 5 V, R LOUTA = kω, R LOUTV = 5Ω, unless otherwise specified. Table 3. I 2 C bus characteristics Symbol Parameter Test conditions Min Typ Max Unit SCL V IL Low level input voltage V V IH High level input voltage V I LI Input leakage current V IN = to 5.5 V - µa f SCL Clock frequency 4 khz t R Input rise time.5 V to 3 V µs t F Input fall time.5 V to 3 V 3 ns C I Input capacitance pf SDA V IL Low level input voltage V V IH High level input voltage V I LI Input leakage current V IN = to 5.5 V - µa C I Input capacitance pf t R Input rise time.5 V to 3 V µs t F Input fall time 3 V to.5 V 3 ns V OL Low level output voltage I OL = 3 ma.4 V t F Output fall time 3 V to.5 V 25 ns C L Load capacitance 4 pf Timing: SCL frequency = 4 khz t LOW Clock low period.3 µs t HIGH clock high period.6 µs t SU,DAT Data setup time ns t HD,DAT Data hold time 34 ns t SU,STO Setup Time from clock high to stop.6 µs t BUF Start setup time following a stop.3 µs t HD,STA Start hold time.6 µs t SU,STA Start setup time following clock low to high transition.6 µs 6/32

17 STV644A Electrical characteristics Figure 6. I²C bus timing SDA t BUF tlow t F SCL t HD,STA tr t HD,DAT t HIGH t SU,DAT SDA (start, stop) t SU,STA t SU,STO 7/32

18 I²C bus selection STV644A 3 I²C bus selection Data transfers follow the usual I²C format; that is, after the start condition (S), a 7-bit slave address is sent, followed by an eight-bit data direction bit (W). An 8-bit sub-address is sent to select a register, followed by an 8-bit data word to be included in the register. The IC s I²C bus decoder enables the automatic incrementation mode in write mode. The circuit operates at clock frequencies of up to 4 khz. Table 4. String format Write only mode (S = Start condition, P = Stop condition, A = Acknowledge) S SLAVE ADDRESS A SUB-ADDRESS A DATA A P Table 5. Read only mode S SLAVE ADDRESS A DATA A P Table 6. Slave address Address A6 A5 A4 A3 A2 A A Value Table 7. Auto increment mode S SLAVE ADDRESS A SUB-ADDRESS A DATA A DATA A... DATAn A P Sub-Address Sub-Address + Sub-Address + N 3. I²C bus addresses Write Address: = 96(hex), Read Address: = 97(hex) Table 8. Reg add (hex) Input signal summary (write mode) Data d7 d6 d5 d4 d3 d2 d d Audio h TV Stereo Mono TV /6dB TV Volume-62dB to db - 2dB steps Soft Volume Mode h VCR Stereo Mono Not Used (See Note) VCR Audio Switch Control CINCH Audio Gain TV/CINCH Audio Switch Control Video 8/32

19 STV644A I²C bus selection Table 8. Reg add (hex) Input signal summary (write mode) (continued) Data d7 d6 d5 d4 d3 d2 d d 2h 3h Miscellaneous VCR chroma muted RGB and FB tri-state VCR video and chroma switch control RGB gain 4h IT enable SLB mode LPF enable 5h VCR slow blanking TV slow blanking Standby 6h Not used (see Note) TV outputs CINCH outputs VCR-C output control VCR outputs TV chroma muted RGB switch control TV video and chroma switch control Not used (see Note) ENC audio input gain /6/9 db Not used (see Note) TV inputs Fast blanking mode/input selection Not used (see Note) VCR R/C sub clamp VCR inputs TV R or C output selection ENC R/C sub clamp ENC inputs Note: At register address 6h, bits marked Not used must be set to. All other bits from all other registers marked Not used must be set to. Table 9. TV audio output Reg add (hex) Description Bits Data d7 d6 d5 d4 d3 d2 d d Comments Soft volume change Active Disabled h Level adjustment 5 6 db extra gain db -62 db (-2 db/step) db +6 db TV stereo or mono mode = stereo = mono 9/32

20 I²C bus selection STV644A Table 2. Reg add (hex) Audio selection and VCR audio output Data Description Bits d7 d6 d5 d4 d3 d2 d d Comments h TV & CINCH audio output selection CINCH audio gain 3 Muted Encoder L/R selected VCR L/R selected Not allowed TV L/R selected Not allowed Not allowed Not allowed db Follow TV gain VCR audio output selection 2 Muted Encoder L/R selected TV L/R selected Not allowed VCR stereo or mono mode = stereo = mono 2/32

21 STV644A I²C bus selection Table 2. Reg add (hex) TV and VCR video selection Data Description Bits d7 d6 d5 d4 d3 d2 d d Comments TV video output selection 3 Y/CVBS muted & chroma muted Y/CVBS_ENC & R/C_ENC Y_ENC & C_ENC Y/CVBS_VCR & R/C_VCR Not allowed Not allowed Not allowed Not allowed 2h TV chroma output control VCR video output selection 3 Chroma defined by d2dd Chroma force to mute Y/CVBS muted & chroma muted Y/CVBS_ENC & R/C_ENC Y_ENC & C_ENC CVBS_TV & chroma muted Not allowed Not allowed Not allowed Not allowed VCR chroma output control Chroma defined by d6d5d4 Chroma force to mute 2/32

22 I²C bus selection STV644A Table 22. Reg add (hex) RGB and fast blanking outputs Data Description Bits d7 d6 d5 d4 d3 d2 d d Comments Fast blanking control 2 FB forced to low level FB forced to high level FB from Encoder FB from VCR RGB selection 2 Muted RGB_ENC selected RGB_VCR selected Not allowed 3h RGB gain 2 +6 db gain +5 db gain +4 db gain +3 db gain + db extra gain +3 db for weak input signals RGB and FB control RGB and FB outputs high impedance state RGB and FB outputs active Table 23. Miscellaneous control Reg add (hex) Description Bits Data d7 d6 d5 d4 d3 d2 d d Comments 4h R/C TV output selection Not used 2 Not used C_VCR output control 2 Low pass filters control Slow blanking mode IT enable Red signal selected Chroma signal selected Grounded Tri-state mode (high impedance) Active LPF enabled LPF disabled Normal mode SLB TV is driven by SLB VCR No iterrupt flag IT enable 22/32

23 STV644A I²C bus selection Table 24. Reg add (hex) Slow blanking and inputs control Data Description Bits d7 d6 d5 d4 d3 d2 d d Comments Encoder R/Csub clamp Bottom level clamp Average level clamp VCR R/Csub clamp Bottom level clamp Average level clamp 5h Encoder input level adjustment 2 db for normal audio inputs +6 db for weak audio inputs +9 db for weak audio inputs Slow blanking TV SCART 2 Input mode only Output < 2 V Output 6/9 format Output 4/3 format Slow blanking VCR SCART 2 Input mode only Output < 2 V Output 6/9 format Output 4/3 format 23/32

24 I²C bus selection STV644A Table 25. Standby modes Reg add (hex) Description Bits Data d7 d6 d5 d4 d3 d2 d d Comments 6h ENC inputs VCR inputs TV inputs VCR outputs CINCH outputs TV outputs Full stop Inputs active Inputs disabled Inputs active Inputs disabled Inputs active Inputs disabled Audio & video outputs ON Audio & video outputs OFF Audio & video outputs ON Audio & video outputs OFF Audio & video outputs ON Audio & video outputs OFF Only I²C bus and slow blanking detection parts are supplied. Table 26. Reg add (hex) Output signals (read mode) Data Description Bits d7 d6 d5 d4 d3 d2 d d Comments Slow blanking TV SCART 2 Input < 2 V Input 6/9 format Input 4/3 format Slow banking VCR SCART 2 Input < 2 V Input 6/9 format Input 4/3 format Interrupt flag No change since read One change has been detected (refer to Note) Note: The interrupt flag will be cleared when this register is read. To prepare for a new interrupt, a must be re-written in the IT Enable bit (Reg. 4, d7). 24/32

25 STV644A Input/output groups 4 Input/output groups Figure 7. Bottom clamped video inputs (pins 2, 4, 6, 2, 4, 8, 2, 62, and 64) Figure 8. Average clamped video inputs (pin 8) V CC 5V V CC 5V V CC 5V V CC 5V I B 2V + V D 25 kω 25 kω 3V 5 kω tri tri Protected pad Protected pad Figure 9. R/C clamped video inputs (pins and 6) Figure. Fast blanking output (pin 49) V CCB 5V V CC 5V R/C inputs may be configured either as a bottom clamped input or as an average clamped input. In either case, the simplified input schematic is very close to one of the graphics shown above. Protected pad Figure. Fast blanking inputs (pins 5 and 5) Figure 2. Video outputs (pins 36, 38, 4, 42, 44, 46, and 48) V CCB, V V CC 5V V DD 5V ib tri Protected Pad Protected pad Protected pad 25/32

26 Input/output groups STV644A Figure 3. Audio inputs (pins 7, 9, 3, 9, 2, 22, and 23) Figure 4. Audio outputs (pins 27, 28, 29, 3, 32, 33, and 35) 2 V I2 V 9kΩ 2kΩ 8kΩ 3 kω 24 kω 24 kω I B 32 kω Protected pad V REF Protected pad Figure 5. Slow blanking I/O (pins 59 and 6) Figure 6. Interrupt output (pin 58) 2 V V DD 5V Float 4 Ω kω 55 kω Protected pad Protected pad Figure 7. Trap filter (pin 34) Figure 8. I²C bus (SDA) (Pin 56) V CCB5 5V V CC 5V V DD 5V Float kω Ω kω Protected pad Protected pad 26/32

27 STV644A Input/output groups Figure 9. I²C bus (ADD) (pin 54) Figure 2. I²C bus (SCL) (pin 55) V DD 5V Float V DD 5V Float kω kω Protected pad Protected pad Figure 2. Power supply connection V CC B V CC B2 V CC B3 V CC B4 V CC B5 V CC V CC A V CC A V CC V DD 5V V V 5V 2 V 3 2 V 24 2 V 63 2 V 5V 53 5V GNDB GNDV GNDref GNDA GND 27/32

28 Application diagram STV644A 5 Application diagram Note: Figure 22. The application diagram presented here is an example only and is subject to change without notice. The real application diagram will depend on application conditions and constraints. STV644A application diagram STV644A B 28/32

29 STV644A Package mechanical data 6 Package mechanical data Figure pin, LQFP64 (low-profile quad flat package) x x.4 mm Seating plane Pin identification Gage plane Table 27. LQFP64 package dimensions Millimeters Inches Dimension Minimum Typical Maximum Minimum Typical Maximum A.6.63 A A b c ccc.8.3 D D D E E /32

30 Package mechanical data STV644A Table 27. LQFP64 package dimensions (continued) Millimeters Inches Dimension Minimum Typical Maximum Minimum Typical Maximum E e.5.9 L L..39 Degrees K minimum 3.5 typical 7 maximum 6. Lead-free packaging To meet environmental requirements, ST offers these devices in ECOPACK packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: 3/32

31 STV644A Revision history Revision history Table 28. Document revision history Date Revision Changes 26-Jun-28 Initial release 3/32

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