Display power analysis and design guidelines to reduce power consumption

Transcription

1 Journal of Information Display ISSN: (Print) (Online) Journal homepage: Display power analysis and design guidelines to reduce power consumption Joseph Issa To cite this article: Joseph Issa (2012) Display power analysis and design guidelines to reduce power consumption, Journal of Information Display, 13:4, , DOI: / To link to this article: Copyright Taylor and Francis Group, LLC Published online: 03 Dec Submit your article to this journal Article views: 173 View related articles Full Terms & Conditions of access and use can be found at Download by: [ ] Date: 19 December 2017, At: 05:03

2 Journal of Information Display Vol. 13, No. 4, December 2012, Display power analysis and design guidelines to reduce power consumption Joseph Issa Department of Computer Engineering, Santa Clara University, Santa Clara, CA, USA (Received 22 August 2012; Revised 8 October 2012; Accepted for publication 16 October 2012) Cold cathode fluorescent lamps (CCFLs) are used to provide lighting for liquid crystal displays (LCDs). This paper presents a set of guidelines for measurement characterization and design to reduce the power consumption of CCFL LCD backlight inverters and panel electronics. The proposed methods aim to reduce the backlight power consumption by fine-tuning a backlight inverter for a specific LCD, using several methods. First, the authors describe their power measurement methodology; and next, they identify different areas for tuning a backlight inverter for a given display. The experiment results showed that power savings can range from 50 to 200 mw if the backlight inverter is properly tuned. This paper also proposes an optimized configuration for light-emitting device (LED) panels to reduce power loss by selecting a LED with a specific input voltage and number of cells to help minimize power loss. Keywords: display power; power analysis; LED display; CCFL display; backlight inverter power 1. Introduction In recent years, liquid crystal display (LCD) panels have formed the fastest-growing market in displays. LCDs are used in several lighting applications and different displays. Reducing the display power consumption for mobile devices is essential to achieving extended battery life [1]. Reducing power will enable designers to add more platform and processor features in mobile platforms, since battery life is often a bottleneck that prevents the addition of features. Display devices consume the most power in any mobile platform, especially when it is operated at maximum brightness levels. On average, a display unit can consume up to 30% power on a given platform, and this may increase if the backlight inverter is not tuned for a given panel. Literature [2 8] proposes several methods of improving the cold cathode fluorescent lamp (CCFL) backlight to increase its efficiency. In this paper, power optimization for CCFL backlight inverters at 60 nits (cd/m 2 ), which is considered an acceptable working luminance level when running the mobile platform on the battery mode, is focused on. The specific focus of this research is to optimize the backlight inverter power without additional costs. Several features can be enabled in a mobile platform to reduce the display power consumption, but these features would have an added cost. These features include the Display Power Savings Technology (DPST) of ambient light sensors (ALS) and Intel. Other technologies add a new white sub-pixel, using red, green, blue, and white instead of the traditional RGB. The white sub-pixel provides more brightness, so the white sub-pixel enhances the display. This technology reduces the power consumption of the LCD display but increases the LCD costs because special software drivers and hardware are required to utilize the white sub-pixel. Several published papers have addressed the optimization of the CCFL power consumption. Cheng et al. [9] presented a CCFL backlight power optimization method that reduces the backlight illumination while retaining the image quality. The authors LCD CCFL design guidelines focus on fine-tuning existing backlight inverters by improving their power efficiency and minimizing their power loss. Section 2 starts with a review of the display power characteristics and a description of the authors power measurement methodology. In Section 3, detailed design guidelines are provided to reduce the power consumption of backlight inverters. In Section 4, the experiment results for the tuned and non-tuned backlight inverters are reviewed. In Section 5, a power-loss analysis for light-emitting device (LED) displays is performed. The conclusion is presented in Section Display power overview and measurement methodology The display subsystem uses a significant portion of the total power consumed by an average mobile platform. Among the various components and subsystems of a mobile PC, the display subsystem is by far the largest consumer of power. As new display technologies are developed with reduced jissa@scu.edu ISSN print/issn online 2012 The Korean Information Display Society

3 168 J. Issa Figure 1. Mobile platform: average power distribution. power consumption, it becomes absolutely imperative for the display subsystem to consume less and less power and to keep pace with the downtrend in the power consumption of the overall platform. The display power accounts for about 1/3 of the total mobile platform power on most mobile platforms, as shown in Figure 1. A typical equation defines the battery life in this way. Battery Life Input Power Capacity (W h) = Average Platform Power Consumption (W). (1) The battery life increases when the input power capacity increases or when the average platform power consumption decreases. The total display power is defined as follows: Display Subsystem power = Panel Electronics power + Inverter power. (2) Reducing the display subsystem power is essential to extending the battery life of a platform. LCD panels are used in various applications that range from small portable equipment to larger displays. This research focuses on a backlight inverter for a notebook computer LCD. The LCD itself cannot emit light; therefore, a backlight system that supplies the light is required. The backlight system consists of a LED, a conductor panel that distributes the light uniformly across the entire LCD surface, and a power supply for the LED. The most commonly used LED is the CCFL, a fluorescent tube. A CCFL requires a high AC voltage (typically 600 V RMS ) for normal operation, and can require a current of 2 6 ma RMS, depending on the brightness level. Before its normal operation, a CCFL requires a much higher AC voltage (typically 1600 V RMS ) to ignite and induce current flow. This is known as the ignition or striking voltage. The output AC lamp current and the AC voltage waveforms must be as sinusoidal as possible to reduce ElectroMagnetic Interference (EMI)/Radio Frequency Interference (RFI) emissions. In general, good sinusoidal output waveforms result in good electrical-to-light conversion efficiency. In most applications, the power supply provides a DC voltage, and a high-efficiency DC AC inverter is required to drive the CCFL. The inverter must also provide a dimming control scheme for the adjustment of the panel brightness. To select the proper inverter unit, it is necessary to understand the features of the CCFL specs (i.e. the load of the inverter). In this paper, the goals and technical strategies for tuning inverters to given CCFL requirements are outlined, based on LCD specs, to achieve low-power and high-efficiency inverters. LED panels currently account for about 80% of the total market share of mobile display panels. These LED panels are mostly small panels that are used in tablets and other mobile devices. CCFL panels account for the other 20% of the market, focusing on larger panels that are used for notebook and high-end mobile segment (15 and 17 ) LCD panels. The power distribution in a given LCD is divided into two parts: the backlight power consumption (which accounts for about two-thirds of the total LCD power consumption) and the display power of the panel electronics (which uses the remaining one-third of the total display power consumption). In the measurement experiment in this study, a mosaic pattern was used to measure the power consumption of the panel electronics, as specified in the VESA specs [10], compared to SPWG specs [11]. The backlight power consumption was measured at different luminance levels (cd/m 2 or nits) for CCFLs and LEDs from various vendors Measurement setup Panel electronics measurement setup The total power of an LCD panel has two parts: that of the panel electronics and that of the panel backlight. The panel electronics includes all the circuitry that drives the image to the screen of the notebook computer. The power of the panel electronics is strongly influenced by the pattern displayed on the screen. The panel backlight in a notebook computer with a transmissive display typically includes an inverter and a CCFL. The backlight power is strongly influenced by the lamp luminance. The total panel power equals the sum of the panel electronics power and the panel backlight power at a particular pattern and luminance setting. For the panel electronics, an Intel 855GM chipset was used, which provided two sense resistors through which the LCD panel power could be measured one for the panel electronics and one for the backlight. A Fluke NetDaq [12] logger was used to measure the current as the voltage dropped across the sense resistor, and the voltage as the voltage dropped from the power rail to the ground. Ohm s law was applied to the sense resistor. Since measuring +V3.3S_LVDS to groud (GND) determines the voltage V for the panel electronics, the power is easily determined by automatically calculating P = IV with the NetDaq Logger software. The power of the panel electronics was strongly influenced by the pattern displayed on the screen. A standardized mosaic pattern was used, as shown in Figure 2, which was provided by the VESA specs. In Figure 3, the power of the panel electronics is shown for different color patterns, including a mosaic pattern, using a 14.1 XGA panel. The two extreme power data points were

4 Journal of Information Display 169 Figure 2. Mosaic pattern used to measure the panel electronics. marked with white and black. White consumes the least amount of power, and the backlight consumes the maximum power. Thus, the mosaic chessboard pattern represents the midpoint of the black and white power. Figure 3 shows the black power pattern measured at 1.23 W, the white power pattern measured at 0.82 W, and the mosaic power pattern measured at 1.05 W. To estimate the power and battery life of the platform, MobileMark of BapCo was used. Since the power consumption of the panel electronics depends on the displayed pattern, the average power consumed by the panel electronics for 90 min was measured. For the 14.1 XGA panel, the average panel electronics consumed 1.01 W, which was very similar to that measured with the mosaic, full-screen pattern, at 1.05 W. For other panels, the average power consumed by the various patterns was also very close to the power consumed by the mosaic, full-screen pattern. As a result, the mosaic, full-screen measurement was used to estimate the power of the panel electronics Backlight power measurement setup The backlight power of the LCD panel subsystem depends on the lamp luminance. A full white screen was used so that the backlight power and luminance could be simultaneously measured for each of the luminance settings. For example, a 14.1 XGA panel with a luminance of 60 nits consumed approximately 2.46 W. The panel electronics for varying luminance measurements consumed 0.82 W, since these measurements were all taken with a full white background, in accordance with the VESA specs. Thus, to measure changes in the brightness setting, the settling of the lamp was awaited, after which the average of the power over time and the luminance were measured using a Topcon BM7A photometer [13] at the center of the display. Often, the brightness-level settings did not allow exactly 60 nits. In such cases, linear approximation was done using the two points closest to 60 nits (e.g. 46 nits (2.16 W) and 64 nits (2.55 W)). This was how 2.46 W was determined for the backlight at 60 nits. Once the power of the panel electronics was measured under different patterns and the panel backlight was measured under certain luminance settings, the total panel power for a specific level and pattern was easily extracted. The point of comparison was the power consumption of the LCD panel at 60 nits when the mosaic pattern was used. Using this example, the panel electronics consumed 1.00 W of power for the mosaic pattern, and the panel backlight for 60 nits consumed 2.46 W of power. Therefore, the panel consumed 3.46 W of power. For each screen brightness setting, there was a 10-min settling period; and at the end of that period, the luminance was instantaneously measured. The power of the panel backlight was measured as the average over the last 5 min of the settling period. The Topcon photometer was placed at a fixed distance from the display screen in a dark ambient room to eliminate other sources of light. The meter was set at the A2 aperture and positioned 500 mm from the screen, as shown in Figure 4. Figure 3. Power distribution of the panel electronics for different patterns.

5 170 J. Issa Figure 4. Topcon photometer measurement setup Inverter efficiency measurement The inverter efficiency was measured by setting the panel to the maximum luminance, then measuring the output of the AC current and the AC voltage. The output cold current was measured using a Fluke 187 multimeter (RMS measurement) in a series, with a cold wire connected from the inverter to the panel, and this measurement was repeated for all the lower luminance settings. The hot current was measured using a Tektronix probe P6022 connected to an oscilloscope for the measurement of the high-frequency AC current. The switch probe was set to 1 ma/1 mv so that the mv reading was the ma for the output AC measured current. To measure the output AC voltage, a voltage probe was used, which can measure up to 2000 V. The following inverter efficiency equation was used: wherein P out P in = V out(ac) I out (AC) V in (DC) I in (DC) 100, (3) I out (AC) = I out(ac)@hot + I out (AC)@cold. (4) 2 Figure 5 shows the backlight power for different LCD and LED panels at different luminance levels. A mobile LCD, when running on battery mode, will operate at a 60-nits luminance level, the default level for most mobile device displays operating in battery mode. There was a constant shift in power, with respect to luminance, that varied between different panel sizes and how well the backlight inverter was optimized for the panel being tested. All the backlight power curves of the measured LCDs can be curve-fitted using a second-degree polynomial equation as a function of the luminance. Almost all the tested LCD panels achieved maximum brightness, with a backlight power consumption that ranged from 4.5 to 5.5 W, depending on the panel size. It was noticed that the power consumption of some of the panels that was measured as between 3.0 and 1.5 W at 60 nits revealed some room for power optimization at this luminance level. The optical efficiency was calculated in nits/watt units for a given luminance level, as shown in Figure 6. The point of interest was at a 60-nits luminance level for both the electrical and optical efficiencies. Figure 5. Backlight power of CCFL and LED panels (in watts) ranging from the maximum luminance to 60 nits. Figure 6. Optical efficiency curve for different panel sizes. 3. Backlight inverter design guidelines The brightness and the electrical characteristics of the CCFL change depending on the ambient temperature. Specific CCFL characteristics, such as their length and diameter, as well as the type and pressure of the gas, will also affect these electrical characteristics. Therefore, it is necessary to check the characteristics of the specific CCFL. The discharge starts when electrons and positive ions, which are accelerated by the high electric field, collide with the surface of the cathode and emit secondary electrons. After the initial discharge starts, a lower voltage is required to maintain the discharge. The CCFL emits ultraviolet light due to the ejection of the secondary electrons. This ultraviolet light strikes the fluorescent material painted on the tube surface and emits visible light. The typical CCFL diameter is 2 3 mm, and the length varies from about 50 to 280 mm, depending on the size of the LCD panel. The discharge starts when a high voltage of about 1600 V RMS is applied between both electrodes of the CCFL. This voltage is known as the discharge starting voltage, the startup voltage, or the ignition voltage. When the current flows through the CCFL, the impedance of the tube decreases and the voltage between the electrodes of the CCFL drops fast. When the current flows to a certain level, the decline of the voltage stops and the CCFL shows an almost constant voltage characteristic, as seen in Figure 7. At this time, the voltage is called the CCFL voltage, and

6 Journal of Information Display 171 Figure 7. Figure 8. CCFL voltage vs. current. Parameters used to characterize the inverter power. is approximately V RMS, depending on the type of CCFL. The ignition voltage of the CCFL tends to be higher under the following conditions: When the ambient temperature is low; When the CCFL is long; and When the diameter of the cold cathode tube is small. The starting voltage and the maximum lamp current form the primary parameters that determine the end of life of a CCFL tube and, therefore, the usefulness of the LCD module. If a voltage less than the minimum starting voltage is applied to the tube, the tube will not light up. The ignition voltage for the CCFL varies with the CCFL length, diameter, module package, and temperature. The ignition time can be defined by the following relationship: T (s) = design cost C, (5) wherein C is the charge capacitance (uf) and the design cost is a constant associated with a specific LCD design. The capacitor should be fixed if the lamp operates under normal conditions Fundamental operation of the cold cathode tube To design an inverter that will match a given CCFL electrical requirement, the basic theory of the operation of a CCFL must be understood. Seven parameters form the outside black box of an inverter (Figure 8). The typical inverter parameters are summarized as follows: The input voltage (V in ) is defined as the input DC voltage to the inverter. The input current (I in ) is defined as the input DC current to the inverter. The output voltage (V out ) is the CCFL AC voltage between the electrodes after the discharge has started. The current (I out ) is the output AC current (6.0 ma maximum luminance). The open voltage (V open ) is the voltage needed to start the CCFL discharge. The equivalent load resistance (RL) is the equivalent resistance obtained by dividing the CCFL voltage by the CCFL cold current (I out ). The operating frequency (f ) is the frequency used when the CCFL is driven by an alternating current (50 70 khz). The dimming control (pulse width modulation (PWM)) supports a wide range of luminance adjustments to achieve a 500:3 dimming ratio (100 10% adjustment). The design of a CCFL inverter should consider important variables such as the output AC current and voltage, input voltage, leakage capacitance of the LCD, and DC/AC transformer parameters. An ideal inverter design should take into consideration the following features: Support of a wide dimming range with a 500:3 dimming ratio (PWM dimming control); Controller for high-voltage DC/DC and DC/AC converters; Wide range of input voltage applications (5 21 V); Built-in intelligence to manage the ignition and normal operation of the CCFL; Built-in over-voltage and open-lamp protection; Zero-voltage switching (high efficiency with full bridge topology); Ability to be tuned to match the CCFL electrical requirements by adjusting the RLC values; Constant frequency design to eliminate interference with the LCD display; and Support for the minimum and maximum current specifications for different dimming ranges (500 3 nits). The backlight inverter presents a cascaded energy attenuator to the battery, as shown in Figure 9. Battery energy is lost in the electrical-to-electrical conversion to the high-voltage AC that drives the CCFL. This section of the energy attenuator has the most efficient conversion efficiencies; most inverters can exceed 85%. The CCFL has losses that exceed 80%. In addition, the optical transmission efficiency of current displays is below 10% for monochromes with lower color types. This paper focuses on electrical-to-electrical and electrical-to-optical efficiency optimization CCFL display panel design guidelines for power optimization Figure 10 shows the distribution of panel electronics and backlight power for a typical CCFL LCD 12.1 XGA panel.

7 172 J. Issa Figure 12. Typical inverter topology for a direct drive. Figure 9. Backlight LCD display that presents a cascaded energy attenuator to the battery. Figure 10. Total LCD power distribution that shows backlight power and panel electronics power, using a mosaic pattern. Figure 11. Several opportunities to reduce power consumption with an optimized inverter design. To optimize CCFL LCD panel power, specific design guidelines for the backlight inverter are focused on, as shown in Figure 11. These guidelines include the following points: (1) Electrical efficiency; (2) Transformer optimization; (3) Operating frequency; (4) CCFL-to- Bezel parasitic; (5) DC/AC transformer optimization; and (6) Dimming Electrical-to-electrical efficiency The electrical efficiency of a backlight inverter measures the electrical input vs. the output power of the converter without regard to the optical performance. This task involves consideration of the component selection (Metal Oxide Semiconductor Field-Effect Transistor (MOSFETs), magnetic transformer, etc.) and the operating frequency. In this paper, the direct-drive topology was used, as shown in Figure 11, for the primary of the transformer that was driven directly from the controller. A voltage regulator controller is used to provide drive power sequentially to the two MOSFETs. The primary of the transformer is driven with a half-bridge configuration. Since it was a direct-drive topology, the lamp frequency was the same as that of the power MOSFETs. This made it very simple for the authors to tune it to the optimal lamp frequency. Another benefit of this technique is its lower turn ratio. Instead of using the maximum strike voltage in the worst-case scenario, this topology uses the lamp operating voltage. To provide a higher strike voltage, the frequency of the drive is initially increased. This effect is similar to that of a higher strike voltage, which makes it possible to ignite the lamp without a high turn ratio (Figure 12) Transformer optimization Inverter transformers generate a CCFL current and voltage waveforms. Thus, transformer fine-tuning is required for a symmetrical CCFL current and voltage waveforms. The transformer can be fine-tuned by adjusting the operating frequency and the primary and secondary turn ratios for a given LCD/CCFL requirement, as described in detail in the following section. A critical parameter of the transformer is the leakage inductance, which is used to generate a sinusoidal drive for the CCFL. The following typical transformer values are commonly used for 14.0 XGA, 15.0 XGA, and 15.4 WXGA panels. Larger or smaller LCD sizes require different ratings. Inverter designers should review the power rating for a transformer for any given application. They should check for two critical transformer parameters: the primary and secondary turns, as defined by Faraday s law: N p = V in T on, (6) B A e wherein: N p is the minimum number of primary turns, V in is the input DC voltage (V ), and T on is the on time of the N-channel Metal Oxide Semiconductor (NMOS), which is

8 Journal of Information Display 173 defined as Duty Cycle T on (us) = Operating Frequency, (7) wherein B is the core flux density (T ) and A e is the crosssectional area of the core where the flux flows (mm 2 ). The secondary turns are chosen to meet the secondary RMS voltage, which is 650 V for most applications. The following equations show the relationship between N s, N p, V RMS, and V in : N s = V RMS N p, (8) V in wherein V RMS is the operating output voltage, and V in is the input DC nominal voltage. The lamp voltage (V RMS ) is determined by the CCFL specs, using the following rearranged equation to calculate V RMS in terms of N s, N p and V in : Figure 13. Power loss in MOSFET. V RMS = N s V in. (9) N p For a given LCD/CCFL requirement, the required operating voltage is 650 V RMS. It also requires a striking voltage of 1500 V RMS. The transformer s secondary-to-primary turns ratio must consider the highest strike voltage and the minimum V dc voltage MOSFET selection (conducting vs. switching loss) The most important variable in MOSFET selection is choosing a low R DS ON (MOSFET drain-to-source on resistance). This also depends on the loading characteristics, input voltage, and switching frequency. The R DS ON is usually within the m range. A very low R DS ON MOSFET may have a bigger gate capacitance, which will cause switching loss. The ideal MOSFET has a low R DS ON and low gate capacitance. Another consideration in MOSFET is the conduction loss vs. the switching loss. The total power loss in MOSFET, as shown in Figure 13, is the sum of the power loss in the conduction, the power loss in the diode, and the power loss in the switching. The power lost in conduction is directly related to R DS ON. A typical example of power loss in MOSFET is P (conduction) = 32 mw, P (diode) = 24 mw, and P (switching) = 10 mw. Notice that P (conduction) is much higher than P (switching), since R DS ON contributes to this factor Backlight inverter operating frequency CCFL lamp specifications have requirements with regard to the output frequency of the inverter. These requirements can range from <40 khz to >90 khz. The frequency of the voltage and the current applied to and through the tube can play a major role in the compatibility of the tube and the display, and between the graphic engine and the graphic information displayed on the LCD. The waveforms (for both the current and the voltage) not only affect the performance of Figure 14. Output frequency with respect to brightness. the tube, but also generate unacceptable radiated electrical noise. Although the DC-to-AC inverter produces a pure sine wave, the dynamic nature of the CCFL tube distorts both the output current and the output voltage. The operating frequency is inversely proportional to Rs and Cbal. Thus, by selecting the Rs and Cbal component values, an operating frequency can be tuned to match the CCFL requirements. A typical operating frequency ranges from 60 to 65 khz to achieve maximum brightness, as shown in Figure 14. There are trade-offs for designing around each end of the spectrum, as shown in Figure 15. At each end of the spectrum, the lamp brightness is lower than at the midpoint. Therefore, the optimum solution is the midpoint frequency, which ranges from 60 to 65 khz for most 15.0, 15.4, and 17 CCFLs. For a typical backlight inverter, the operating frequency should be set by selecting the R and C component values to satisfy the following equation: Operating Frequency = R(k ) C(pF). (10) By selecting the R and C values for a given panel, a pure sine wave can be achieved by eliminating the reflection from the panel load, which will result in optimized backlight power consumption.

9 174 J. Issa A good lighting system design must minimize the parasitic flow, which will save mw of power. Thus, minimizing these paths is essential for efficiency. Figure 15. Figure 16. Tuned inverter for power efficiency and brightness. Current path flow for a typical LCD panel CCFL-to-Bezel parasitic Placing the lamp in a display introduces a pronounced electrical loading effect. The parasitic capacitance to the AC ground from any point between the power supply output and the lamp creates a path for undesired current flow. Similarly, stray coupling from any point along the lamp s length to the AC ground induces a parasitic current flow. The full parasitic current flow is wasted, which causes the circuit to produce more energy to maintain the desired current flow in the lamp. At lower luminance levels (i.e. minimum dimming), the parasitic flow will steer the lamp current from the lamp, which will cause the lamp to starve and may cause flickering. The high-voltage path from the transformer to the display housing should be as short as possible to minimize losses. The length of the high-voltage wire within the housing must be minimized, particularly for displays that use metal. A high voltage must be applied to the shortest wire(s) in the display, which may require disassembling the display to verify the wire s length and layout. Another loss source is the reflective foil that is commonly used around lamps to direct light into the actual LCD. Some foil materials absorb much greater field energy than others, which causes power loss. As the operating frequency increases (as the panel is loaded), the display s parasitic capacitance diverts progressively greater energy, which lowers the lamp current, as shown in Figures 16 and Output current The output current is essential to determining the LCD life. It is controlled by the inverter, and it must be tuned precisely to match the display LCD specifications for improved efficiency. For example, if the minimum life of an LCD is 50,000 h at a 6 ma output current, it will drop to 30,000 h if the output current is increased to 7 ma (only 1 ma higher than the required specifications). The output current was evaluated with a special probe (Tektronix s P6088A) to measure the hot and cold currents that flow from the inverter to the CCFL. The probe was a non-contact current probe. All the output currents and voltages were set to read the RMS values with an oscilloscope. The output current of a CCFL (i.e. 6 ma for maximum luminance) is inversely proportional to that of a control resistor. For example, I = 3000/R and R = 500, => I (ma) = 6 ma Backlight dimming There are two dimming methods: Linear dimming or dimming by reducing the lamp current, or the analog approach, and PWM dimming, or the digital approach. Linear dimming adjusts the lamp luminance by reducing the lamp current. The lamp stays on all the time, but it operates at a lower current. Linear dimming does not provide a wide dimming range (i.e. 100%, 50%, 20%, and 10%). Furthermore, it does not perform very well because the voltage current relationship of a CCFL does not follow Ohm s law. The lamp impedance increases almost inversely with the lamp current. Therefore, at a low lamp current, the lamp impedance becomes very high. For example, when a lamp is operating at 5% of its normal current to achieve 20:1 dimming, the lamp impedance increases about 20 times and reaches k. As a result, a portion of the current that would normally flow through the lamp leaks away through the stray capacitance. For the PWM dimming method shown in Figure 18, the lamp current is pulse-widthmodulated at a repetition rate that is high enough to prevent screen flicker. Within each PWM cycle, the lamps are turned fully on for a fraction of the cycle time. 4. Experiment results for backlight inverter power optimization In the previous section, it was concluded that the operating frequency could be tuned for a given LCD panel to optimize the power consumption. For this experiment, a 15 XGA LCD panel was used and its operating frequency was

10 Journal of Information Display 175 Figure 17. Loss path due to stray capacitance in a particular LCD installation. Figure 18. Simplified diagram of a PWM DC-to-AC inverter. Figure 20. Backlight power optimization for QDI 15.0 XGA, with an average of 95.6 mw of power saved at 60 nits. Figure 21. Backlight power optimization for AUO 12.1 WXGA, with mw of power saved at 60 nits. Figure 19. Backlight power optimization for 15.1 XGA with 200 mw power savings at 60 nits. adjusted by selecting correct RC values to match the optimized region of the operating frequency. The power levels showed an average of 60 mw saved at all the luminance levels, as shown in Figure 19. A QDI 15.0 XGA panel and an AUO 12.1 WXGA panel were tested for operating frequency tuning. The power saved at 60 nits was 95.6 mw for the QDI panel and mw for the AUO panel, as shown in Figures 20 and 21. The power saved at luminance levels that were above 60 nits was also found. For some panels, combining the previously discussed power optimization methods can save mw of backlight power. This allows the inverter module to achieve maximum power transfer for the CCFL. Note that each LCD has different capacitance loading results. In summary, the following five rules govern the process of matching the DC AC inverter to the CCFL: The starting voltage from the inverter must exceed the kick-off voltage;

11 176 J. Issa Figure 22. LED drivers circuit. Figure 23. (2-cell). Power loss vs. total number of LEDs at V in = 7.2 V The operating voltage must meet the requirements generated by the tube; The supply current must precisely match the tube current specifications; The operating frequency must be compatible with the tube and LCD requirements; and The waveforms must experience minimum distortion from the tube. 5. LED power analysis The market share of LED-based displays is dominated by handheld and netbook systems, but CCFL panels still have a cost advantage over LED panels. LEDs are driven by LED drivers. Drivers generally do not consume much power and have no scope for great optimizations, unlike CCFL panels. LED power depends on the LED efficiency, wherein less power and more luminance is the key. Nevertheless, the power usage of LED panels can be improved via LED backlight topology optimization. Integrated circuit costs increase with higher-voltage processes and greater die sizes, package sizes, and numbers of pins. The cost of the external components such as the ceramic caps and schottky diodes increases along with the voltage ratings, as shown in Figure 22. The proposed design has a few disadvantages. For example, it requires a bigger package due to its additional circuitry and more complex current-matching circuitry. It also has the advantages, however, of a lower-voltage-rated IC, a wider range, and better noise dimming than typical LED driver designs. The key to power optimization topology is optimizing the total number of LED counts per string (known as variable n) and total string counts (known as variable m), as shown in Figure 22. Power loss simulations for z = n m LEDs at different input voltages (V in ) and different numbers of cells are shown in Figures In this analysis, the total number of LEDs was determined by n m, wherein m is the number of parallel strings and n is the number of LEDs in a series. Figure 24. (3-cell). Figure 25. (4-cell). Power loss vs. total number of LEDs at V in = 10.8 V Power loss vs. total number of LEDs at V in = 14.4 V In Table 1, the boldface numbers represent the buck boost topology required to accommodate the input voltage of 2 4 cells, with around 50 mw power added over that in pure buck or boost conversion. For 8 12 total strings with lower power consumption, the other string count will add mw of power. To optimize the power consumption of LED displays in mobile devices, designers must select the input voltage, number of cells, and n m combinations of the LED in a way that minimizes the power loss. To optimize the power of LED displays, an 8 12 total string count is considered an optimized design for the application

12 Journal of Information Display 177 Table 1. LED power for different strings and input voltages. V in (V) 6CH Pd (W) 8CH Pd (W) 12CH Pd (W) 16CH Pd (W) 7.2 (2-cell) (3-cell) (4-cell) Note: The boldface values represent the buck boost topology required to accommodate the input voltage of 2 4 cells, with around 50 mw power added over that in pure buck or boost conversion. of 48 and 60 total LEDs in a 13 -to15 -segment backlight LED panel. From a cost standpoint, more strings always increase the driver IC cost; and increasing the number of strings from 6 to 12 increases the cost by 77.5% (around $0.3). 6. Conclusion In this paper, a detailed power measurement methodology and a power characterization for different CCFL- and LED-based panels were presented. Several design guidelines were also proposed to reduce the power consumption of a CCFL backlight inverter. The design guidelines do not increase existing costs and require no special drivers or additional hardware. As shown in the experiment results section, tuning the operating frequency by selecting the right RC values can result in up to 200 mw power savings. If all other proposed design guidelines are combined, up to 300 mw of power can be saved. For LED-based displays, designers must select a LED with a specific input voltage, number of cells, and n m combinations to minimize the power loss. An 8 12 total string count is considered an optimized design for a 48- and 60-total LED application in 13 -to 15 -segment backlight LED panels. Other display features can help reduce power consumption. Intel has developed a power savings feature known as the DPST that dynamically enhances the displayed image and correspondingly decreases the backlight brightness. This feature is implemented in different Intel chipsets, using both software and hardware. Another feature that reduces the display power is the ALS, which automatically adjusts the backlight power to compensate for changes in the viewing environment. Manufacturers usually set the backlight power nits lower because they know that ALS will increase the backlight power when needed. References [1] EBLWG: Mobile PC Extended Battery Life Working Group. [2] Y.-H. Tsai, US Patent No. 6,459,216 (1 October 2002). [3] B.K. Kates and J. Cummings, US Patent No. 6,130,509 (10 October, 2001). [4] T.-F. Wu, Y.-C. Wu and Z.-Y. Su, IEEE Trans. Ind. Appl. 5, (2001). [5] T.-F. Wu, T.-H. Yu and M.-C. Chiang, IEEE Trans. Power Electron. 2, (1998). [6] A. Konno, Y. Yamamoto and T. Inuzuka, Society of Information Display 36 (1), (May 2005). [7] Y.C. Chiand, W.H. Lin and K. Chou, US Patent No. 6,420,839 (20 May, 2002). [8] W.-H. Lin, C.-Y. Chen and D.-K. Chang, U.S. Patent No. 6,534,934 B1 (7 March, 2003). [9] W.C. Cheng, Y. Huo and M. Pedram, Design, Automation and Test in Europe Conference and Exhibition (Vienna, Austria, 2004). [10] Vesa. [11] SPWG. [12] Fluke Instruments. [13] Topcon Meter. bright/bm_7a.html.