Tools to Debug Dead Boards

Transcription

1 Tools to Debug Dead Boards Hardware Prototype Bring-up Ryan Jones Senior Application Engineer Corelis 1 Boundary-Scan Without Boundaries click to start the show

2 Webinar Outline What is a Dead Board? Prototype Bring-up & Debug Cycle Existing Tools Corelis Structural & Emulation Tools Case Study Complex TI Based Target 2 Boundary-Scan Without Boundaries

3 What is a Dead Board? Dead generally refers to a board that does not respond, initialize or power-up to an expected state. Failure modes can typically be broken down into two categories: hardware and software. HARDWARE FAULTS SOFTWARE FAULTS Power Related Fault Structural Fault Device Fault Timing Problem Buggy Code Memory Initialization Stack Overflow Self Modifying Code 3 Boundary-Scan Without Boundaries

4 Prototype Bring-Up Cycle Finished Assembly Visual Inspection Smoke Voltage Boot-Up Debug DEAD BOARD Visually check correct component installation Verify no shorts on power rails to ground Apply current-limited power to the board, ensure nothing gets hot, verify voltage levels Load basic boot code and functional code to verify CPU and peripheral operation 4 Boundary-Scan Without Boundaries

5 Engineering Toolbox There are many tools that can assist in the debug process Having the most efficient tool for the job saves engineering time Knowing which tool to use at the right time is key Multi-Meter Oscilloscope Logic Analyzer Bus Analyzer Real-Time Trace Debugger In-Circuit Emulator 5 Boundary-Scan Without Boundaries

6 Corelis Toolbox Structural Emulation Voltage Structural Emulation Boot-Up Corelis directly replaces many traditional debug tools by providing automated test generation and low level diagnostic information saving valuable engineering time and effort Structural testing identifies physical faults such as broken circuit traces, solder bridges and cold solder joints Emulation testing verifies DSP operation and exercises peripheral interfaces at intended design speeds 6 Boundary-Scan Without Boundaries

7 JTAG Architecture Structural Main Building Blocks of a JTAG Device JTAG Interface Pins Data Registers Instruction Register TAP Controller 7 Boundary-Scan Without Boundaries

8 JTAG Scan-Chain Structural TI DSP Core Logic Core Logic Bypass Register Bypass Register Bypass Register Instruction Register Instruction Register Instruction Register TAP Controller TAP Controller TAP Controller TDI TCK TMS TDO 8 Boundary-Scan Without Boundaries

9 JTAG Vectors Structural 9 Boundary-Scan Without Boundaries

10 JTAG Benefits Structural JTAG provides the capability to test interconnects on a PC-board without physical test probes or test fixtures Does not require the board to be in a bootable state for fault diagnostics JTAG allows In-System Programming of devices such as Flash, CPLDs, FPGAs and Serial EEPROMs 10 Boundary-Scan Without Boundaries

11 JTAG Advantages Structural Automatic test generation removes engineers from having to create elaborate test cases Fast test times Net/Pin level diagnostics JTAG helps identify board problems up front meaning general purpose tools like oscilloscopes and voltage meters are used less vectors can be reused in production 11 Boundary-Scan Without Boundaries

12 JTAG Emulation Emulation JET uses a DSP s JTAG debug port to perform: DSP initialization At-speed functional testing of DSP peripherals (memory, I/O) In-System-Programming (ISP) of flash devices JTAG ScanExpress JET Software Loop back RS-232 RS-232 TI DSP SMbus JTAG EEProm FPGAs Functional test, debug, and ISP System Bus JTAG Interface Flash SRAM DDR SDRAM D/A A/D Blackhawk Controller Loop back 12 Boundary-Scan Without Boundaries

13 JET Benefits Emulation Does not require the board to be in a bootable state for fault diagnostics Embedded tests are downloaded and run from on-chip DSP memory at-speed Provides testability on all DSP addressable components by exercising their functionality In-system programming at theoretical speeds reduces time waiting for code to download 13 Boundary-Scan Without Boundaries

14 JET Advantages Emulation Automated test development for DSP initialization, memory and flash Device level diagnostics Customized diagnostic messages JET rigorously exercises all external memory locations before execution of any boot code vectors can be reused in production 14 Boundary-Scan Without Boundaries

15 Combining JTAG & JET Structural Emulation Combined JTAG & JET Feature JTAG Emulation Combined Structural coverage Very good Good Excellent Functional coverage Low High High Programming (ISP) time Average Excellent Excellent time Fast Fast Fast points required Very few Very few Very few development Automatic Semi Auto Auto/Semi Diagnostics Excellent Average Excellent 15 Boundary-Scan Without Boundaries

16 JTAG & JET Fault Coverage JTAG Pin Connectivity; Noisy Signals Opens, Shorts & Stuck-At Conditions DSP Initialization Component Discovery and Identification Bad Memory Locations Flash Communication Problems Timing Problems 16 Boundary-Scan Without Boundaries

17 Case Study Complex TI Target Board includes twenty-six TI DaVinci processors Board includes other JTAG and non-jtag components JTAG components include a PowerPC CPU and two FPGAs Corelis JTAG tools are able to perform full interconnect and basic memory pin testing JET to the rescue JET emulation testing identified crosstalk and signal integrity issues on SDRAM memories that JTAG scans did not detect 17 Boundary-Scan Without Boundaries

18 Benefits of Applying Boundary-Scan for Production No need for test fixtures. Integrates product development, production test, and device programming in one tool/system. Engineering test and programming data is reused in Production. Fast test procedure development. Preproduction testing can start the next day when prototype is released to production. Dramatically reduces inventory management no preprogrammed parts eliminates device handling and ESD damage. Eliminates or reduces ICT usage time programming and screening. 18 Boundary-Scan Without Boundaries

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