Applied Materials. 200mm Tools & Process Capabilities For Next Generation MEMS. Dr Michel (Mike) Rosa

Transcription

1 Applied Materials 200mm Tools & Process Capabilities For Next Generation MEMS Dr Michel (Mike) Rosa 200mm MEMS Global Product / Marketing Manager, Components and Systems Group (CSG), Applied Global Services (AGS) Semicon Europe October, 2012

2 AGENDA Applied Materials Technology Overview MEMS Activities & Equipment 200mm DRIE Technologies For MEMS

3 The Global Strength of Applied Materials Stock Ticker: Market Cap: Fiscal 2011 Revenue: Fiscal 2011 R&D: Nasdaq: AMAT $16.8 billion $10.5 billion $1.1 billion Founded: November 10, 1967 Headquarters: Global Presence: Santa Clara, California 87 locations in 19 countries Fortune 500 Ranking: 259 RD&E and/or Manufacturing Centers: Employees: Patents: China, Germany, Israel, Italy, Singapore, Switzerland, Taiwan, United States ~14,600 worldwide ~9,500 issued * Information as of Q1 12 except FY 11 amounts Fiscal year-end October 30, 2011

4 Global Scale and Reach Massachusetts Israel Montana China California Texas India Singapore More than $1Billion invested annually in RD&E 4

5 Business Segments Semiconductor Display Energy and Environmental Solutions Applied Global Services 5

6 Continued Technology Development 200mm market growth driven by consumer electronics, automotive, industrial and medical applications LED TFB & Others Discrete Power MEMS Analog APPLIED MATERIALS Over 40 years of technology development to enable life-changing innovations * All images used with owners permission

7 MEMS - Enabling an Ecosystem Enhancing our lives Safety Functionality Inkjet Print Head Airbag Sensor Move Miniaturization Increasing adoption Pico Projector Mini Speaker ipad Smartphone Guitar Hero PlayStation Early Applications Emerging Applications Microphones Accelerometers Gyroscopes

8 Expansion of MEMS Capabilities Applied Materials Supports MEMS Production and R&D DEVELOPING NEW EQUIPMENT, MATERIALS AND PROCESSES FOR MEMS Aluminum Nitride (AlN) Thick Aluminum (Al) RF and Mechanical Applications High Power Devices Sub-Micron MEMS Working within the Global MEMS Community

9 200mm MEMS Equipment Portfolio Applied Materials is growing its 200mm MEMS portfolio

10 Advanced Deposition Processes Adding new film processes in support of MEMS ECD Metal (>100µm) Single Step ( 10µm) Low Temp SiGe Epi-Silicon ( 50µm to >100µm) SiO 2 Layer Ge Layer Al Layer Silicon Si Layer PVD AlN ( 2.5µm) (nu. << (0.5%, 6 ), (0.7%, 8 )) Thick ( 40µm) CVD SiO 2 High Dep Rate PVD Ge

11 Cutting Edge MEMS DRIE Technology MEMS Fabrication Requirements Continue To Evolve Applications like TSV or SOI for MEMS continue to drive tool improvements The evolution of MEMS device design also drives development of new fabrication equipment and capabilities Sub-Micron MEMS Higher Wafer Throughput Enhanced WIW Uniformity Enhanced Mask Selectivity Ultra Small Sidewall Scalloping

12 Latest DRIE Technologies DPS DTM DRIE Chamber for MEMS, Power Devices and TSV No In-Situ Chamber Clean allows best in class wafer throughput and extends Mean Time Between Cleans far beyond 500 RF Hrs! Tunable Source Coil Technology enables WIW etch depth and sidewall profile nu. < 2 % Hard Mask-Open Capability with dielectric etch rates approaching 1µm/min! High Speed Gas Switching enabling Bosch process with << 1sec etch and deposition times Low Temperature (-20 C) Capability for increased selectivity and sidewall profile control Pulsed High Power Low Frequency Generator eliminating undercut on SOI wafers Parameter Ramping with enhanced recipe control Steady State and Bosch Process Capable DPS DTM Chamber (Actual Photo Shown)

13 Improvements in TSV for MEMS Flexible process recipe execution for high throughput Bulk Silicon 200µm 400µm CD 200 µm Depth 400 µm Etch Rate 22 µm/min Uniformity 2.5% (M-m) Sidewall Profile 90 ±1 Sidewall Scallop 170nm * On-Wafer Results TSV Structure For MEMS * Illustration Only TSV Structure For MEMS Higher Etch Rates combined with greater Polymer Management Technology to deliver best in class throughput

14 Improvements in SOI for MEMS Variable Pulsed Bias Power provides minimized notching when landing on buried oxide layers during SOI etch applications 400 nm Silicon >15µm * On-Wafer Result Device Layer / BOX Interface Buried Oxide 1µm Silicon Handle Wafer * Illustration Only - SOI Structure For MEMS Delivering a pulsed bias power to the wafer chuck removes charge build up that occurs at the buried oxide layer interface

15 Improvements in Scallops and Undercut Process Control For The Most Demanding Requirements Mask Undercut 17nm! Sidewall Scallops 13nm! High Speed Gas Switching combined with Polymer Management Technology

16 Improvements in HAR Etch for MEMS Sub-Micron CDs for Next Generation MEMS CD ~ 0.55µm CD ~ 0.2µm CD ~ 0.4µm Depth ~ 33µm Depth ~ 15µm Depth ~ 35µm

17 Improvements in Productivity for MEMS Greater than 500RF Hours Between Dry Cleans! Lot to Lot and wafer to wafer repeatability < 3.5% RF Hr Marathon Etch Depth Etch Depth (µm) Chamber inspection RF HOURS 0 RF Hours 500 RF Hours (Wafer on ESC) Process kit: minimal deposition after 500 RF hour processing and no chamber cleans Two points at ~200hrs in the graph above as a baseline was rerun after chamber inspection.. ER increased after chamber inspection, due to atmospheric exposure 48 RF Hours 500 RF Hours Trench SEMs: Etch Depth & profile are consistent throughout the marathon

18 Improvements in Productivity for MEMS Greater than 500RF Hours Between Dry Cleans! 85 Lot-To-Lot Depth Performance Etch Depth (µm) Chamber Inspection Repeatability: Av: 72.25µm / Range 4µm RF Hours * Lot based on cassette of 25 8 wafers

19 Improvements in Productivity for MEMS Greater than 500RF Hours Between Dry Cleans! 92.0 Lot-To-Lot Sidewall Profile Performance Profile Angle ( ) Chamber Inspection Repeatability: Av: 90.5 / Range: RF Hours * Profile Angle based upon CD Measurements * Lot based on cassette of 25 8 wafers

20 DRIE for Next Generation MEMS Sub-Micron DRIE for MEMS Applications l g t Note Image taken from early development of submicron MEMS process and shows CDs and Etch Depths

21 DRIE for Next Generation MEMS Sub-Micron DRIE for MEMS Applications CD ~ 0.2 µm Shrunken die sizes Reduced die costs Increased throughput Lowered drive voltage Enhanced device performance Depth ~ 22 µm Reduced material thicknesses leading to throughput gains in other areas of wafer fab these are some of the design options enabled by a DRIE process that delivers sub-micron spacing while maintaining all other critical parameters.

22 Where To From Here? MEMS tremendous growth in the consumer market has brought considerable price and size/form-factor reduction pressure, requiring.. New Advanced Films For MEMS MEMS Process / Device Integration Thin Wafer Handling & 3D MEMS Monolithic CMOS Integration.300mm MEMS?

23 Conclusion Applied Materials currently offers DRIE, CVD, PVD, CMP, Release Etch and Metrology Tools for MEMS. Applied Materials is continuing to expand its MEMS product portfolio with the aim of providing a complete MEMS solution in support of all process technologies that are critical to MEMS development. For More information about Applied Materials MEMS product portfolio please contact Applied Materials Sales.

24