CPSC 121: Models of Computation Lab #2: Building Circuits

Transcription

1 CSC 121: Models of Computti L #2: Building Circuits Ojectives In this l, ou will get more eperience with phsicl logic circuits using The Mgic Bo. You will lso get our first eposure to Logisim, tool for simulting circuits. Aout mrking The ls in CS 121 hve stndrd mrking scheme. All ls re out of 10. Two of the mrks re for the pre-l. Si mrks re for the items mrked TODO: so, if ou complete the pre-l nd the sic l ctivities, ou will get 80%. To get 100%, there re further nlsis questis, denoted with TODO (further nlsis):. You cn dditill get us mrk for the Chllenge rolem. 1 re-l Like lst week, there re four pre-l questis for this l, which re to prepre ou for this week s l. In l this week, our TA will provide ou with two ICs. The lel oth ICs will e covered, ut the notch is visile (so ou know the orientti to plce them our redord!). One of these chips is he inverter, chip with si inverters. The other is e of: qud 2-input NAND gte, qud 2-input AND gte, qud 2-input OR gte, or qud 2-input XOR gte. Your jo is to identif these chips. Before getting to the l, ou ll need pln. Here re some hints to get ou strted. Rered Secti 4, Appendi B, nd Secti 2.1 s entr the proe in The Mgic Bo User s Mnul. Think out how ou could wire up the two mster gtes ou hve so tht ou could see which e is the inverter. And ce ou ve found the inverter, think out how ou could wire up the other gte to tell wht sort of gte it is. 1. TODO (pre-l): How will ou determine which of the two chips is the he inverter? Sketch our wiring pln nd the steps ou ll tke. 2. TODO (pre-l): Once ou ve de tht, how will ou determine which e of the qud chips ou hve? Agin, sketch our wiring pln nd our steps. 1

2 3. TODO (pre-l): If ou could revel the chips lels, how would ou verif our nswers? (We re looking for strightforwrd nswer here; no tricks. Think out wht ou hve een doing in clss!) 4. TODO (pre-l): Wh didn t we include the qud 2-input NOR gte s e of the possile qud chips? 2 Eperimenting with n Unknown Chip As ou know from the pre-l, our TA will e giving ou the two mster chips. Using our pln, wire up nd use e chip to test which chip is our inverter. Then, wire up nd use secd our qud chip to determine which of the quds it is. You hve room to keep oth circuits our redord t the sme time; so, keep them oth to demstrte to our TA s ou finish. Rememer to use pproprite power nd ground cnectis, or ou m dmge the ICs! TODO: Which e ws the he inverter? How did ou figure it out? TODO: Which qud chip did ou hve? How did ou figure it out? 3 rcticing Deugging with The Mgic Bo During this term, ou will e uilding more nd more complicted circuits. Deugging is n importnt skill in doing this, e ou will find vitl with more comple wiring. An importnt w to void lot of deugging is to test incrementll: rther thn uild everthing t ce nd then test, uild porti, test it, move to the net porti, test it, nd so. But even when ou re testing smller compent, deugging will still e necessr. Some comm issues re: improperl powering or grounding n IC 2

3 using the wrg tpe of IC roken pin n IC plcing wire in the wrg hole of the redord, or putting the IC in the wrg spot For this secti, ou nd our prtner re to find nother pir with Mgic Bo. On our Mgic Bo, pln to wire (A B) (C D) ut d t do it ectl. (An emple of doing this is in Appendi B) Intentill mke two errors in the circuit, like the es discussed ove. One cvet, however: d t intentill destro n of the l equipment. So, do not fr chips powering the ground pins, nor rek n of the pins the ICs! When oth groups re de, swp Mgic Boes. TODO: Deug ech other s circuits. Wht were the two errors in it? You re encourged to refer to the Mgic Bo User s Mnul nd the Mgic Bo Deugging Guide, oth of which our TA cn provide in pper cop. 4 Logisim 4.1 Your first simulti Log in to the Linu server using computer in the l. First, ou wnt to open up terminl (lso known s commnd prompt ). Find n ic tht looks like this, nd click it: If ou cnnot find such n ic, open up the min menu, nd find n entr clled Terminl. Once ou hve terminl open, tpe logisim nd hit the enter ke. This will run the progrm Logisim, which is the circuit simultor we will use in this clss. As seen in the imge elow, open the Help menu nd select Tutoril. 3

4 You will now get screen with the tutoril. It egins like this: TODO: Follow nd complete Steps 0 to 4 of the Logisim Tutoril. completed n XOR circuit. Show it to our TA when ou re de. B the end, ou will hve 4.2 A riorit Chin Circuit design is de much like softwre design. In code, we rek our progrms up into functis or methods: these cn then ct s self-ctined modules, which cn e reused esil. As such, modulrit is principle of good circuit design. Modules in Logisim re represented rectngles. Downlod the file priorit.circ from the CSC 121 wesite, nd open it in Logisim (File Open). You will see progrm tht hs si repeting, identicl modules wired up in chin: 4

5 Our gol with this ctivit is to edit the module to implement wht is clled priorit chin. In priorit chin, the l light tht will e turned is t the first module where is. This module of the chin is sid to hve the priorit. (We s tht stges to the left hve higher priorit thn stges to the right.) The chin lights the LED for the leftmost switch tht is in the positi, while ll other LEDs remin. Here is n emple: We see in this imge tht the first module with = TRUE hs illuminted, ut lter modules with do not. Also, note tht the first of the circuit is cnected to ground (FALSE). As such, we wnt circuit which hs the properties: is l if is nd is. is l if is or is. TODO: Fill in the module in our Logisim circuit so tht min hs working priorit chin like in the emple shown ove. To edit the module, right-click in the upper left-hnd menu (underneth min), nd select Edit Circuit Lout. You will get circuit like this: Once ou ve filled in this circuit, switch ck to the min module right-clicking it in the upper left-hnd menu nd selecting Edit Circuit Lout. Verif the priorit chin works s ou epected, nd then show it to our TA. 5

6 5 Further Anlsis TODO (further nlsis): We just showed ou circuit tht is roken up into modules nd told ou it ws good design. Wh do ou think tht is? Also, in this circuit, we fed outputs of the module into inputs of other modules hve ou seen nthing nlogous to this in progrmming? If so, wht? TODO (further nlsis): Getting to know our clssmtes will help ou succeed in this course s such, ou should lern their nmes. For this nlsis mrk, ou should e le to point out five of our clssmtes to our TA (without n written ids), identif their nmes, nd something out them. 6 End of L Surve TODO: To help us improve these ls oth this term nd for future erings, complete the surve t 7 Chllenge rolem Chllenge prolems re optil, nd re worth us mrk. If ou hve time in the l, ou should complete this eercise. TODO (chllenge): In the Logisim tutoril, ou mde circuit tht outputs n XOR vlue. Tht circuit ws mde using OR, AND nd NOT. Now mke circuit which outputs n XOR vlue using l NAND gtes. A Mrking Scheme All ls re out of ten mrks, with two mrks for pre-ls, nd eight mrks for in-l work. In more detil: Two mrks - re-l questis 6

7 Five mrks - In-l questis. Two mrks re for Secti 2. One is for Secti 3. Two re for Secti 4. Two mrks - Further nlsis. TAs m t their discreti wrd e us mrk, such s for completing the chllenge prolem. It is epected tht most students to chieve 6-8. If ou feel ou re heding for 0-4, get immedite help from the TAs! B Wiring Digrm for Smple Circuit Imgine we were designing circuit to compute (A B) (C D), we might use 74LS32 IC (two OR gtes, using pins 1 3 nd 11 13) nd 74LS08 IC (e AND gte, using pins 1 3). To prepre for wiring the phsicl circuit, we could mrk up digrm s in Figure 1. A B 74LS (A OR B) AND (C OR D) 3 C LS08 D LS32 Figure 1: A circuit computing (A B) (C D), leled with IC prt nd pin numers. As we wire the circuit, our first wired gte might look like Figure 2. In the figure, we hve wired up the OR gte for C D ccording to Figure 1: 74LS32 IC wired (1) to power with red wire (pin 14 in the upper-right, using the colour reserved for power); (2) to ground with lck wire (pin 7 in the lower-left, using the colour reserved for ground); nd (3) to the inputs nd output with green nd ellow wires (pins in the upper right, using ritrr colours tht distinguish inputs from outputs). This demstrtes the kind of creful circuit uilding methods tht cn mke our work with hrdwre smoother. Figure 2: A redord with the C D gte of (A B) (C D) wired ccording to Figure 1. 7