Description. Application. Block Diagram

Transcription

1 3.3V PCI Express Lane Exchange Switch Features ÎÎ8 Differential Channel (2-lane) Exchange ÎÎPCI Express 3.0 performance, 8.0 Gbps ÎÎBi-directional operation ÎÎLow Bit-to-Bit Skew: 10ps (between ± signals) ÎÎLow Crosstalk: 2.5GHz (5Gbps) 4.0GHz (8Gbps) ÎÎLow Insertion Loss: 2.5GHz (5Gbps) 4.0GHz (8Gbps) ÎÎV DD Operating Range: 3.3V ±10% ÎÎIndustrial Temperature Range: -40 o C to 85 o C ÎÎESD Tolerance: 2kV HBM ÎÎPackaging (Pb-free & Green): àà 42-contact, TQFN (ZH42), 3.5x9mm. àà 40-contact, TQFN (ZL40), 3x6mm. Description Diodes' is a differential exchange switch featuring pass-through pinout. It supports two full PCI Express lanes operating at 8.0Gbps PCIe 3.0 performance. With the select control input low, Port A connects to Port B, and Port C connects to port D for an 8-channel differential passthough. When the select control input is high Port A connects to Port D, and Port B connects to Port C. Application Switching 4 lanes of DP1.2 from PC/Notebook/Tablet to Display monitor Truth Table Function SEL OE# Ax = Bx Cx = Dx Ax = Dx Cx = Bx Ax, Bx, Cx, Dx = Hi-Z (disconnect) x 1 Block Diagram OE# SEL A0 A0- C0 C0- A1 A1- C1 C1- A2 A2- B0 B0- D0 D0- B1 B1- D1 D1- B2 B2- C2 C2- A3 A3- D2 D2- B3 B3- C3 C3- D3 D3-1

2 2 A product Line of Pin Diagram 42-TQFN B0 B0- D0 D0- B1 B1- D1 D1- VDD B2 B2- D2 D2- B3 B3- D3 D3- A0 A0- C0 C0- A1 A1- C1 C1- SEL A2 A2- C2 C2- A3 A3- C3 C VDD OE# VDD VDD VDD B0 B0- D0 D0- B1 B1- D1 D1- B2 B2- D2 D2- B3 B3- D3 D3- A0 A0- C0 C0- A1 A1- C1 C1- SEL A2 A2- C2 C2- A3 A3- C3 C OE# VDD VDD Pin Diagram 40-TQFN

3 Application Diagram PI3PCIE3442 OE# SEL DA0-DA3 CAB_DETA A0 A0- C0 C0- A1 A1- B0 B0- DA0-DA3 D0 D0- B1 B1- DAX or DBX AUXX, HPDX CAB_DETX DP conn A DB Monitor A DP Source A C1 C1- D1 D1- A2 A2- B2 B2- DB0-DB3 CAB_DETB AUXB, HPDB C2 C2- A3 A3- C3 C3- D2 D2- B3 B3- D3 D3- DBX or DAX AUXX, HPDX CAB_DETX DP conn B DB Monitor B DP Source B OUTB0 ENB INB OUTB1 OUTB0 OUTB1 ENB INB SBO SBI SAI SAO PI3DBS3224 SBO PI3DBS3224 SBI SAI SAO OUTA0 OUTA1 INA ENA OUTA0 OUTA1 INA ENA Generic 2 x 2 DP1.2 Switching Using (3x6mm 40 pad QFN) 3

4 Pin Description (42-TQFN) Pin # Pin Name Description A0 A0 A1 A1 A2 A2 A3 A3 B0 B0 B1 B1 B2 B2 B3 B3 C0 C0 C1 C1 C2 C2 C3 C3 D0 D0 D1 D1 D2 D2 D3 D3 Signal, Channel 0, Port A Signal, Channel 1, Port A Signal, Channel 2, Port A Signal, Channel 3, Port A Signal, Channel 0, Port B Signal, Channel 1, Port B Signal, Channel 2, Port B Signal, Channel 3, Port B Signal, Channel 0, Port C Signal, Channel 1, Port C Signal, Channel 2, Port C Signal, Channel 3, Port C Signal, Channel 0, Port D Signal, Channel 1, Port D Signal, Channel 2, Port D Signal, Channel 3, Port D 41 OE# I Output Enable, active low. When OE# = 0 the device is enabled. When OE#=1, all are high impedance 9 SEL I Operation mode Select (when SEL=0: A B, C D, when SEL=1: A D, C B) 18, 20, 30, 40, 42 V DD Pwr 3.3V ±10% Positive Supply Voltage 19, 21, 39, Center Pad Pwr Power ground 4

5 Pin Description (40-TQFN) Pin # Pin Name Description A0 A0 A1 A1 A2 A2 A3 A3 B0 B0 B1 B1 B2 B2 B3 B3 C0 C0 C1 C1 C2 C2 C3 C3 D0 D0 D1 D1 D2 D2 D3 D3 Signal, Channel 0, Port A Signal, Channel 1, Port A Signal, Channel 2, Port A Signal, Channel 3, Port A Signal, Channel 0, Port B Signal, Channel 1, Port B Signal, Channel 2, Port B Signal, Channel 3, Port B Signal, Channel 0, Port C Signal, Channel 1, Port C Signal, Channel 2, Port C Signal, Channel 3, Port C Signal, Channel 0, Port D Signal, Channel 1, Port D Signal, Channel 2, Port D Signal, Channel 3, Port D 38 OE# I Output Enable, active low. When OE# = 0 the device is enabled. When OE#=1, all are high impedance 7 SEL I Operation mode Select (when SEL=0: A B, C D, when SEL=1: A D, C B) 17, 28 V DD Pwr 3.3V ±10% Positive Supply Voltage 15, 18, 27, 37, Center Pad Pwr Power ground 5

6 Maximum Ratings (Above which useful life may be impaired. For user guidelines, not tested.) Storage Temperature...65 C to 150 C Supply Voltage to Ground Potential...0.5V to 3.7V DC Input Voltage V to V DD DC Output Current...120mA Power Dissipation...0.5W Junction Temperature o C Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Electrical Characteristics Recommended Operating Conditions Symbol Parameter Conditions Min. Typ. Max. Units V DD 3.3V Power Supply V I DD T A Total current from V DD 3.3V supply Operating temperature range SEL and OE# at OV or V DD 300 μa o C DC Electrical Characteristics for Switching over Operating Range Parameters Description Test Conditions (1) Min. Typ. (1) Max. Units V IH Input HIGH Voltage Guaranteed HIGH level 0.65 x V DD V V IL Input LOW Voltage Guaranteed LOW level x V DD V IK Clamp Diode Voltage V DD = Max., I IN = 18mA I IH Input HIGH Current, SEL V DD = Max., V IN = V DD I IL Input LOW Current, SEL V DD = Max., V IN = µa IIH Input HIGH Current, A X, B X, C X, D X V DD = Max., V IN = 1.8V IIL Input LOW Current, A X, B X, C X, D X V DD = Max., V IN = 0V µa Note: 1. Typical values are at VDD = 3.3V, TA = 25 C ambient and maximum loading. Switching Characteristics Parameters Description Test Conditions Min. Typ. Max. Units t PZH, t PZL Line Enable Time - SEL to A N, B N, C N, D N t PHZ, t PLZ Line Disable Time - SEL to A N, B N, C N, D N ns t b-b Bit-to-bit skew within the same differential pair 10 t ch-ch Channel-to-channel skew 20 ps 6

7 Dynamic Electrical Characteristics Parameter Description Test Conditions Min. Typ. (1) Max. Units DDIL Differential Insertion Loss (V IN = -10dBm, DC = 0V) f=1.2ghz f=2.5ghz f=4.0ghz f=5.0ghz f=7.5ghz DDIL OFF Differential Off Isolation f= 4.0GHz -19 db DDRL DDNEXT V I F Differential Return Loss Near End Crosstalk Max Signal Frequency Range f= 0 to 2.8GHz f= 2.8 to 5.0GHz f= 5.0 to 8.0GHz f= 0 to 2.8GHz f= 2.8 to 5.0GHz f= 5.0 to 8.0GHz Insertion loss 1.5dB, V IN =0.623Vpp, DC=0V Insertion loss 1.5dB, V IN =0.623Vpp, DC=0.9V Insertion loss 3dB, V IN =0.623Vpp, DC=0V Insertion loss 3dB, V IN =0.623Vpp, DC=0.9V BW -3dB Bandwidth 6.5 GHz Notes: 1. Guaranteed by design. Typical values are at V DD = 3.3V, T A = 25 C ambient and maximum loading db db db GHz 7

8 Differential Insertion Loss Differential Return Loss 8

9 Differential Off Isolation Differential Crosstalk 9

10 8.0 Gbps RX signal eye without 8.0 Gbps RX signal eye with BALANCED PORT1 BALANCED PORT1 BALANCED PORT2 DUT BALANCED PORT1 BALANCED PORT2 DUT Differential Insertion Loss and Return Test Circuit Differential Off Isolation Test Circuit BALANCED PORT DUT Differential Near End Xtalk Test Circuit 10

11 Test Circuit for Electrical Characteristics (1-5) 3.0V V DD 200-ohm Pulse Generator V IN D.U.T VOUT R T 4pF C L 200-ohm Notes: 1. C L = Load capacitance: includes jig and probe capacitance. 2. R T = Termination resistance: should be equal to Z OUT of the Pulse Generator 3.Output 1 is for an output with internal conditions such that the output is low except when disabled by the output control. output 2 is for an output with internal conditions such that the output is high except when disabled by the output control. 4. All input impulses are supplied by generators having the following characteristics: PRR MHz, Z O = 50Ω, t R 2.5ns, t F 2.5ns. 5. The outputs are measured one at a time with one transition per measurement. Switch Positions Test Switch t PLZ, t PZL 3.0V t PHZ, t PZH Prop Delay Open Switching Waveforms SEL V DD /2 V DD /2 V DD 0V Output 1 tpzl tpzh 0.75V 0.75V tplz tphz V OL 0.15V V OL V VOH VOL VOH Output 2 VOL Voltage Waveforms Enable and Disable Times 11

12 Part Marking Information ZH Package ZL Package PI3PCIE 3442AZHE YYWWXX YY : Year WW : Workweek 1st X: Assembly Code 2nd X: Fab Code PI3PCIE 3442AZLE YYWWXX YY : Year WW : Workweek 1st X: Assembly Code 2nd X: Fab Code Packaging Mechanical: 42-Contact TQFN (3.5x9mm) Notes: 1. All dimensions are in millimeters, angles in degrees. 2. Coplanarity applies to the exposed thermal pad as well as the terminals. 3. Refer JEDEC MO Recommended Land Pattern is for reference only. 5. Thermal Pad Soldering Area DATE: 02/17/09 DESCRIPTION: 42-contact Thin Fine Pitch Quad Flat No-Lead (TQFN) PACKAGE CODE: ZH (ZH42) DOCUMENT CONTROL #: PD-2035 REVISION: C

13 Packaging Mechanical: 40-Contact TQFN (3x6mm) For latest package info. please check: Ordering Information Ordering Code Package Code Package Description ZHEX ZH 42-contact, Thin Fine Pitch Quad Flat No-Lead (TQFN) ZLEX ZL 40-contact, 3 x 6mm (TQFN) Notes: Thermal characteristics can be found on the company web site at E = Pb-free and Green X suffix = Tape/Reel 13

14 IMPORTANT NOTICE DIODES INCORPORATED MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARDS TO THIS DOCUMENT, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION). and its subsidiaries reserve the right to make modifications, enhancements, improvements, corrections or other changes without further notice to this document and any product described herein. does not assume any liability arising out of the application or use of this document or any product described herein; neither does convey any license under its patent or trademark rights, nor the rights of others. Any Customer or user of this document or products described herein in such applications shall assume all risks of such use and will agree to hold and all the companies whose products are represented on website, harmless against all damages. does not warrant or accept any liability whatsoever in respect of any products purchased through unauthorized sales channel. Should Customers purchase or use products for any unintended or unauthorized application, Customers shall indemnify and hold Diodes Incorporated and its representatives harmless against all claims, damages, expenses, and attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized application. Products described herein may be covered by one or more United States, international or foreign patents pending. Product names and markings noted herein may also be covered by one or more United States, international or foreign trademarks. This document is written in English but may be translated into multiple languages for reference. Only the English version of this document is the final and determinative format released by. LIFE SUPPORT products are specifically not authorized for use as critical components in life support devices or systems without the express written approval of the Chief Executive Officer of. As used herein: A. Life support devices or systems are devices or systems which: 1. are intended to implant into the body, or 2. support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in significant injury to the user. B. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or to affect its safety or effectiveness. Customers represent that they have all necessary expertise in the safety and regulatory ramifications of their life support devices or systems, and acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any use of products in such safety-critical, life support devices or systems, notwithstanding any devices- or systems-related information or support that may be provided by. Further, Customers must fully indemnify and its representatives against any damages arising out of the use of Diodes Incorporated products in such safety-critical, life support devices or systems. Copyright 2016, 14