LogicBlocks Experiment Guide a learn.sparkfun.com

Size: px
Start display at page:

Download "LogicBlocks Experiment Guide a learn.sparkfun.com"

Transcription

1 LogicBlocks Experiment Guide a learn.sparkfun.com tutorial Available online at: Contents Introduction 1. 2-Input AND Gate 2. 3-Input AND Gate 3. NANDs, NORs, and DeMorgan's Laws 4. Combinational Logic 5. Ring Oscillator 6. SR Latch 7. 2-to-1 Multiplexer 8. 1-to-2 Decoder (De-Multiplexer) 9. XOR Gate Logic Beyond LogicBlocks... Resources and Going Further Introduction So you ve read through the LogicBlocks introductory tutorial (or the kit s included documentation), and are ready for some experiments!? Time to put those LogicBlocks to use! You ll be building big ol' LogicBlock circuits like this XNOR in no time! Page 1 of 37

2 Table of Contents Here s a breakdown of the experiments we ll be exploring in this guide: 1. 2-Input AND Gate 2. 3-Input AND Gate 3. NANDs, NORs, and De Morgan s Laws 4. Combinational Logic 5. Ring Oscillator 6. SR Latch 7. 2-to-1 Multiplexer 8. 1-to-2 Decoder (De-multiplexer) 9. XOR Gate 10. Beyond LogicBlocks Each experiment includes a schematics, and matching LogicBlock layouts for the circuit under test. Page 2 of 37

3 There are also smatterings of truth tables, state diagrams, and boolean equations throughout each experiment. And they re all capped off with challenges, questions, and sub-experiments. To get the most out of each experiment, make sure you check out the sub-experiments! 1. 2-Input AND Gate The first experiment starts off as simple as possible: a dual-input, single output AND gate. What You ll Need 1x AND Block 2x Input Blocks 1x Power Block Circuit Diagram LogicBlock Layout Nothing too fancy here. An Input Block should be inserted into each of the AND Block s inputs. Then plug the Power Block into the output of the AND Block. Page 3 of 37

4 The blue LED on the AND Block will indicate the output status of the circuit. The Experiment Try all four possible input combinations: 0/0, 0/1, 1/0, and 1/1. Remember, this is what the AND gate s truth table should look like: Input A Input B Output Does the blue AND block LED light up as you d expect? Sub-Experiments While we re here, let s discuss the other two fundamental gates. A two-input OR and a single-input NOT. Two-Input OR Gate Page 4 of 37

5 Can you lay out the fundamental, two-input OR gate with LogicBlocks? It ll require a similar set of blocks to the AND: After experimenting with that, can you complete this truth table for the OR?: Input A Input B Output Two-Input NOT Gate Now do the same thing with the NOT gate. Page 5 of 37

6 This time you ll only need one Input Block: Can you complete the NOT truth table? Input A Output Now that you ve got a handle of the three, fundamental logic gates, let s add some inputs! Onto the next experiment 2. 3-Input AND Gate Sometimes you need to AND more than two inputs together. In fact, 3- and 4-input AND gates are just as common as the dual-input variety. Let s make a 3-input AND gate out of two two-input AND gates. What You ll Need Page 6 of 37

7 3x Input Blocks 2x AND Blocks 1x Power Block Circuit diagram LogicBlock layout Start by building the 2-input AND block from the last experiment, but plug the output of that into the input of another AND. Then add an Input Block to the second AND s second input. Complete the circuit by adding a Power Block to the output of the second AND. The blue LED on the second AND gate represents the output of this circuit. The Experiment With three total inputs, how many different input combinations can you make? 8! This number grows exponentially at 2 n, where n is the number of inputs. So, a 4-input AND gate has 16 possible combinations, 5 inputs would be 32 outputs, and so on. Try all possible input combinations and fill out the truth table below: Page 7 of 37

8 Input A Input B Input C Output Y Can you think of a situation in real life where three requirements must be met before an outcome becomes true? If you had more AND blocks, can you imagine what a 4-input AND block might look like? Sub-Experiments Try using two OR gates and three Input Blocks to create a 3-input OR gate. Page 8 of 37

9 Draw a schematic diagram for this circuit. Write out a truth table for this circuit. Like the 3-input AND circuit, this circuit will have 8 possible sets of input. But there should be a lot more 1 s on the output column! 3. NANDs, NORs, and DeMorgan's Laws NAND in other words NOT AND or negated AND is what you get when you place an inverter at the output of an AND gate. NAND gates are very popular in the world of digital logic. They ve even got their very own circuit symbol, an AND gate with a bubble at the output: Let s make one with LogicBlocks! What You ll Need 1x AND Block Page 9 of 37

10 1x NOT Block 2x Input Blocks 1x Power Block LogicBlocks Layout This layout is similar to the setup from experiment 1, with the addition of a NOT gate between the AND Block output and the Power Block. The output of this circuit is represented by the red LED on the NOT gate. The Experiment Two inputs means four possible input combinations. Try them all and fill out the 2-input NAND gate s truth table: Input A Input B Output Page 10 of 37

11 How does that compare to the truth table of the AND gate? Sub-Experiments You can also negate an OR gate to create a NOR: Which also has its own bubbled circuit symbol: What does the 2-input NOR gate s truth table look like? DeMorgan s Law All of this NAND and NOR discussion has me itching to discuss De Morgan s Law! De Morgan s Law allows us to convert NANDs to OR, and NORs to ANDs. There are two parts to De Morgan s Law: 1. A 2-input NAND is equivalent to OR-ing two inverted inputs. In boolean equation terms: Page 11 of 37

12 2. A 2-input NOR is equal to AND-ing two inverted inputs. Or, in boolean terms: Prove it yourself! Build the circuit below with your LogicBlocks, and compare the truth table you filled out for the NAND gate with the truth table for this circuit two inverted inputs running into an OR gate. Are the truth tables the same? You ve just verified the first part of DeMorgan s law! Now, you might be asking: what s the point? Well, a big part of digital logic is simplifying the circuit, and using a few gates as possible. Thanks to De Morgan s Law, we can use a NAND gate to stand in for all of the other gates. For example, a NOT can be made out of a NAND by simply tying one the inputs permanently high: Or use three NAND gates to make an OR: Page 12 of 37

13 Or use two NANDs to make an AND: The versatility of NAND gates makes them truly magical! 4. Combinational Logic The circuits in the previous experiments have all been examples of combinational logic circuits. In combinational circuits the output depends exclusively on the current state of the inputs. The circuit flows in one direction, from the inputs (traditionally) on the left, to the outputs on the right. The opposite of combinational logic is sequential, in which a circuit s current output will affect its future outputs. But we ll get to that in later experiments. Here s an example of a combinational logic circuit we can build with LogicBlocks: Given the input names shown in the circuit diagram (A and B feeding into the AND gate, C goes through the first NOT gate), we can form a boolean equation like this: The output is the negation of ((A and B) or not C) (not the order of operations!). Let s build the above circuit with LogicBlocks! What You ll Need 1x AND Block 1x OR Block 2x NOT Blocks 3x Input Blocks 1x Power Block Page 13 of 37

14 LogicBlock Layout The output of an AND Block with two Input Blocks should be connected to one input of an OR Block. The other input of the OR Block should be connected to a NOT Block, which has an Input Block feeding into it. Finally, the output of the OR Block should feed into another NOT block, which is connected to a Power Block. The output of this combinational logic circuit is represented by the red LED on the final NOT Block. The Experiment Try all eight possible input combinations and fill out this circuit s truth table: Input A Input B Input C Output Y Page 14 of 37

15 Does that jive with the equation from above? Have another look at that equation, or even the schematic. Recognizing the NANDs and NORs, could the equation be simplified by using De Morgan s Laws? Yes! First, push that inverter into the OR gate to turn it into a NOR: Then apply De Morgan s law: push the bubble through the NOR gate - turning that gate into an AND - and through to create NOT gates on both inputs: The two NOT gates on the C input would cancel each other out, so just get rid of them both. The NOT gate on the first AND s output can be pushed onto the gate to create a NAND gate: We ve completely eliminated the OR gate! Would you believe that this circuit produces the same truth table as the circuit at the beginning of this experiment? Try it out for yourself: Page 15 of 37

16 Sub-Experiments The next experiment takes a pretty giant leap from combinational to sequential logic. At this point, we d really encourage you to just play around with the LogicBlocks, create your own circuits. Then try to draw out a circuit diagram, and a truth table. Are there any real-life scenarios you could imagine solving with digital logic? 5. Ring Oscillator An oscillator is a circuit whose output periodically and repetitively fluctuates. Oscillators are a critical part of most electronic circuits; they re used to create anything from a clock to radio waves. There are a variety of circuits that can create oscillation, you can use op amps, crystals, 555 timers, and, of course, logic gates! By stringing an odd number of NOT gates together, and introducing feedback looping the output of the last inverter back to the input of the first we can create a ring oscillator. Let s LogicBlock it! What You ll Need 3x NOT Blocks 1x Splitter Block 1x Feedback Cable 1x Power Block Circuit Diagram This circuit introduces a concept we ve only briefly mentioned so far: sequential circuits. Unlike combinational circuits, the output of a sequential circuit depends on previous output states. Here is the circuit for a ring oscillator: Page 16 of 37

17 See how the output of third and final NOT gate splits into two directions? The first goes straight out to the output, like we re used to, but it also loops back into the input of the the first NOT gate. This is called feedback a term almost synonymous with sequential circuits. The current state of the output depends on what it was doing in the past. LogicBlock Layout First link up three NOT gates and plug the third into a Splitter Block. Use the Feedback Cable to connect one of the Splitter Block outputs to the input of the first NOT gate. Finally, plug the Power Block into the second output of the Splitter Block. The output of this circuit is represented by the red LED on the third and final NOT block. The Experiment What does the truth table look like for this circuit? Wait. Does it even have a truth table? There aren t any inputs! Instead of a standard truth table, we can create a state table that defines the value of the current output as dependent on the previous output: Previous Output Current Output 0 1 Page 17 of 37

18 1 0 Does the number of inverters have to be odd? What happens if there are an even number of inverters? Try removing one of them. Can you calculate how fast the LED on the final NOT Block is blinking? Each block has a delay of about 1 second. What effect would increasing the number of inverters to 5 have on the blinking rate of the output? Sub-Experiments In some cases it may be handy to have an enable input on your oscillator. Enable inputs commonly found in many digital logic circuits control the overall operation of the circuit. When the enable input is set to 1, the circuit operates as normal, but when its set to 0 the circuit s operation is halted. We can add an enable input to the ring oscillator by introducing an AND gate. Have a look at this circuit diagram: Build it by plugging an AND Block into the first NOT gate (removing the feedback cable). Then plug the male end of the feedback cable into one of the AND Block s inputs, and an Input Block (our enable) into the other input. Now flip the switch on the enable input to see how it affects the output of the oscillator. What would the state table look like now? Enable Previous Output Current Output SR Latch A latch (also called a flip-flop) is a fundamental component of data storage. A single latch can hold 1-bit of data, increase that number by many orders of magnitude and you can create kilo-, mega-, giga-, even terabytes of memory. Of course, like most digital circuits, latches are made out of digital logic gates! There are many different kinds of latches, all with somewhat cryptic names like SR, D, JK, and T. The SRlatch we ll be experimenting with is one of the most fundamental forms of a latch. Page 18 of 37

19 There are a few ways to make an SR latch. Here s an example of a NOR SR latch: Notice the feedback? This is another sequential logic circuit. The two NOR gates each have their output flow into the input of the other. There are two controllable inputs: reset (R) and set (S), which produce the two outputs: Q and Q ( Q-not ). That s where the SR latch get s its name it s a set/reset latch. The SR latch comes with a rule, which cannot ever be broken: Q must always be the opposite of Q. These outputs are called complements. In our application Q is the only output we really care about that s where the latch s data is usually stored and retreived but it s important to observe that the two outputs are opposites. An SR latch is so important it even gets its very own circuit symbol: Here is the state table, which is a bit wonky. Because the circuit is sequential, the current value of Q depends on its previous state: S R Previous Q Current Q Current Q (no change) (no change) (no change) Page 19 of 37

20 (no change) (Restricted, Q and Q would not be complements) 0 (Restricted, Q and Q would not be complements) 0 0 Put into words, the output, Q, can be in any of the following states: Steady: When S and R are both 0, then Q remains steady. It keeps the value it had before. If it was 0 it ll remain 0, if it was 1 it will still be 1. Set: Changing S to 1 has the potential to set the output of Q. If Q was 0, changing S to 1 will change Q to 1 as well. If Q was already 1, making S=1 will have no effect. Reset: Moving the R input from 0 to 1 can reset Q. As long as Q was 1, setting R to 1 will change Q to 0. If Q was already 0, though, R won t have any effect on it. Restricted: When both S and R are 1, we enter restricted territory: our rule that Q and Q must be complements is broken, as they both go to 0. So we call S=1/R=1 a restricted combination. In most latch circuits precautions are taken to keep those inputs from both being 1. Our LogicBlock circuit isn t quite that smart, so you ll need to take the circuit safety precautions into your own hands to make sure they re never both 1 (don t worry, the universe should survive the contradiction if you set both inputs high). We can also use a state diagram to document the possible states of Q: Enough conceptual stuff. Let s lay out the SR latch with LogicBlocks! Page 20 of 37

21 What You ll Need 2x OR Blocks 2x NOT Blocks 2x Input Blocks 1x Splitter Block 1x Feedback Cable 1x Power Block LogicBlock Layout Construct the LogicBlock circuit like below: In our mind, we need to assign names to both inputs. One should be R (reset) the other should be S (set). Because the circuit is symmetric, it doesn t matter which input we call which, but the name of the input will affect which output is which. There are two outputs to keep an eye on in this circuit; both are indicated by the red LEDs on the NOT gates. The NOT gate coming out of the OR gate with S as its direct input indicates the Q output. Our Q output is indicated by the red LED on the NOT gate fed by the OR gate with R as its input. The Experiment Give this series of steps a try, and observe both Q and Q outputs. 1. We need an initial state to start us off. Begin by setting both S=0 and R=0. 2. Now, set R=1. Q should "reset", if it wasn't already 0, it will become 0. If Q already was 0, it will stay there. Obeying our rule, Q should be 1. Page 21 of 37

22 3. Set R=0. Nothing should change on Q or Q. They hold steady. 4. Set S=1. Now Q should 'set' and go high, while Q goes low. 5. Set S=0. There shouldn't be any effect on Q or its complement. Can you see how this might work as a piece of memory? Imagine a single bit of data being stored in the Q output! Try entering the restricted state by setting both S and R to 1. Q and Q should both be 0; our complement rule has been broken! To avoid this from happening safeguards will usually be placed on the inputs (in the form of more logic gates!), which will convert the restricted combination to an allowed input value. Sub-Experiments You can also make a latch out of NAND gates. Just swap the ORs with ANDs. Too keep the names of the inputs in line with the outcome they produce, we also swap the S and R inputs (or Q and Q, depending on how you look at it). And lay it out with Logic Blocks like this (just replace the OR blocks with AND blocks): Page 22 of 37

23 You still have two stable states, but the truth table changes. Write out the state table for the NAND SR latch, and compare it with the NOR SR latch above. Which combination of inputs creates a restricted output in this case? S R Previous Q Current Q Current Q Latches are the building blocks of many types of memory, including SRAM (static random access memory). As we ve seen, a single latch can store one bit of data. How many latches do you think a piece of 1 Mb (1 million bits) SRAM has? How many NOR gates is that? Zounds! 7. 2-to-1 Multiplexer A multiplexer (or mux) is a common digital circuit used to mix a lot of signals into just one. If you want multiple Page 23 of 37

24 sources of data to share a single, common data line, you d use a multiplexer to run them into that line. Multiplexers come in all sorts of shapes and sizes, but they re all made out of logic gates. Every multiplexer has at least one select line, which is used to select which input signal gets relayed to the output. In a 2-to-1 multiplexer, there s just one select line. More inputs means more select lines: a 4-to-1 multiplexer would have 2 select lines, an 8-to-1 has 3, and so on (2 n inputs requires n select lines). Think of a mux as a digital switch. The select line is the throw on the switch, it chooses which of the many inputs get to be the output. Here s how you might make a 2-to-1 multiplexer out of logic gates. A and B are the two inputs, X is the select input, and Y is the output. Here s what a truth table would look like for such a circuit: Select Input (X) Input A Input B Output Y LogicBlock time! What You ll Need Page 24 of 37

25 2x AND Blocks 1x OR Block 1x Inverter Block 1x Splitter Block 3x Input Blocks 1x Feedback Cable 1x Power Block LogicBlocks Layout Follow the layout below to create a 2-to-1 multiplexer (Hint: pay more attention than we did to matching up the + and labels!): We ll need to internally label each of the inputs. The selector input (X) is the lonely input running into the NOT gate. The remaining two inputs are our A and B, which you can arbitrarily name as you wish. The output of this multiplexer is indicated by the yellow LED on the OR gate. The Experiment Give this order of operations a try: 1. Initial state: set all three inputs to 0. The output should be Flip A to 1. Nothing should happen to the output, since, with the selector switch set to 0, the B input is being fed into the output. 3. Toggle the B input to 1. Observe the output, and set B back to 0. The output should follow your toggling on B! 4. Switch the selct to 1. The output should now follow the A input, and it won t care what B is set to. Is this circuit combinational or sequential? (Don't let the "Feedback" cable fool you!) Can you imagine what a 4-to-1 multiplexer might look like? It'd require double the inputs lines -- two Page 25 of 37

26 selectors and four possible inputs. Here's a (color-coded) schematic for a 4-to-1 multiplexer: A 4-to-1 demux requires four 3-input ANDs, four NOTs, and one 4-input OR. This circuit allows us to choose to send either A, B, C, or D into the X output. X 0 and X 1 do the selecting. How many gates do you think a 8-to-1 multiplexer might require? 8. 1-to-2 Decoder (De-Multiplexer) The opposite of a multiplexer is a de-multiplexer, also called a demux or decoder. A demux allows a single input line to be passed through to multiple output lines, again using a select line to choose which output the input goes to. The schematic for a 2-to-1 demultiplexer looks like this: Page 26 of 37

27 There are two inputs (X and A) and two outputs Y 1 and Y 2. X is our selector input, it decides which of the two outputs the A input is routed to. When X is 0, the output at Y 2 mirrors A (while Y 1 will always be 0). When X is 1, the A input is routed to Y 1. The demultiplexer becomes really handy when we have limited outputs available in our system and we need to interface with many many input devices. What You ll Need 2x AND Blocks 2x NOT Blocks 2x Input Blocks 2x Splitter Blocks 1x Power Block 1x Feedback Cable LogicBlocks Layout Construct the LogicBlocks circuit as shown below. Use the feedback cable to simply extend the output of one splitter (you ll need to fuss with it a bit to fit it into both blocks). Page 27 of 37

28 In this LogicBlock circuit, our selector input (X) is represented by the Input Block that runs into the NOT Block. The only remaining input is our A input. The two outputs are each represented by the blue LEDs on each of the AND gates. Y 1 is the AND Block without the Power Block attached. The Experiment Give this order of operations a try: 1. Flip the selector input (X) to 0. Then try toggling the A input both high and low. Only one of the AND Blocks should change, and it should be the same value as the input. 2. Flip the X input to 1. Again toggle A a few times. Now the other AND gate should be keeping pace with A. Can you imagine what a larger demux might look like? Here's an example circuit for a 2-to-4 decoder: Page 28 of 37

29 This circuit has two selector inputs (X 0 and X 1 ) which route our input (A) to one of the four outputs. Compare the 2-to-4 decoder to a 4-to-1 multiplexer (from the last experiment). How do they differe? Can you imagine what a circuit for a 3-to-8 decoder might look like? 9. XOR Gate Up till now, you ve been happily living in a world with just three fundamental logic gates. It s time to shatter that perception! Prepare for the revelation that is the exclusive OR. An exclusive OR, shortened to XOR, is similar to an OR gate with one major difference. Can you tell from the truth table?: Input A Input B Output Page 29 of 37

30 When we say exclusive, we mean it. An XOR only produces a 1 when a lone input is also 1. If two or more inputs are 1, the XOR gate outputs a 0. It turns out the XOR gate is an incredibly useful function in digital logic. So useful, in fact, that it gets its own circuit symbol kind of a modified OR gate, with a concave line preceding the gate we re used to: Like all of the previous experiments, the XOR gate can be implemented with the three fundamental digital logic gates. A mix of NOTs, ANDs, and an OR: Let s LogicBlock it! What You ll Need 2x AND Blocks 1x OR Block 2x NOT Blocks 2x Input Blocks 2x Splitter Blocks 1x Power Block 1x Feedback cable LogicBlocks Layout Construct the XOR as shown below: Page 30 of 37

31 The output of the XOR LogicBlocks circuit is represented by the yellow LED on the final OR gate. The Experiment Prove the XOR truth table true by toggling both inputs. The LED on the OR block should only light up when you have one or the other of the inputs on. Is the XOR a combinational or sequential circuit? Can you think of a real life example where a statement is true if only one of the inputs is also true? Sub-Experiments Remember NAND and NOR? Well XOR has it s own complement XNOR. Like the other two negative gates, XNOR has its own bubbled circuit diagram: The truth table for the 2-input XNOR looks like this: Input A Input B Output Page 31 of 37

32 1 1 1 What s really neat about the XNOR is it only proves true when both inputs are the same. That s why we call this operator the logical equality. You could even use the equals sign (=) as the XNOR operator. The equality operator is used all over electronics and programming. If you ever need to check if two statements are equal, an XNOR will be involved. Hey we ve got another NOT Block lying around, let s make an XNOR LogicBlocks circuit! Replace the Power Block with a NOT Block, and plug the Power Block into the end of that. The output of this circuit is represented by the red LED on the final NOT Block. Try toggling both Input Blocks. Does the output LED only illuminate when they re both equal? Logic Beyond LogicBlocks... These experiments have barely covered the tip of the proverbial iceberg. We ve discovered a lot of fundamental electronics building blocks, but there are many left to uncover. Unfortunately, with the standard kit we ve run out of blocks. Here are a few of the foundational circuits and concepts we d be remiss if we didn t discuss: Adders Adders are actual circuits (as opposed to the snakes) that add numbers, and they re built with logic gates! A half-adder is the most simple adder circuit there is. It adds two bits together and has two outputs: the sum (S) and a carry (C). As you can see, the circuit isn t all that complicated: Page 32 of 37

33 The sum of the two bits is just their XOR, and if both A and B are 1 we generate a carry output. More complete adders, called full-adders, also have a carry input. These circuits can be strung together in long chains to create a multi-bit binary adder. Most processors have a block of circuitry within them called an arithmetic logic unit (ALU), where all of the addition, subtraction, multiplication, and division operations are performed. The ALU houses hundreds of adder circuits (among others), and links them to create enormous 32- or 64-bit adders. Flip-Flops (Latches) We talked about flip-flops in the SR Latch experiment, but we only glossed over the importance of these circuits. The SR latch we made is one of the more simple latches in electronics. We can modify the SR latch to create a D latch: Notice the SR latch in there? The D latch has two inputs data (D) and enable (E). As long as the enable Page 33 of 37

34 input is 1, the Q output will be whatever D is. If enable goes low, Q will retain its set value regardless of what the data input does. Another popular latch is the JK latch. This latch is also based on the SR latch, but it modifies that illegal set of inputs (the one where Q and Q were equal) to instead toggle the current output. Here s how the JK latch is built: The truth table for a JK latch looks something like this: J K Previous Q Current Q (hold state) (hold state) 0 1 X (don't care) 0 (reset) 1 0 X 1 (set) (toggle) (toggle) Now, let s turn that JK latch into a JK flip-flop. Flip-flops are usually created by adding a clock input to a latch. A flip-flop with a clock input will usually only perform an operation on the rising edge of a clock signal. The clock input can be used in many ways, for instance multiple flip flops can be synchronized by sharing a clock input. By replacing those 2-input AND gates with a 3-input variety, we can add a clock input to the JK flip-flop: Page 34 of 37

35 Now, the JK flop-flop will only produce a new output when the clock input is high. This gives us a bit more control over the operation of the flip-flop. The JK flip-flop will come in handy in the next section counters. Counters Adders add and counters count. Counters are a key element in most processors, especially in timing applications. Your digital clock has to count seconds somehow, right? A really simple counter can be created by linking together numerous JK flip-flops. If multiple JK flip-flops are all set to constantly toggle (J=K=1), and we link the output of one flip-flop to the input of the next, we can create an asynchronous ripple counter. Here s how we might make a 3-bit ripple counter out of JK flipflops: Q 0, Q 1, and Q 2 are our three outputs; Q 0 the least-significant bit, Q 2 most. With three bits, this circuit can count all the way from 0 to 7 in binary. We can apply a periodic clock to the initial clock input, and begin the counting. Every rising edge on the clock leads to an increment on the counter. Since we ve hooked up the Page 35 of 37

36 complemented output from one JK to the clock input of the next, the Q outputs will toggle whenever the previous one falls. This 3-bit counter will overflow at 7, but adding more flip-flops will increase the upper limit by powers of 2 n( flip-flops count to 2 n-1 ), so we d need 20 flip-flops to count above 1 million. There are other types of counters, but this is a good example built with logic circuits that aren t actually all that far-stretched from what we ve learned so far Series Logic Chips If you re looking for somewhere to go after LogicBlocks, we d recommend looking into 7400 series logic chips. The 7400s are a huge range of integrated circuits (ICs) that implement all sorts of digital logic functions. You can find quad-nand gates, along with a variety of other standard digital logic gates. In fact, the chips on the LogicBlock Gate blocks are 7400-series parts little single-circuit SMD versions. Flip flops, counters, multiplexers, decoders, all sorts of other circuits we ve covered in this tutorial are implemented in a 7400 series chip. Even more complicated circuits like entire 4-bit ALUs, memories, comparators seriously, it s a pretty long list, check this out. Most 7400 series chips come in a breadboard-friendly DIP package, like the 3-to-8 decoder below (74238). So you can experiment and explore without having to actually solder anything. Page 36 of 37

37 If you still can t get enough digital logic, CPLDs (compact programmable logic devices) or even FPGAs (field programmable gate array) would be the next step. They represent a giant leap in complexity from even the 7400 series chips, but those ICs can pack thousands of configurable digital logic circuits into a tiny space. There s a lot of digital logic out there for you to explore, but I hope the LogicBlocks have been a good introduction. Resources and Going Further Congratulations on making it all the way through the Experiments Guide! Hopefully, by now, you re much more comfortable with your knowledge of digital logic, ANDs, ORs, NOTs, XORs, multiplexers, oscillators, and then some. If you ever need a refresher on digital logic, you can always check out our digital logic tutorial. If you re not sure where to go from here, here are some more SparkFun tutorials we d encourage you to check out! Resistors, Capacitors, Diodes, and Switches are just a handful of component-specific tutorials we have. If you re eager to learn about other fundamental electronics components, these tutorials are a good place to start! What is an Arduino? Arduino is a hyper-popular microcontroller development platform driven to be as easy-to-use as possible. The heart of the Arduino is a microcontroller a tiny computer that has millions of logic gates inside. Shift Registers Shift registers are incredibly useful IC s that can switch a wide array of inputs or outputs, with just a few control lines. Plus, they re completely built out of digital logic! Hexadecimal If you re on a math kick, and comfortable with binary, take some time to learn about hex. learn.sparkfun.com CC BY-SA 3.0 SparkFun Electronics Niwot, Colorado Page 37 of 37

YEDITEPE UNIVERSITY DEPARTMENT OF COMPUTER ENGINEERING. EXPERIMENT VIII: FLIP-FLOPS, COUNTERS 2014 Fall

YEDITEPE UNIVERSITY DEPARTMENT OF COMPUTER ENGINEERING. EXPERIMENT VIII: FLIP-FLOPS, COUNTERS 2014 Fall YEDITEPE UNIVERSITY DEPARTMENT OF COMPUTER ENGINEERING EXPERIMENT VIII: FLIP-FLOPS, COUNTERS 2014 Fall Objective: - Dealing with the operation of simple sequential devices. Learning invalid condition in

More information

MODULE 3. Combinational & Sequential logic

MODULE 3. Combinational & Sequential logic MODULE 3 Combinational & Sequential logic Combinational Logic Introduction Logic circuit may be classified into two categories. Combinational logic circuits 2. Sequential logic circuits A combinational

More information

The basic logic gates are the inverter (or NOT gate), the AND gate, the OR gate and the exclusive-or gate (XOR). If you put an inverter in front of

The basic logic gates are the inverter (or NOT gate), the AND gate, the OR gate and the exclusive-or gate (XOR). If you put an inverter in front of 1 The basic logic gates are the inverter (or NOT gate), the AND gate, the OR gate and the exclusive-or gate (XOR). If you put an inverter in front of the AND gate, you get the NAND gate etc. 2 One of the

More information

Find the equivalent decimal value for the given value Other number system to decimal ( Sample)

Find the equivalent decimal value for the given value Other number system to decimal ( Sample) VELAMMAL COLLEGE OF ENGINEERING AND TECHNOLOGY, MADURAI 65 009 Department of Information Technology Model Exam-II-Question bank PART A (Answer for all Questions) (8 X = 6) K CO Marks Find the equivalent

More information

Solution to Digital Logic )What is the magnitude comparator? Design a logic circuit for 4 bit magnitude comparator and explain it,

Solution to Digital Logic )What is the magnitude comparator? Design a logic circuit for 4 bit magnitude comparator and explain it, Solution to Digital Logic -2067 Solution to digital logic 2067 1.)What is the magnitude comparator? Design a logic circuit for 4 bit magnitude comparator and explain it, A Magnitude comparator is a combinational

More information

MAHARASHTRA STATE BOARD OF TECHNICAL EDUCATION (Autonomous) (ISO/IEC Certified)

MAHARASHTRA STATE BOARD OF TECHNICAL EDUCATION (Autonomous) (ISO/IEC Certified) Important Instructions to examiners: 1) The answers should be examined by key words and not as word-to-word as given in the model answer scheme. 2) The model answer and the answer written by candidate

More information

Advanced Devices. Registers Counters Multiplexers Decoders Adders. CSC258 Lecture Slides Steve Engels, 2006 Slide 1 of 20

Advanced Devices. Registers Counters Multiplexers Decoders Adders. CSC258 Lecture Slides Steve Engels, 2006 Slide 1 of 20 Advanced Devices Using a combination of gates and flip-flops, we can construct more sophisticated logical devices. These devices, while more complex, are still considered fundamental to basic logic design.

More information

DEPARTMENT OF COMPUTER SCIENCE & ENGINEERING

DEPARTMENT OF COMPUTER SCIENCE & ENGINEERING DRONACHARYA GROUP OF INSTITUTIONS, GREATER NOIDA Affiliated to Mahamaya Technical University, Noida Approved by AICTE DEPARTMENT OF COMPUTER SCIENCE & ENGINEERING Lab Manual for Computer Organization Lab

More information

Dev Bhoomi Institute Of Technology Department of Electronics and Communication Engineering PRACTICAL INSTRUCTION SHEET

Dev Bhoomi Institute Of Technology Department of Electronics and Communication Engineering PRACTICAL INSTRUCTION SHEET Dev Bhoomi Institute Of Technology Department of Electronics and Communication Engineering PRACTICAL INSTRUCTION SHEET LABORATORY MANUAL EXPERIMENT NO. 1 ISSUE NO. : ISSUE DATE: REV. NO. : REV. DATE :

More information

Chapter 4. Logic Design

Chapter 4. Logic Design Chapter 4 Logic Design 4.1 Introduction. In previous Chapter we studied gates and combinational circuits, which made by gates (AND, OR, NOT etc.). That can be represented by circuit diagram, truth table

More information

WINTER 15 EXAMINATION Model Answer

WINTER 15 EXAMINATION Model Answer Important Instructions to examiners: 1) The answers should be examined by key words and not as word-to-word as given in the model answer scheme. 2) The model answer and the answer written by candidate

More information

PHYSICS 5620 LAB 9 Basic Digital Circuits and Flip-Flops

PHYSICS 5620 LAB 9 Basic Digital Circuits and Flip-Flops PHYSICS 5620 LAB 9 Basic Digital Circuits and Flip-Flops Objective Construct a two-bit binary decoder. Study multiplexers (MUX) and demultiplexers (DEMUX). Construct an RS flip-flop from discrete gates.

More information

Physics 323. Experiment # 10 - Digital Circuits

Physics 323. Experiment # 10 - Digital Circuits Physics 323 Experiment # 10 - Digital Circuits Purpose This is a brief introduction to digital (logic) circuits using both combinational and sequential logic. The basic building blocks will be the Transistor

More information

Chapter 3. Boolean Algebra and Digital Logic

Chapter 3. Boolean Algebra and Digital Logic Chapter 3 Boolean Algebra and Digital Logic Chapter 3 Objectives Understand the relationship between Boolean logic and digital computer circuits. Learn how to design simple logic circuits. Understand how

More information

Unit 11. Latches and Flip-Flops

Unit 11. Latches and Flip-Flops Unit 11 Latches and Flip-Flops 1 Combinational Circuits A combinational circuit consists of logic gates whose outputs, at any time, are determined by combining the values of the inputs. For n input variables,

More information

BCN1043. By Dr. Mritha Ramalingam. Faculty of Computer Systems & Software Engineering

BCN1043. By Dr. Mritha Ramalingam. Faculty of Computer Systems & Software Engineering BCN1043 By Dr. Mritha Ramalingam Faculty of Computer Systems & Software Engineering mritha@ump.edu.my http://ocw.ump.edu.my/ authors Dr. Mohd Nizam Mohmad Kahar (mnizam@ump.edu.my) Jamaludin Sallim (jamal@ump.edu.my)

More information

R13 SET - 1 '' ''' '' ' '''' Code No: RT21053

R13 SET - 1 '' ''' '' ' '''' Code No: RT21053 SET - 1 1. a) What are the characteristics of 2 s complement numbers? b) State the purpose of reducing the switching functions to minimal form. c) Define half adder. d) What are the basic operations in

More information

DIGITAL CIRCUIT LOGIC UNIT 9: MULTIPLEXERS, DECODERS, AND PROGRAMMABLE LOGIC DEVICES

DIGITAL CIRCUIT LOGIC UNIT 9: MULTIPLEXERS, DECODERS, AND PROGRAMMABLE LOGIC DEVICES DIGITAL CIRCUIT LOGIC UNIT 9: MULTIPLEXERS, DECODERS, AND PROGRAMMABLE LOGIC DEVICES 1 Learning Objectives 1. Explain the function of a multiplexer. Implement a multiplexer using gates. 2. Explain the

More information

WINTER 14 EXAMINATION

WINTER 14 EXAMINATION Subject Code: 17320 WINTER 14 EXAMINATION Model Answer Important Instructions to examiners: 1) The answers should be examined by key words and not as word-to-word as given in the model answer scheme. 2)

More information

COMP sequential logic 1 Jan. 25, 2016

COMP sequential logic 1 Jan. 25, 2016 OMP 273 5 - sequential logic 1 Jan. 25, 2016 Sequential ircuits All of the circuits that I have discussed up to now are combinational digital circuits. For these circuits, each output is a logical combination

More information

TYPICAL QUESTIONS & ANSWERS

TYPICAL QUESTIONS & ANSWERS DIGITALS ELECTRONICS TYPICAL QUESTIONS & ANSWERS OBJECTIVE TYPE QUESTIONS Each Question carries 2 marks. Choose correct or the best alternative in the following: Q.1 The NAND gate output will be low if

More information

EXPERIMENT: 1. Graphic Symbol: OR: The output of OR gate is true when one of the inputs A and B or both the inputs are true.

EXPERIMENT: 1. Graphic Symbol: OR: The output of OR gate is true when one of the inputs A and B or both the inputs are true. EXPERIMENT: 1 DATE: VERIFICATION OF BASIC LOGIC GATES AIM: To verify the truth tables of Basic Logic Gates NOT, OR, AND, NAND, NOR, Ex-OR and Ex-NOR. APPARATUS: mention the required IC numbers, Connecting

More information

Principles of Computer Architecture. Appendix A: Digital Logic

Principles of Computer Architecture. Appendix A: Digital Logic A-1 Appendix A - Digital Logic Principles of Computer Architecture Miles Murdocca and Vincent Heuring Appendix A: Digital Logic A-2 Appendix A - Digital Logic Chapter Contents A.1 Introduction A.2 Combinational

More information

1 Hour Sample Test Papers: Sample Test Paper 1. Roll No.

1 Hour Sample Test Papers: Sample Test Paper 1. Roll No. 6.1.2 Sample Test Papers: Sample Test Paper 1 Roll No. Institute Name: Course Code: EJ/EN/ET/EX/EV/IC/IE/IS/MU/DE/ED/ET/IU Subject: Principles of Digital Techniques Marks: 25 1 Hour 1. All questions are

More information

MODU LE DAY. Class-A, B, AB and C amplifiers - basic concepts, power, efficiency Basic concepts of Feedback and Oscillation. Day 1

MODU LE DAY. Class-A, B, AB and C amplifiers - basic concepts, power, efficiency Basic concepts of Feedback and Oscillation. Day 1 DAY MODU LE TOPIC QUESTIONS Day 1 Day 2 Day 3 Day 4 I Class-A, B, AB and C amplifiers - basic concepts, power, efficiency Basic concepts of Feedback and Oscillation Phase Shift Wein Bridge oscillators.

More information

R13. II B. Tech I Semester Regular Examinations, Jan DIGITAL LOGIC DESIGN (Com. to CSE, IT) PART-A

R13. II B. Tech I Semester Regular Examinations, Jan DIGITAL LOGIC DESIGN (Com. to CSE, IT) PART-A SET - 1 Note: Question Paper consists of two parts (Part-A and Part-B) Answer ALL the question in Part-A Answer any THREE Questions from Part-B a) What are the characteristics of 2 s complement numbers?

More information

Combinational vs Sequential

Combinational vs Sequential Combinational vs Sequential inputs X Combinational Circuits outputs Z A combinational circuit: At any time, outputs depends only on inputs Changing inputs changes outputs No regard for previous inputs

More information

CHAPTER 4: Logic Circuits

CHAPTER 4: Logic Circuits CHAPTER 4: Logic Circuits II. Sequential Circuits Combinational circuits o The outputs depend only on the current input values o It uses only logic gates, decoders, multiplexers, ALUs Sequential circuits

More information

UNIT IV. Sequential circuit

UNIT IV. Sequential circuit UNIT IV Sequential circuit Introduction In the previous session, we said that the output of a combinational circuit depends solely upon the input. The implication is that combinational circuits have no

More information

RS flip-flop using NOR gate

RS flip-flop using NOR gate RS flip-flop using NOR gate Triggering and triggering methods Triggering : Applying train of pulses, to set or reset the memory cell is known as Triggering. Triggering methods:- There are basically two

More information

DIGITAL SYSTEM FUNDAMENTALS (ECE421) DIGITAL ELECTRONICS FUNDAMENTAL (ECE422) LATCHES and FLIP-FLOPS

DIGITAL SYSTEM FUNDAMENTALS (ECE421) DIGITAL ELECTRONICS FUNDAMENTAL (ECE422) LATCHES and FLIP-FLOPS COURSE / CODE DIGITAL SYSTEM FUNDAMENTALS (ECE421) DIGITAL ELECTRONICS FUNDAMENTAL (ECE422) LATCHES and FLIP-FLOPS In the same way that logic gates are the building blocks of combinatorial circuits, latches

More information

NORTHWESTERN UNIVERSITY TECHNOLOGICAL INSTITUTE

NORTHWESTERN UNIVERSITY TECHNOLOGICAL INSTITUTE NORTHWESTERN UNIVERSITY TECHNOLOGICL INSTITUTE ECE 270 Experiment #8 DIGITL CIRCUITS Prelab 1. Draw the truth table for the S-R Flip-Flop as shown in the textbook. Draw the truth table for Figure 7. 2.

More information

Sequential Logic Basics

Sequential Logic Basics Sequential Logic Basics Unlike Combinational Logic circuits that change state depending upon the actual signals being applied to their inputs at that time, Sequential Logic circuits have some form of inherent

More information

Bachelor Level/ First Year/ Second Semester/ Science Full Marks: 60 Computer Science and Information Technology (CSc. 151) Pass Marks: 24

Bachelor Level/ First Year/ Second Semester/ Science Full Marks: 60 Computer Science and Information Technology (CSc. 151) Pass Marks: 24 2065 Computer Science and Information Technology (CSc. 151) Pass Marks: 24 Time: 3 hours. Candidates are required to give their answers in their own words as for as practicable. Attempt any TWO questions:

More information

Logic Gates, Timers, Flip-Flops & Counters. Subhasish Chandra Assistant Professor Department of Physics Institute of Forensic Science, Nagpur

Logic Gates, Timers, Flip-Flops & Counters. Subhasish Chandra Assistant Professor Department of Physics Institute of Forensic Science, Nagpur Logic Gates, Timers, Flip-Flops & Counters Subhasish Chandra Assistant Professor Department of Physics Institute of Forensic Science, Nagpur Logic Gates Transistor NOT Gate Let I C be the collector current.

More information

Computer Architecture and Organization

Computer Architecture and Organization A-1 Appendix A - Digital Logic Computer Architecture and Organization Miles Murdocca and Vincent Heuring Appendix A Digital Logic A-2 Appendix A - Digital Logic Chapter Contents A.1 Introduction A.2 Combinational

More information

Read-only memory (ROM) Digital logic: ALUs Sequential logic circuits. Don't cares. Bus

Read-only memory (ROM) Digital logic: ALUs Sequential logic circuits. Don't cares. Bus Digital logic: ALUs Sequential logic circuits CS207, Fall 2004 October 11, 13, and 15, 2004 1 Read-only memory (ROM) A form of memory Contents fixed when circuit is created n input lines for 2 n addressable

More information

MODEL QUESTIONS WITH ANSWERS THIRD SEMESTER B.TECH DEGREE EXAMINATION DECEMBER CS 203: Switching Theory and Logic Design. Time: 3 Hrs Marks: 100

MODEL QUESTIONS WITH ANSWERS THIRD SEMESTER B.TECH DEGREE EXAMINATION DECEMBER CS 203: Switching Theory and Logic Design. Time: 3 Hrs Marks: 100 MODEL QUESTIONS WITH ANSWERS THIRD SEMESTER B.TECH DEGREE EXAMINATION DECEMBER 2016 CS 203: Switching Theory and Logic Design Time: 3 Hrs Marks: 100 PART A ( Answer All Questions Each carries 3 Marks )

More information

DepartmentofElectronicEngineering NEDUniversity ofengineering &Technology LABORATORY WORKBOOK DIGITAL LOGIC DESIGN (TC-201)

DepartmentofElectronicEngineering NEDUniversity ofengineering &Technology LABORATORY WORKBOOK DIGITAL LOGIC DESIGN (TC-201) DepartmentofElectronicEngineering NEDUniversity ofengineering &Technology LABORATORY WORKBOOK DIGITAL LOGIC DESIGN (TC-201) Instructor Name: Student Name: Roll Number: Semester: Batch: Year: Department:

More information

Chapter Contents. Appendix A: Digital Logic. Some Definitions

Chapter Contents. Appendix A: Digital Logic. Some Definitions A- Appendix A - Digital Logic A-2 Appendix A - Digital Logic Chapter Contents Principles of Computer Architecture Miles Murdocca and Vincent Heuring Appendix A: Digital Logic A. Introduction A.2 Combinational

More information

Introduction to Digital Electronics

Introduction to Digital Electronics Introduction to Digital Electronics by Agner Fog, 2018-10-15. Contents 1. Number systems... 3 1.1. Decimal, binary, and hexadecimal numbers... 3 1.2. Conversion from another number system to decimal...

More information

IT T35 Digital system desigm y - ii /s - iii

IT T35 Digital system desigm y - ii /s - iii UNIT - III Sequential Logic I Sequential circuits: latches flip flops analysis of clocked sequential circuits state reduction and assignments Registers and Counters: Registers shift registers ripple counters

More information

1. Convert the decimal number to binary, octal, and hexadecimal.

1. Convert the decimal number to binary, octal, and hexadecimal. 1. Convert the decimal number 435.64 to binary, octal, and hexadecimal. 2. Part A. Convert the circuit below into NAND gates. Insert or remove inverters as necessary. Part B. What is the propagation delay

More information

COMP12111: Fundamentals of Computer Engineering

COMP12111: Fundamentals of Computer Engineering COMP2: Fundamentals of Computer Engineering Part I Course Overview & Introduction to Logic Paul Nutter Introduction What is this course about? Computer hardware design o not electronics nothing nasty like

More information

Introduction to Digital Logic Missouri S&T University CPE 2210 Exam 3 Logistics

Introduction to Digital Logic Missouri S&T University CPE 2210 Exam 3 Logistics Introduction to Digital Logic Missouri S&T University CPE 2210 Exam 3 Logistics Egemen K. Çetinkaya Egemen K. Çetinkaya Department of Electrical & Computer Engineering Missouri University of Science and

More information

CS 261 Fall Mike Lam, Professor. Sequential Circuits

CS 261 Fall Mike Lam, Professor. Sequential Circuits CS 261 Fall 2018 Mike Lam, Professor Sequential Circuits Circuits Circuits are formed by linking gates (or other circuits) together Inputs and outputs Link output of one gate to input of another Some circuits

More information

Electrical and Telecommunications Engineering Technology_TCET3122/TC520. NEW YORK CITY COLLEGE OF TECHNOLOGY The City University of New York

Electrical and Telecommunications Engineering Technology_TCET3122/TC520. NEW YORK CITY COLLEGE OF TECHNOLOGY The City University of New York NEW YORK CITY COLLEGE OF TECHNOLOGY The City University of New York DEPARTMENT: SUBJECT CODE AND TITLE: COURSE DESCRIPTION: REQUIRED: Electrical and Telecommunications Engineering Technology TCET 3122/TC

More information

Introduction to Microprocessor & Digital Logic

Introduction to Microprocessor & Digital Logic ME262 Introduction to Microprocessor & Digital Logic (Sequential Logic) Summer 2 Sequential Logic Definition The output(s) of a sequential circuit depends d on the current and past states of the inputs,

More information

Logic Design Viva Question Bank Compiled By Channveer Patil

Logic Design Viva Question Bank Compiled By Channveer Patil Logic Design Viva Question Bank Compiled By Channveer Patil Title of the Practical: Verify the truth table of logic gates AND, OR, NOT, NAND and NOR gates/ Design Basic Gates Using NAND/NOR gates. Q.1

More information

Digital Circuits I and II Nov. 17, 1999

Digital Circuits I and II Nov. 17, 1999 Physics 623 Digital Circuits I and II Nov. 17, 1999 Digital Circuits I 1 Purpose To introduce the basic principles of digital circuitry. To understand the small signal response of various gates and circuits

More information

AIM: To study and verify the truth table of logic gates

AIM: To study and verify the truth table of logic gates EXPERIMENT: 1- LOGIC GATES AIM: To study and verify the truth table of logic gates LEARNING OBJECTIVE: Identify various Logic gates and their output. COMPONENTS REQUIRED: KL-31001 Digital Logic Lab( Main

More information

NH 67, Karur Trichy Highways, Puliyur C.F, Karur District UNIT-III SEQUENTIAL CIRCUITS

NH 67, Karur Trichy Highways, Puliyur C.F, Karur District UNIT-III SEQUENTIAL CIRCUITS NH 67, Karur Trichy Highways, Puliyur C.F, 639 114 Karur District DEPARTMENT OF ELETRONICS AND COMMUNICATION ENGINEERING COURSE NOTES SUBJECT: DIGITAL ELECTRONICS CLASS: II YEAR ECE SUBJECT CODE: EC2203

More information

Laboratory 1 - Introduction to Digital Electronics and Lab Equipment (Logic Analyzers, Digital Oscilloscope, and FPGA-based Labkit)

Laboratory 1 - Introduction to Digital Electronics and Lab Equipment (Logic Analyzers, Digital Oscilloscope, and FPGA-based Labkit) Massachusetts Institute of Technology Department of Electrical Engineering and Computer Science 6. - Introductory Digital Systems Laboratory (Spring 006) Laboratory - Introduction to Digital Electronics

More information

Analogue Versus Digital [5 M]

Analogue Versus Digital [5 M] Q.1 a. Analogue Versus Digital [5 M] There are two basic ways of representing the numerical values of the various physical quantities with which we constantly deal in our day-to-day lives. One of the ways,

More information

Sequential Logic and Clocked Circuits

Sequential Logic and Clocked Circuits Sequential Logic and Clocked Circuits Clock or Timing Device Input Variables State or Memory Element Combinational Logic Elements From combinational logic, we move on to sequential logic. Sequential logic

More information

Objectives. Combinational logics Sequential logics Finite state machine Arithmetic circuits Datapath

Objectives. Combinational logics Sequential logics Finite state machine Arithmetic circuits Datapath Objectives Combinational logics Sequential logics Finite state machine Arithmetic circuits Datapath In the previous chapters we have studied how to develop a specification from a given application, and

More information

Course Plan. Course Articulation Matrix: Mapping of Course Outcomes (COs) with Program Outcomes (POs) PSO-1 PSO-2

Course Plan. Course Articulation Matrix: Mapping of Course Outcomes (COs) with Program Outcomes (POs) PSO-1 PSO-2 Course Plan Semester: 4 - Semester Year: 2019 Course Title: DIGITAL ELECTRONICS Course Code: EC106 Semester End Examination: 70 Continuous Internal Evaluation: 30 Lesson Plan Author: Ms. CH SRIDEVI Last

More information

EE292: Fundamentals of ECE

EE292: Fundamentals of ECE EE292: Fundamentals of ECE Fall 2012 TTh 10:00-11:15 SEB 1242 Lecture 23 121120 http://www.ee.unlv.edu/~b1morris/ee292/ 2 Outline Review Combinatorial Logic Sequential Logic 3 Combinatorial Logic Circuits

More information

HS Digital Electronics Pre-Engineering

HS Digital Electronics Pre-Engineering Course This course covers fundamentals of analog and digital electronics. Students learn about the different number systems used in the design of digital circuitry. They design circuits to solve open-ended

More information

Chapter 6. Flip-Flops and Simple Flip-Flop Applications

Chapter 6. Flip-Flops and Simple Flip-Flop Applications Chapter 6 Flip-Flops and Simple Flip-Flop Applications Basic bistable element It is a circuit having two stable conditions (states). It can be used to store binary symbols. J. C. Huang, 2004 Digital Logic

More information

ECE 263 Digital Systems, Fall 2015

ECE 263 Digital Systems, Fall 2015 ECE 263 Digital Systems, Fall 2015 REVIEW: FINALS MEMORY ROM, PROM, EPROM, EEPROM, FLASH RAM, DRAM, SRAM Design of a memory cell 1. Draw circuits and write 2 differences and 2 similarities between DRAM

More information

Sequential Digital Design. Laboratory Manual. Experiment #3. Flip Flop Storage Elements

Sequential Digital Design. Laboratory Manual. Experiment #3. Flip Flop Storage Elements The Islamic University of Gaza Engineering Faculty Department of Computer Engineering Spring 2018 ECOM 2022 Khaleel I. Shaheen Sequential Digital Design Laboratory Manual Experiment #3 Flip Flop Storage

More information

Lecture 8: Sequential Logic

Lecture 8: Sequential Logic Lecture 8: Sequential Logic Last lecture discussed how we can use digital electronics to do combinatorial logic we designed circuits that gave an immediate output when presented with a given set of inputs

More information

QUICK GUIDE COMPUTER LOGICAL ORGANIZATION - OVERVIEW

QUICK GUIDE COMPUTER LOGICAL ORGANIZATION - OVERVIEW QUICK GUIDE http://www.tutorialspoint.com/computer_logical_organization/computer_logical_organization_quick_guide.htm COMPUTER LOGICAL ORGANIZATION - OVERVIEW Copyright tutorialspoint.com In the modern

More information

Digital Logic Design Sequential Circuits. Dr. Basem ElHalawany

Digital Logic Design Sequential Circuits. Dr. Basem ElHalawany Digital Logic Design Sequential Circuits Dr. Basem ElHalawany Combinational vs Sequential inputs X Combinational Circuits outputs Z A combinational circuit: At any time, outputs depends only on inputs

More information

DALHOUSIE UNIVERSITY Department of Electrical & Computer Engineering Digital Circuits - ECED 220. Experiment 4 - Latches and Flip-Flops

DALHOUSIE UNIVERSITY Department of Electrical & Computer Engineering Digital Circuits - ECED 220. Experiment 4 - Latches and Flip-Flops DLHOUSIE UNIVERSITY Department of Electrical & Computer Engineering Digital Circuits - ECED 0 Experiment - Latches and Flip-Flops Objectives:. To implement an RS latch memory element. To implement a JK

More information

CHAPTER 4: Logic Circuits

CHAPTER 4: Logic Circuits CHAPTER 4: Logic Circuits II. Sequential Circuits Combinational circuits o The outputs depend only on the current input values o It uses only logic gates, decoders, multiplexers, ALUs Sequential circuits

More information

Last time, we saw how latches can be used as memory in a circuit

Last time, we saw how latches can be used as memory in a circuit Flip-Flops Last time, we saw how latches can be used as memory in a circuit Latches introduce new problems: We need to know when to enable a latch We also need to quickly disable a latch In other words,

More information

TIME SCHEDULE. MODULE TOPICS PERIODS 1 Number system & Boolean algebra 17 Test I 1 2 Logic families &Combinational logic

TIME SCHEDULE. MODULE TOPICS PERIODS 1 Number system & Boolean algebra 17 Test I 1 2 Logic families &Combinational logic COURSE TITLE : DIGITAL INSTRUMENTS PRINCIPLE COURSE CODE : 3075 COURSE CATEGORY : B PERIODS/WEEK : 4 PERIODS/SEMESTER : 72 CREDITS : 4 TIME SCHEDULE MODULE TOPICS PERIODS 1 Number system & Boolean algebra

More information

Music Electronics Finally DeMorgan's Theorem establishes two very important simplifications 3 : Multiplexers

Music Electronics Finally DeMorgan's Theorem establishes two very important simplifications 3 : Multiplexers Music Electronics Finally DeMorgan's Theorem establishes two very important simplifications 3 : ( A B )' = A' + B' ( A + B )' = A' B' Multiplexers A digital multiplexer is a switching element, like a mechanical

More information

Department of Computer Science and Engineering Question Bank- Even Semester:

Department of Computer Science and Engineering Question Bank- Even Semester: Department of Computer Science and Engineering Question Bank- Even Semester: 2014-2015 CS6201& DIGITAL PRINCIPLES AND SYSTEM DESIGN (Common to IT & CSE, Regulation 2013) UNIT-I 1. Convert the following

More information

CHAPTER 1 LATCHES & FLIP-FLOPS

CHAPTER 1 LATCHES & FLIP-FLOPS CHAPTER 1 LATCHES & FLIP-FLOPS 1 Outcome After learning this chapter, student should be able to; Recognize the difference between latches and flipflops Analyze the operation of the flip flop Draw the output

More information

Copyright 2011 by Enoch Hwang, Ph.D. and Global Specialties. All rights reserved. Printed in Taiwan.

Copyright 2011 by Enoch Hwang, Ph.D. and Global Specialties. All rights reserved. Printed in Taiwan. Copyright 2011 by Enoch Hwang, Ph.D. and Global Specialties All rights reserved. Printed in Taiwan. No part of this publication may be reproduced, stored in a retrieval system or transmitted, in any form

More information

MAHARASHTRA STATE BOARD OF TECHNICAL EDUCATION (Autonomous) (ISO/IEC Certified) WINTER 2018 EXAMINATION MODEL ANSWER

MAHARASHTRA STATE BOARD OF TECHNICAL EDUCATION (Autonomous) (ISO/IEC Certified) WINTER 2018 EXAMINATION MODEL ANSWER Important Instructions to examiners: 1) The answers should be examined by key words and not as word-to-word as given in themodel answer scheme. 2) The model answer and the answer written by candidate may

More information

Flip Flop. S-R Flip Flop. Sequential Circuits. Block diagram. Prepared by:- Anwar Bari

Flip Flop. S-R Flip Flop. Sequential Circuits. Block diagram. Prepared by:- Anwar Bari Sequential Circuits The combinational circuit does not use any memory. Hence the previous state of input does not have any effect on the present state of the circuit. But sequential circuit has memory

More information

DIGITAL SYSTEM DESIGN UNIT I (2 MARKS)

DIGITAL SYSTEM DESIGN UNIT I (2 MARKS) DIGITAL SYSTEM DESIGN UNIT I (2 MARKS) 1. Convert Binary number (111101100) 2 to Octal equivalent. 2. Convert Binary (1101100010011011) 2 to Hexadecimal equivalent. 3. Simplify the following Boolean function

More information

The word digital implies information in computers is represented by variables that take a limited number of discrete values.

The word digital implies information in computers is represented by variables that take a limited number of discrete values. Class Overview Cover hardware operation of digital computers. First, consider the various digital components used in the organization and design. Second, go through the necessary steps to design a basic

More information

DIGITAL CIRCUIT LOGIC UNIT 11: SEQUENTIAL CIRCUITS (LATCHES AND FLIP-FLOPS)

DIGITAL CIRCUIT LOGIC UNIT 11: SEQUENTIAL CIRCUITS (LATCHES AND FLIP-FLOPS) DIGITAL CIRCUIT LOGIC UNIT 11: SEQUENTIAL CIRCUITS (LATCHES AND FLIP-FLOPS) 1 iclicker Question 16 What should be the MUX inputs to implement the following function? (4 minutes) f A, B, C = m(0,2,5,6,7)

More information

DIGITAL ELECTRONICS LAB MANUAL FOR 2/4 B.Tech (ECE) COURSE CODE: EC-252

DIGITAL ELECTRONICS LAB MANUAL FOR 2/4 B.Tech (ECE) COURSE CODE: EC-252 DIGITAL ELECTRONICS LAB MANUAL FOR /4 B.Tech (ECE) COURSE CODE: EC-5 PREPARED BY P.SURENDRA KUMAR M.TECH, Lecturer D.SWETHA M.TECH, Lecturer T Srinivasa Rao M.TECH, Lecturer Ch.Madhavi, Lab Assistant 009-00

More information

Digital Circuits 4: Sequential Circuits

Digital Circuits 4: Sequential Circuits Digital Circuits 4: Sequential Circuits Created by Dave Astels Last updated on 2018-04-20 07:42:42 PM UTC Guide Contents Guide Contents Overview Sequential Circuits Onward Flip-Flops R-S Flip Flop Level

More information

Assignment 2b. ASSIGNMENT 2b. due at the start of class, Wednesday Sept 25.

Assignment 2b. ASSIGNMENT 2b. due at the start of class, Wednesday Sept 25. ASSIGNMENT 2b due at the start of class, Wednesday Sept 25. For each section of the assignment, the work that you are supposed to turn in is indicated in italics at the end of each problem or sub-problem.

More information

COMP2611: Computer Organization. Introduction to Digital Logic

COMP2611: Computer Organization. Introduction to Digital Logic 1 COMP2611: Computer Organization Sequential Logic Time 2 Till now, we have essentially ignored the issue of time. We assume digital circuits: Perform their computations instantaneously Stateless: once

More information

In this chapter, you will...

In this chapter, you will... In this chapter, you will... Master Boolean algebra. Learn about different types of logic. Discover logic symbols and circuits. Try your hand at logic design. Understand sequential logic circuits. Up until

More information

MUHAMMAD NAEEM LATIF MCS 3 RD SEMESTER KHANEWAL

MUHAMMAD NAEEM LATIF MCS 3 RD SEMESTER KHANEWAL 1. A stage in a shift register consists of (a) a latch (b) a flip-flop (c) a byte of storage (d) from bits of storage 2. To serially shift a byte of data into a shift register, there must be (a) one click

More information

SEMESTER ONE EXAMINATIONS 2002

SEMESTER ONE EXAMINATIONS 2002 SEMESTER ONE EXAMINATIONS 2002 EE101 Digital Electronics Solutions Question 1. An assembly line has 3 failsafe sensors and 1 emergency shutdown switch. The Line should keep moving unless any of the following

More information

REPEAT EXAMINATIONS 2002

REPEAT EXAMINATIONS 2002 REPEAT EXAMINATIONS 2002 EE101 Digital Electronics Solutions Question 1. An engine has 4 fail-safe sensors. The engine should keep running unless any of the following conditions arise: o If sensor 2 is

More information

Sequential Logic Circuits

Sequential Logic Circuits Sequential Logic Circuits By Dr. M. Hebaishy Digital Logic Design Ch- Rem.!) Types of Logic Circuits Combinational Logic Memoryless Outputs determined by current values of inputs Sequential Logic Has memory

More information

CSE115: Digital Design Lecture 23: Latches & Flip-Flops

CSE115: Digital Design Lecture 23: Latches & Flip-Flops Faculty of Engineering CSE115: Digital Design Lecture 23: Latches & Flip-Flops Sections 7.1-7.2 Suggested Reading A Generic Digital Processor Building Blocks for Digital Architectures INPUT - OUTPUT Interconnect:

More information

North Shore Community College

North Shore Community College North Shore Community College Course Number: IEL217 Section: MAL Course Name: Digital Electronics 1 Semester: Credit: 4 Hours: Three hours of Lecture, Two hours Laboratory per week Thursdays 8:00am (See

More information

MC9211 Computer Organization

MC9211 Computer Organization MC9211 Computer Organization Unit 2 : Combinational and Sequential Circuits Lesson2 : Sequential Circuits (KSB) (MCA) (2009-12/ODD) (2009-10/1 A&B) Coverage Lesson2 Outlines the formal procedures for the

More information

Name Of The Experiment: Sequential circuit design Latch, Flip-flop and Registers

Name Of The Experiment: Sequential circuit design Latch, Flip-flop and Registers EEE 304 Experiment No. 07 Name Of The Experiment: Sequential circuit design Latch, Flip-flop and Registers Important: Submit your Prelab at the beginning of the lab. Prelab 1: Construct a S-R Latch and

More information

[2 credit course- 3 hours per week]

[2 credit course- 3 hours per week] Syllabus of Applied Electronics for F Y B Sc Semester- 1 (With effect from June 2012) PAPER I: Components and Devices [2 credit course- 3 hours per week] Unit- I : CIRCUIT THEORY [10 Hrs] Introduction;

More information

Introduction to Sequential Circuits

Introduction to Sequential Circuits Introduction to Sequential Circuits COE 202 Digital Logic Design Dr. Muhamed Mudawar King Fahd University of Petroleum and Minerals Presentation Outline Introduction to Sequential Circuits Synchronous

More information

Multiplexor (aka MUX) An example, yet VERY useful circuit!

Multiplexor (aka MUX) An example, yet VERY useful circuit! Multiplexor (aka MUX) An example, yet VERY useful circuit! A B 0 1 Y S A B Y 0 0 x 0 0 1 x 1 1 x 0 0 1 x 1 1 S=1 S=0 Y = (S)? B:A; Y=S A+SB when S = 0: output A 1: output B 56 A 32-bit MUX Use 32 1-bit

More information

Digital Electronics Course Outline

Digital Electronics Course Outline Digital Electronics Course Outline PLTW Engineering Digital Electronics Open doors to understanding electronics and foundations in circuit design. Digital electronics is the foundation of all modern electronic

More information

SEQUENTIAL LOGIC. Satish Chandra Assistant Professor Department of Physics P P N College, Kanpur

SEQUENTIAL LOGIC. Satish Chandra Assistant Professor Department of Physics P P N College, Kanpur SEQUENTIAL LOGIC Satish Chandra Assistant Professor Department of Physics P P N College, Kanpur www.satish0402.weebly.com OSCILLATORS Oscillators is an amplifier which derives its input from output. Oscillators

More information

COE 202: Digital Logic Design Sequential Circuits Part 1. Dr. Ahmad Almulhem ahmadsm AT kfupm Phone: Office:

COE 202: Digital Logic Design Sequential Circuits Part 1. Dr. Ahmad Almulhem   ahmadsm AT kfupm Phone: Office: COE 202: Digital Logic Design Sequential Circuits Part 1 Dr. Ahmad Almulhem Email: ahmadsm AT kfupm Phone: 860-7554 Office: 22-324 Objectives Sequential Circuits Memory Elements Latches Flip-Flops Combinational

More information

RS flip-flop using NOR gate

RS flip-flop using NOR gate RS flip-flop using NOR gate Triggering and triggering methods Triggering : Applying train of pulses, to set or reset the memory cell is known as Triggering. Triggering methods:- There are basically two

More information

(CSC-3501) Lecture 7 (07 Feb 2008) Seung-Jong Park (Jay) CSC S.J. Park. Announcement

(CSC-3501) Lecture 7 (07 Feb 2008) Seung-Jong Park (Jay)  CSC S.J. Park. Announcement Seung-Jong Park (Jay) http://www.csc.lsu.edu/~sjpark Computer Architecture (CSC-3501) Lecture 7 (07 Feb 2008) 1 Announcement 2 1 Combinational vs. Sequential Logic Combinational Logic Memoryless Outputs

More information

Reaction Game Kit MitchElectronics 2019

Reaction Game Kit MitchElectronics 2019 Reaction Game Kit MitchElectronics 2019 www.mitchelectronics.co.uk CONTENTS Schematic 3 How It Works 4 Materials 6 Construction 8 Important Information 9 Page 2 SCHEMATIC Page 3 SCHEMATIC EXPLANATION The

More information