UNIVERSITI MALAYSIA PERLIS. EKT 124 Digital Electronics1 [Elektronik Digit 1]

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1 SULIT UNIVERSITI MALAYSIA PERLIS Peperiksaan Akhir Semester Kedua Sidang Akademik 2016/2017 Jun 2017 EKT 124 Digital Electronics1 [Elektronik Digit 1] Masa : 3 jam Please make sure that this paper has FIFTEEN (15) printed pages including this front page before you start the examination. [Sila pastikan kertas soalan ini mengandungi LIMA BELAS (15) muka surat yang bercetak termasuk muka hadapan sebelum anda memulakan peperiksaan ini.] This question paper has SIX (6) questions. Answer only FIVE (5) questions. [Kertas soalan ini mengandungi ENAM (6) soalan. Jawab hanya LIMA (5) soalan sahaja.] Please attach Appendix 1 and Appendix 2 together with the answer script. [Sila kepilkan Lampiran 1 dan Lampiran 2 bersama-sama skrip jawapan.] Section A : This section has FOUR (4) questions. Answer ALL questions. (80 marks) [Bahagian A : Bahagian ini ada EMPAT (4) soalan. Jawab SEMUA soalan. (80 markah)] Section B : Answer any ONE (1) question. (20 marks) [Bahagian B : Jawab mana-mana SATU (1) soalan. (20 markah)]

2 SULIT -2- (EKT124) SECTION A [Bahagian A] Question 1 [Soalan 1] (C1,CO1,PO1) (a) Illustrate the difference between digital waveform and analog waveform. [Terangkan perbezaan di antara bentuk gelombang digital dan bentuk gelombang analog.] (2 marks/markah) (C2,CO1,PO1) (b) Convert to hexadecimal. [Tukar kepada perenambelasan.] (3 marks/markah) (C3,CO1,PO1) (c) Demonstrate the calculation for the following arithmetic operations without converting the numbers to decimal. [Tunjukkan pengiraan untuk operasi aritmetik berikut tanpa menukar nombor kepada nombor perpuluhan.] (i) Binary multiplication of and [Pendaraban perdua dan 1101.] (ii) Hexadecimal addition of 3741 and [Penambahan perenambelas 3741 dan 5589.] (C3,CO2,PO1) (d) Given a Boolean expression as below: [Diberi ungkapan Boolean seperti di bawah:] (7 marks/markah) A (A + B) + (B + A)(A + B ) (i) Write simplified expression using Boolean algebra. [Tulis ungkapan teringkas menggunakan algebra Boolean.] (ii) Sketch the logic circuit of the simplified expression. [Lakar litar logik bagi ungkapan yang telah dipermudahkan.] (8 marks/markah) 3/--

3 SULIT -3- (EKT124) Question 2 [Soalan 2] (C2,CO1,PO1) (a) Given magnitude value of 3310 is and 2710 is Compute addition of 3310 and 2710 in 2 s complement representation. [Diberi nilai magnitud ialah dan ialah Kira penambahan dan di dalam perwakilan pelengkap 2.] (2 Marks/markah) (C3,CO2,PO1) (b) Given a function [Diberi satu fungsi] (i) (ii) Construct a truth table. [Bina satu jadual kebenaran.] F(A,B,C,D) = πm(1,3,4,5,6,9,11,13,14) Produce a minimized Sum of Product (SOP) expression using Karnaugh Maps (K- Map). [Hasilkan pernyataan Sum of Product (SOP) termudah menggunakan peta Karnaugh (Peta-K).] (iii) Based on the truth table in b(i), complete waveform in Appendix 1. [Berdasarkan jadual kebenaran di b(i), lengkapkan gelombang di Lampiran 1.] (C4,CO3,PO2) (c) Figure 1 shows a 3-bit Carry Ripple Adder. An n-bit subtractor can be build using a full subtractor or an n-bit adder and n inverters. Using Figure 1, demonstrate the subtraction of X-Y ( ) by determining the complete sum, Σ and intermediate carries, Cout throughout the process. [Rajah 1 menunjukkan penambah bawaan riak 3-bit. Penolak n-bit boleh dibina menggunakan penolak penuh atau penambah n-bit dan n penyongsang. Menggunakan Rajah 1, demonstrasikan penolakan X-Y ( ) dengan menentukan jumlah akhir, Σ dan perantaraan bawaan, Cout di sepanjang proses.] 4/--

4 SULIT -4- (EKT124) Figure 1 [Rajah 1] (6 Marks/markah) 5/--

5 SULIT -5- (EKT124) (C3,CO3,PO2) Question 3 [Soalan3] Function of a multiplexer (MUX) is to select one of several input signals and passes it to the output. [Fungsi pemultipleks (MUX) ialah memilih satu dari beberapa gelombang isyarat dan menghantar kepada keluaran.] (a) Sketch a complete logic circuit of a four to one (4:1) MUX based on the selection table in Table 1. [Lakar litar logik penuh bagi MUX empat kepada satu (4:1) berdasarkan jadual pilihan di Jadual 1.] Table 1 [Jadual 1] S1 S0 Output 0 0 Z = I3 0 1 Z = I2 1 0 Z = I1 1 1 Z = 10 (9 Marks/markah) (b) Sketch a block diagram of a sixteen to one (16:1) MUX using four to one (4:1) MUX using cascading method. [Lakar gambarajah blok enambelas kepada satu (16:1) MUX menggunakan empat kepada satu (4:1) MUX menggunakan kaedah lataan.] A decoder is a circuit that creates an output based on the binary states of a given input. [Pengekod adalah litar yang menghasilkan keluaran berasaskan keadaan binari bagi masukan yang diberikan.] (c) Produce a truth table for the 3-to-8 line active high decoder. [Hasilkan jadual kebenaran pengekod aktif tinggi 3-kepada-8 aliran.] (2 Marks/markah) (d) Based on the truth table in (c), sketch the equivalent schematic diagram. Write the equation for each output. [Berdasarkan jadual kebenaran di (c), lakar gambarajah skematik yang setara. Tuliskan ungkapan bagi setiap keluaran.] (6 Marks/markah) 6/--

6 SULIT -6- (EKT124) Question 4 [Soalan4] Two 4-bit shift registers and a flip-flop can be used in a serial adder to store the result of an addition operation. [Dua buah daftar anjak 4-bit dan flip-flop boleh digunakan dalam penambah sesiri untuk menyimpan hasil daripada operasi penambahan.] (C3,CO4,PO2) (a) Sketch a schematic diagram of one 4-bit serial in/parallel out shift register using D flip-flops. [Lakar satu gambarajah skematik satu daftar anjak 4-bit sesiri masuk/selari keluar menggunakan flip-flop D.] (C4,CO4,PO2) (b) The sequence of is applied to the input of a 4-bit shift registers that is initially cleared. Determine the state of the following 4-bit shift registers after four clock pulses. [Turutan digunakan untuk masukan di daftar anjakan 4-bit yang mulanya dikosongkan. Tentukan keadaan daftar anjakan 4-bit yang berikut selepas empat denyut jam.] (i) (ii) (iii) Serial in/serial out shift register [Daftar anjak sesiri masuk/sesiri keluar] Serial in/parallel out shift register [Daftar anjak sesiri masuk/selari keluar] Parallel in/parallel out shift register [Daftar anjak selari masuk/selari keluar] (c) The output of a latch and a flip-flop depends on their current inputs and previous output. [Keluaran latch dan flip-flop bergantung kepada masukan terkini dan keluaran sebelumnya.] (C1,CO4,PO2) (i) State ONE (1) main difference between a latch and a flip-flop. [Nyatakan SATU (1) perbezaan utama di antara latch dan flip-flop.] (1 Mark/markah) (C2,CO4,PO2) (ii) Explain the definition of synchronous input and asynchronous input for flip-flops. [Terangkan definisi masukan segerak dan masukan tak segerak untuk flip-flop.] (2 Marks/markah) 7/--

7 SULIT -7- (EKT124) (d) Figure 2 shows how flip-flops are used in a basic register for parallel data storage. [Rajah 2 menunjukkan bagaimana flip-flop digunakan di dalam daftar asas untuk penyimapanan data selari.] Figure 2 [Rajah 2] (C1,CO4,PO2) (i) Determine the type of flip-flops in Figure 2. [Tentukan jenis flip-flop di Rajah 2.] (C1,CO4,PO2) (ii) State the function of signal CLR in Figure 2? [Nyatakan fungsi signal CLR di Rajah 2.] (1 Mark/markah) (1 Mark/markah) (C4,CO4,PO2) (iii) Analyze the operation of the register circuit in the Figure 2 for the given input waveforms in Appendix 2. Assume that the initial condition is Q3Q2Q1Q0 = Construct the output waveforms using Appendix 2. Consider the given CLR input. [Analisa operasi litar daftar di Rajah 2 bagi gelombang masukan yang diberikan di Lampiran 2. Andaikan bahawa keadaan awal adalah Q 3Q 2Q 1Q 0 = Binakan bentuk gelombang keluaran menggunakan Lampiran 2. Pertimbangkan masukan CLR yang diberikan.] (8 Marks/markah) 8/--

For example, after four pulses have occurred, the counter outputs are DCBA = 01002 = 410. The counter resets to 0000 on the tenth pulse and starts counting over again.

8 SULIT -8- (EKT124) Section B [Bahagian B] Answer ANY ONE (1) question in this section. [Jawab MANA-MANA SATU (1) soalan di bahagian ini.] Question 5 [Soalan 5] (C4,CO3,PO2) (a) Figure 3 shows a BCD counter that produces a four-bit output representing the BCD code for the number of pulses that have been applied to the counter input. For example, after four pulses have occurred, the counter outputs are DCBA = = 410. The counter resets to 0000 on the tenth pulse and starts counting over again. In other words, the DCBA outputs will never represent a number greater than = 910. Design the logic circuit that produces a HIGH output whenever the count is 2, 3 or 9. [Rajah 3 menunjukkan pembilang BCD yang menghasilkan keluaran empat-bit mewakili kod BCD untuk bilangan denyutan yang telah digunakan untuk masukan pembilang. Sebagai contoh, selepas empat denyutan berlaku, keluaran pembilang adalah DCBA = = Pembilang akan reset semula kepada 0000 pada denyutan yang kesepuluh dan mula mengira lagi. Dalam erti kata lain, keluaran DCBA tidak akan mewakili nombor yang lebih besar daripada = Rekabentuk litar logik yang menghasilkan keluaran TINGGI ketika kiraan adalah 2, 3 atau 9.] Figure 3 [Rajah 3] (i) Derive the Truth Table for the system shown in Figure 3. [Terbitkan Jadual Kebenaran untuk sistem yang ditunjukkan di Rajah 3.] (ii) Derive the simplified Boolean expression using Karnaugh-Maps (K-Maps). [Terbitkan penyataan Boolean yang paling ringkas menggunakan Peta Karnaugh (Peta-K).] (iii) Construct the complete circuit based on the expression in (ii). [Bina sebuah litar lengkap berdasarkan pernyataan di (ii).] 9/--

9 SULIT -9- (EKT124) (C5,CO4,PO2,PO11) (b) Figure 4 shows a state diagram of a Gray code up counter. Design the counter using D flipflop. [Rajah 4 menunjukkan gambarajah keadaan bagi pembilang menaik kod kelabu. Rekabentuk pembilang tersebut menggunakan flip-flop D.] Counting up (Y=1) [Kiraan menaik (Y=1)] Figure 4 [Rajah 4] (i) Derive the State Table for the counter in Figure 4. [Terbitkan Jadual Keadaan untuk pembilang di Rajah 4.] (ii) Derive the simplified Boolean expression for each flip-flop using Karnaugh-Maps (K-Maps). [Terbitkan penyataan Boolean yang paling ringkas untuk setiap flip-flop menggunakan Peta Karnaugh (Peta-K).] (iii) Construct the complete circuit based on the expression in (ii). [Bina sebuah litar lengkap berdasarkan pernyataan di (ii).] 10/--

10 SULIT -10- (EKT124) Question 6 [Soalan 6] (C4,CO3,PO2) (a) Figure 5 shows four switches that are part of the control circuitry in a copy machine. The switches are at various points along the path of the copy paper as the paper passes through the machine. Each switch is normally open, and as the paper passes over a switch, the switches closes. It is impossible for SW 1 and SW4 to be closed at the same time. Design the logic circuit to produce a HIGH output whenever two or more switches are closed at the same time. [Rajah 5 menunjukkan empat suis yang merupakan sebahagian daripada litar kawalan di dalam mesin salinan. Suis berada di pelbagai poin sepanjang perjalanan semasa proses salinan kertas yang melalui mesin. Setiap suis biasanya terbuka, dan apabila kertas melepasi suis, suis ditutup. Ia adalah mustahil untuk SW 1 dan SW4 ditutup pada masa yang sama. Reka bentuk litar logik untuk menghasilkan keluaran TINGGI apabila dua atau lebih suis ditutup pada masa yang sama.] Figure 5 [Rajah 5] (i) Derive the Truth Table for the system in Figure 5. [Terbitkan Jadual Kebenaran untuk sistem di Rajah 5.] (ii) (iii) Derive the simplified Boolean expression using Karnaugh-Maps (K-Maps). [Terbitkan penyataan Boolean yang paling ringkas menggunakan Peta Karnaugh (Peta-K).] Construct the complete circuit based on expression in (ii). [Bina sebuah litar lengkap berdasarkan pernyataan di (ii).] 11/--

11 SULIT -11- (EKT124) (C5,CO4,PO2,PO11) (b) Figure 6 shows a state diagram of a Gray code down counter. Design the counter using T flip-flop. [Rajah 6 menunjukkan gambarajah keadaan bagi pembilang menurun kod kelabu. Rekabentuk pembilang tersebut menggunakan flip-flop T.] Counting down (Y=0) [Kiraan menurun(y=0)] Figure 6 [Rajah 6] (i) Derive the State Table for the counter in Figure 6. [Terbitkan Jadual Keadaan untuk pembilang di Rajah 6.] (ii) Derive the simplified Boolean expression for each flip-flop using Karnaugh-Maps (K-Maps). [Terbitkan penyataan Boolean yang paling ringkas untuk setiap flip-flop menggunakan Peta Karnaugh (Peta-K).] (iii) Construct the complete circuit based on expression in (ii). [Bina sebuah litar lengkap berdasarkan pernyataan di (ii).] 12/--

12 SULIT -12- (EKT124) Appendix 1: [Lampiran 1:] Angka Giliran: No. Meja: A B C D 13/--

13 SULIT -13- (EKT124) Appendix 2: [Lampiran 2:] Angka Giliran: No. Meja: CLK D0 D1 D2 D3 CLR -ooo0ooo-

14 SULIT -14- (EKT124) Transition Table for a D flip-flop [Jadual Peralihan untuk flip-flop D.] Q(t) Q(t+1) DR Transition Table for a T flip-flop [Jadual Peralihan untuk flip-flop T.] Q(t) Q(t+1) DR

15 SULIT -15- (EKT124) Course Outcomes (COs) CO1 CO2 CO3 CO4 Ability to identify different numbering systems and to understand basic theory of binary system. Ability to apply method of minimizing Boolean functions for digital logic circuit. Ability to design and evaluate combinational logic circuit in terms of Boolean function. Ability to design and evaluate sequential logic circuit in terms of Boolean function. Program Outcomes (POs) PO 01 PO 02 PO 03 PO 04 PO 05 PO 06 PO 07 PO 08 PO 09 PO 10 PO 11 PO 12 Ability to acquire and apply knowledge of mathematics, science, engineering and an in-depth technical competence in computer engineering discipline to solve the complex engineering problem Ability to identify, formulate and solve complex engineering problems. Ability to design solutions for complex engineering problems and systems, components or processes to meet desired needs. Ability to conduct investigation into complex problems as well as to analyze and interpret data. Ability to use techniques, skills and modern engineering tools necessary for complex engineering practices so as to be easily adaptable to industrial needs. Understanding of the social, cultural, global and environmental responsibilities of a professional engineer. Ability to have entrepreneurship, the process of innovation and the need for environmental and sustainable development. Ability to understand the professional and ethical responsibilities and commitment to the community. Ability to function on multi-disciplinary teams. Ability to communicate effectively on complex engineering activities with the engineering community and with society at large A Recognition of the need for, and an ability to engage in life-long learning Demonstrate the understanding of project management and finance principles

UNIVERSITI MALAYSIA PERLIS. EKT 124 Digital Electronics 1 [Electronik Digit 1]

UNIVERSITI MALAYSIA PERLIS. EKT 124 Digital Electronics 1 [Electronik Digit 1] UNIVERSITI MALAYSIA PERLIS Peperiksaan Semester Kedua Sidang Akademik 2013/2014 May 2014 EKT 124 Digital Electronics 1 [Electronik Digit 1] Duration : 3 hours Masa : 3 jam Please make sure that this paper