The Discussion of this exercise covers the following points:

Transcription

1 Exercise 3-1 Digital Baseband Processing EXERCISE OBJECTIVE When you have completed this exercise, you will be familiar with various types of baseband processing used in digital satellite communications. DISCUSSION OUTLINE The Discussion of this exercise covers the following points: Time division multiplexing (TDM) Scrambling Descrambler impulse response Clock Encoding Other types of digital baseband processing Transmission rate of encoded signals DISCUSSION In digital Satellite communications, many different processing techniques are applied to the baseband digital signals before modulation at the transmitter. These include multiplexing, scrambling, encryption, channel encoding (error correction), and interleaving. At the receiver, similar processing techniques are applied to the demodulated digital signals in order to recover the data and correct transmission errors. Time division multiplexing (TDM) Although communications satellites usually have many transponders, each of which provides a separate communications channel, the cost per channel of implementing and operating the system is very high. Multiplexing is a method by which multiple analog signals or digital data streams are combined into one signal for transmission through a single channel. The purpose of multiplexing is to share an expensive resource. One of the main advantages of digital transmission is the ease with which a number of different baseband digital signals can be combined using time division multiplexing. Time division multiplexing (TDM) is a type of multiplexing where two or more data streams (sub-channels) are transmitted over the same communications channel by periodically allocating a time interval, called a time slot (or timeslot), to each data stream. In other words, the input data streams take turns using the full bandwidth of the communications channel. At the transmitting end, the multiplexer (MUX) combines several low bit-rate input data streams into one high bit-rate multiplexed stream, as shown in Figure At the receiving end, the multiplexed data stream is separated into the original low bit-rate data streams by a demultiplexer (DEMUX). Festo Didactic

2 Ex. 3-1 Digital Baseband Processing Discussion a a a a High bit-rate multiplexed data a a a a b b b b TDM MUX a b c a b c a b c TDM DEMUX b b b b c c c c Frame c c c c Low bit-rate data streams to be multiplexed Time Slots Figure Time-division multiplexing. Demultiplexed low bit-rate data streams The number of bits transmitted during each time slot depends on the relative bit rate of each input data stream and on the type of application. In the simplest case, all input streams have the same bit rate, and each time slot contains only one bit taken from successive streams. In many cases, however, multiple bits from each input stream are transmitted during each time slot. It is also possible that there is no relation between the bit rates of the individual input data streams and the rate at which the MUX scans these data streams. Another type of TDM, called statistical time division multiplexing, dynamically allocates time slices on demand to the different input data streams, instead of scanning each input data stream sequentially. This avoids transmitting empty slots and results in more efficient use of the link. In the simplest case, the TDM multiplexer acts as a multiple position switch, scanning each input data stream sequentially and connecting each input data stream in turn, for the duration of one time slot, to the output. This cycle is repeated over and over at a predefined rate. This type of TDM is called synchronous time division multiplexing. The multiplexed data is arranged into fixed-size transmission units called frames. With synchronous TDM, each frame contains the bits output by the multiplexer during a specific number of scans. A method must be provided for the demultiplexer in the receiver to correctly separate the multiplexed bits in order to recover the original data streams. To do this, the demultiplexer must be able to identify the beginning of each frame. One method is to add a fixed sequence of bits, called framing bits, to the data stream. At the beginning of a transmission, the frame recovery section of the TDM demultiplexer tries to detect the repeating sequence of framing bits in the received stream of multiplexed bits. Until it does, the data at the output of the demultiplexer is invalid. Once this sequence is detected, synchronization has occurred and the demultiplexer knows where each new frame begins. It is then able to correctly separate the bits. In digital telephony, speech from a telephone conversation is sampled at a sampling frequency fs of 8 khz and each sample is converted into eight bits of digital data. The resulting digital signal has a bit rate Rb of 64 kbit/s. Using TDM, a number of these digitized telephone signals can be sent simultaneously over a single communications channel. In North America and Japan, the Digital Signal 1 (DS1, also known as T1) multiplexing scheme is used. With this scheme, 24 different digital telephone signals are multiplexed and one sample (eight bits) of each digital signal is transmitted during each time slot. After transmitting 24 eight-bit samples (192 bits), an additional framing bit is transmitted for synchronization. Each frame consists therefore of 193 bits. The multiplexed signal is transmitted at a rate of 8000 frames per second (1.544 Mbit/s). Each frame has a duration of 125 µs. To achieve higher transmission rates, a number of T1 signals can be multiplexed 170 Festo Didactic

3 Ex. 3-1 Digital Baseband Processing Discussion together using schemes known as T2, T3, etc. This is known as the T-carrier hierarchy. In Europe, a similar system known as the CEPT hierarchy is used. The first level of this hierarchy consists of multiplexing 30 eight-bit telephone signals per frame along with 16 bits for synchronization and signaling. The multiplexed signal is transmitted at a rate of 8000 frames per second (2.048 Mbit/s). Each frame has a duration of 125 µs. The TDM MUX in the Earth Station Transmitter The TDM MUX in the Earth Station Transmitter is controlled by the 20 MHz bit clock signal generated by the Timing block. One cycle of the bit clock signal corresponds to one time slot. The MUX acts as a multiple position switch, scanning the input data streams sequentially and connecting each input data stream in turn, for the duration of one time slot, to the output. The TDM MUX, however, does not have a sample and hold circuit. If an input signal changes state during its time slot, the MUX output will also change state during the time slot. For this reason, the MUX output is not a true digital signal since a digital signal can only change state at the bit interval boundaries. The MUX output must be sampled once per time slot by a clocked digital circuit in order to become a true digital signal. This is accomplished either by the Scrambler, if it is on, or by the Clock & Frame Encoder. When transmitting multiplexed data, the Clock & Frame Encoder must be on because it adds the framing information necessary for the TDM DEMUX at the receiver to correctly demultiplex the data. Scrambling With digital transmission, if the baseband data stream contains a repeated pattern of bits, power in the transmitted RF signal may not be spread smoothly over the signal bandwidth. Instead, the power may be concentrated at certain frequencies. This appears in the spectrum of the RF signal as strong peaks. These strong peaks in the transmitted power spectrum may have undesirable consequences. One is that the power of these peaks may exceed the maximum allowed ground level power density, resulting in interference between communication systems using the same frequency band. Another is that strong frequency peaks in noise or interference may coincide with the frequency peaks in the signal, resulting in increased transmission errors. To limit these effects, energy dispersion is used to modify the baseband signal before modulation. The energy dispersion technique used with digital modulation is called scrambling. The purpose of data scrambling and descrambling The purpose of scrambling and descrambling is not necessarily for security or secrecy. In most communication systems, the input data is scrambled only to ensure frequent transitions and to avoid situations where periodic data or a repetitive input produces very little change in the signal. Frequent transitions are required for timing recovery and for proper operation of automatic gain control Festo Didactic

4 Ex. 3-1 Digital Baseband Processing Discussion circuits. Ideally, a modulated signal should have many transitions and all the points in the constellation should be visited at regular intervals. Scrambling ensures this condition for any input data. Scrambling also makes the power spectrum independent of the transmitted data, spreading the power smoothly over the available bandwidth. This reduces radio frequency interference and channel crosstalk, because the power is not concentrated in a narrow frequency band. When scrambling is used, the input data is passed through the scrambler before modulation. Then the modulated signal is passed through the communications channel and is demodulated. Finally, the demodulated data is passed through the descrambler to recover the original data. Scrambling and descrambling circuits The basic circuit for a scrambler is a linear feedback shift register. This consists of a group of registers with the output of one register connected to the input of the next so that data is shifted one position down the line at each clock cycle (see Figure 3-15). The feedback is produced by connections (taps) from specific registers. The outputs of these taps are combined using the exclusive-or (XOR) operation ( ) and the resulting feedback sequence is XORed with the input data stream. The descrambler uses a similar circuit (see Figure 3-16). Locations: INPUT Taps: OUTPUT Figure Scrambling circuit with polynomial x + 1 x x 3 (or x 3 + x 2 +1). Locations: INPUT Taps: OUTPUT Figure Descrambling circuit with polynomial x + 1 x x 3 (or x 3 + x 2 +1). 172 Festo Didactic

5 Ex. 3-1 Digital Baseband Processing Discussion The specific configurations of the scrambler and descrambler circuits must match each other for the scrambling/descrambling operation to succeed. To this end, the internal connections of each are defined as a polynomial, referred to as the characteristic polynomial of the circuit, of the form: This type of polynomial is called a polynomial mod 2 because it is manipulated using modulus 2 arithmetic. Each coefficient A m is 0 or 1. The XOR operation is equivalent to modulus 2 addition or subtraction. A scrambler circuit performs modulus 2 division of the input data by the polynomial. The descrambler recovers the original data by performing modulus 2 multiplication using the same polynomial. The details of modulus 2 arithmetic are outside the scope of the manual. where n is the number of registers. P(x) = An x n A2 x 2 + A1 x 1 + A0 x 0 With n registers, there are n +1 locations where a connection (tap) can be made. The value of each coefficient Am of the polynomial (where m ranges from 0 to n) is either 0 or 1, depending on whether the tap is absent or present at location m. In Figure 3-15 and Figure 3-16, taps are present at locations 0, 2, and 3. There is no tap at location 1. Therefore the polynomial P(x) = 1 x x x x 3 or x 3 + x a In this manual, the locations of a scrambler or descrambler circuit are numbered from input to output. This is a matter of convention. An equally valid convention is to number the locations from output to input. In this case, the polynomial representing the circuits in Figure 3-15 and Figure 3-16 would be 1x x x 1 +1x 0, or x 3 + x+1. When writing out a polynomial using x s, the order of the terms does not matter: x 3 + x 2 +1 is the same as 1 + x 2 + x 3. Terms with a zero coefficient do not need to be included: x 3 + x 2 +1 is the same as x 3 + x 2 + 0x +1. When expressing a polynomial as a binary number or as an N-tuple, the leftmost digit always corresponds to the highest-order term of the polynomial. For example, the binary number 1101 and the 4-tuple (1,1,0,1) both represent to the polynomial x 3 + x Since there is always a tap at the input and at the output of the shift register, the first and last coefficients of the polynomial are always 1. As long as the polynomials for the scrambler and descrambler match (using the same convention), the scrambling and descrambling operations will succeed. If not, the output remains scrambled and is meaningless. In a system designed for secrecy, it might be useful to keep this polynomial a secret, known only to the intended recipient of a message (although this simple approach would offer little real data security). In a system designed for efficiency, the polynomial to be used is defined and published in the modem standard, and is permanently built-in to both the modulator and demodulator circuits. The scrambler ensures frequent transitions in the transmitted data even if the input data is highly structured. However mixed up the scrambled data appears to be on the channel, it is easily descrambled in the corresponding descrambler circuit in the receiver. The choice of polynomial Since the purpose of scrambling is to randomize the data, it is important to note how the scrambler behaves under the worst case, that is, when the input data consists of a long string of 1s or 0s. If all registers of the scrambler initially contain 0 and the input data is all 0s, then the output of the scrambler is all zeros and no scrambling occurs. However, if one of the registers initially contains a 1 and the input data is all zeros or all ones, Festo Didactic

6 Ex. 3-1 Digital Baseband Processing Discussion then the output is a continuous sequence that appears to be random but that is actually periodic and totally predictable for a given polynomial and initial state. The longer the period of this sequence, the closer it approximates truly random data. In this case, the scrambler acts as a pseudo-random binary sequence (PRBS) generator using the corresponding polynomial. The length L (in bits) of the pseudo-random sequence produced under these conditions corresponds to the ability of the scrambler to effectively randomize data. For a given polynomial, the length may be as great as 2 n -1 bits where n is the order of the polynomial (that is, the highest non-zero term in the polynomial). The order n equals the number of registers used in the scrambler. If n = 3, for example, the maximum possible length L = = 7 bits. For n = 16, L could be as great as = bits. However, not all polynomials of order n will produce a periodic sequence of length 2 n -1. The details of polynomial factoring are outside the scope of the manual. In order for a polynomial P(x) to produce the maximum length possible for the number of registers used, the polynomial must be a primitive prime: The polynomial P(x) of order n is a prime polynomial if it is not divisible (using modulus 2 arithmetic) by any lower-order polynomials. P(x) is called primitive if it is a factor of the polynomial x L +1 (where L = 2 n -1), and of no other lower-order polynomial of the same form. Descrambler impulse response The operation of a descrambler can be tested by sending a single 1 bit into the descrambler input, followed by many zeros. Under these conditions, the descrambler output is effectively a measure of the impulse response of the descrambler. The impulse response can be used to determine the polynomial of an unknown descrambler circuit. This is illustrated in Figure When the impulse appears at the input of the descrambler, the first bit to appear at the output (according to the convention used in this manual) is A0 (the coefficient of the lowest-order term of the polynomial), followed by A1 (the coefficient of the second-lowest order term), then A2, etc. After the bit corresponding to the coefficient of the highest-order term, the output is all zeros. With the descrambling circuit shown in Figure 3-16, where P(x) = x 3 + x 2 + 1, the output would be a 1 (1x 0 ), followed by a 0 (0x 1 ), followed by a 1 (1x 2 ), and then another 1 (1x 3 ), and then all zeros. This test directly indicates the characteristic polynomial. 174 Festo Didactic

7 Ex. 3-1 Digital Baseband Processing Discussion Impulse in Response out Polynomial 1x 0 + 0x 1 + 1x 2 + 1x 3 Figure Descrambler impulse response for polynomial 1 x x x x 3 (or x 3 + x 2 +1). Clock Encoding A transmission code is a code used in a communications system for transmitting baseband data. The transmission code alters the data before modulation in order to accomplish a specific purpose. One such purpose is to ensure reliable clock recovery at the receiver. Since the clock signal is not transmitted along with the data, the receiver must recover the clock signal from the received data. This can only be done if the received data contains frequent transitions. If the received data contains long strings of 1s or 0s, the receiver will have difficulty recovering the clock signal. Applying a transmission code to the data in order to ensure reliable clock recovery may be referred to as clock encoding. The code imposes a maximum run length on the bit sequence in order to ensure a sufficient number of transitions regardless of the data being transmitted. Another common purpose of transmission coding is to ensure a balance between the number of 1s and 0s. This makes the DC component on a serial transmission line either constant or zero, which simplifies the control of transmission level and receiver gain. A certain degree of redundancy is often required in the encoded signal to ensure reliable clock recovery and to allow the coding of special control characters used, for example, to delimit the start and end of information packets or frames. Because of this redundancy, the data rate at the output of the encoder is usually higher than the data rate at the input (see Transmission rate of encoded signals). At the receiver a decoder performs the inverse process in order to recover the original data. If the code used includes redundancy, minor transmission errors may be immediately corrected. Other types of digital baseband processing Encryption is the process of transforming information using an algorithm to make it unreadable to anyone except those possessing special knowledge, usually referred to as a key. It is used in satellite communication to prevent unauthorized reception or modification of the signal. It is usually implemented by applying a bit-by-bit operation in real time on the binary data stream. The process Festo Didactic

8 Ex. 3-1 Digital Baseband Processing Discussion is reversed at the receiving end using the same key. This prevents anyone who does not possess the key from decrypting or tampering with the message. Forward error correction (FEC) or channel coding is a technique that allows transmission errors to be corrected at the receiver. It works by adding redundant bits (code bits) to the stream of information bits using a specially designed coding algorithm. The bit rate of the resulting encoded bit stream is higher bit rate of the information bit stream. At the receiver, a decoding algorithm is used to analyze the received a bits and correct transmission errors. Because redundancy is only partial, the error correction capability is limited errors are corrected providing the fraction of erroneous bits does not exceed a certain limit. The advantage of FEC is that, although it adds overhead to the communications system, most errors can be corrected without requesting the retransmission of data. Because the maximum fraction of errors that can be corrected is determined by the algorithm used, different algorithms are suitable for different conditions. Many of the algorithms commonly used are very complex. Interleaving is a way to arrange data in a non-contiguous way in order to increase performance. It is used in satellite communications to reduce the effect of bursts of errors. A burst of errors occurs when the communications channel is perturbed for a short period of time due to factors such as fading or interference. By changing the order of the bits in a predefined way before transmission, bursts of errors are randomized when the bits are reordered at the receiving end. Since the errors appear to be spread out after deinterleaving, FEC can often correct many of them. Two interleaving techniques are used. With block interleaving, bits are written into a memory array in row order and read out in column order. With convolution interleaving, bits are delayed by varying amounts before transmission. Both types of interleaving introduce a delay. The delay due to convolution all interleaving is approximately one-half the delay introduced by block interleaving. Transmission rate of encoded signals The information bit rate is also called the net bit rate. It excludes the physical layer protocol overhead such as TDM framing bits and bits added for encoding purposes. The channel bit rate is also called the gross bit rate or the data signaling rate. An encoder associates bits of redundancy with every bits of information. The bit rate of the unencoded signal at the transmitter is called the information bit rate. The bit rate of the encoded signal sent through the communications channel is called the channel bit rate and is greater than the information bit rate. The code rate indicates what portion of the encoded data contains useful information and is given by Equation (3-3). (3-3) where is the code rate is the number of redundancy bits associated with every information bits is the bit rate of the unencoded signal is the bit rate of the encoded signal 176 Festo Didactic

9 Outline The channel bit rate is therefore: (3-4) The Clock & Frame Encoder in the Earth Station Transmitter The Clock & Frame Encoder in the Earth Station Transmitter of the Satellite Communications Training System uses an implementation of the 8B/10B transmission code. With this transmission code, each group of 8 information bits is encoded using 10 bits. The encoded signal contains frequent transitions in order to assure clock recovery at the receiver. It also contains framing information necessary for the receiver to correctly demultiplex the data. Although the Clock & Frame Encoder encodes 8 information bits using 10 bits, the bit rate at the input and the output of the Clock & Frame Encoder is the same. This technique is accomplished by reserving bits before the encoding process and allows using the same bit clock throughout the Digital Modulator. There are four DATA INPUTs to the TDM MUX that can contain information. After scan each of the four inputs, the TDM MUX waits for the duration of one time slot before beginning the next scan. Therefore, after each scan, the TDM MUX output consists of four time slots that can contain information and one reserved time slot containing a 0. Since the Clock & Frame Encoder (or the Scrambler, if it is on) samples the TDM MUX output at the rate of the bit clock, each time slot corresponds to one channel bit. The Clock & Frame Encoder encodes the channel bits generating 10 bits of encoded data for every 8 information bits plus 2 reserved bits at its input. The resulting data signal has a channel bit rate of 20 Mbit/s. PROCEDURE OUTLINE The Procedure is divided into the following sections: System startup Using the binary sequence generators Probe compensation adjustment Time division multiplexing (TDM) Clock and frame encoding Scrambling PROCEDURE System startup 1. If not already done, set up the system and align the antennas visually as shown in Appendix B. 2. Make sure that no hardware faults have been activated in the Earth Station Transmitter or the Earth Station Receiver. b Faults in these modules are activated for troubleshooting exercises using DIP switches located behind a removable panel on the back of these modules. For normal operation, all fault DIP switches should be in the O position. Festo Didactic

10 3. Turn on each module that has a front panel Power switch (push the switch into the I position). After a few seconds, the Power LED should light. 4. If you are using the optional Telemetry and Instrumentation Add-On: Make sure there is a USB connection between the Data Generation/Acquisition Interface, the Virtual Instrument, and the host computer, as described in Appendix B. Turn on the Virtual Instrument using the rear panel power switch. b If the TiePieSCOPE drivers need to be installed, this will be done automatically in Windows 7 and 8. In Windows XP, the Found New Hardware Wizard will appear (it may appear twice). In this case, do not connect to Windows Update (select No, not this time and click Next). Then select Install the software automatically and click Next. Start the Telemetry and Instrumentation application. In the Application Selector, do not select Work in stand-alone mode. b If the Telemetry and Instrumentation application is already running, exit and restart it. This will ensure that no faults are active in the Satellite Repeater. Using the binary sequence generators 5. Take a few minutes to become familiar with the binary sequence generators and their operation. b Be sure to read the section entitled Using the Binary Sequence Generators in Appendix D (the same information is provided in the on-line help). If you are using conventional instruments, refer to the user manual supplied by the manufacturer. Probe compensation adjustment 6. Many probes, especially attenuating probes, have built-in compensation networks. If your probe has a compensation network, you should adjust this network to compensate the probe for the oscilloscope that you are using. a When using probes to observe high-frequency digital signals on the oscilloscope, setting the probe attenuation to x10 provides superior frequency response. Adjust the oscilloscope controls accordingly and recall that the signal amplitudes are ten times those displayed. To adjust the probe compensation, use the following procedure: Connect the probe to the oscilloscope and set the probe attenuation to x10. Attach the probe tip to the probe compensation test point on the oscilloscope s front panel. If you are using the Telemetry and Instrumentation Add-On, refer to Probe compensation with the Telemetry and Instrumentation Add-On below. 178 Festo Didactic

11 Use the adjustment tool provided with the probe or other non-magnetic adjustment tool to adjust the compensation network to obtain a waveform display that has flat tops with no overshoot or rounding (see Figure 3-18). (a) Probe under compensated (b) Probe over compensated c) Probe correctly compensated Figure Probe compensation. Probe compensation with the Telemetry and Instrumentation Add-On To compensate a probe using the Telemetry and Instrumentation Add-On, insert a BNC probe adapter (included with the Virtual Instrument) to one of the Digital Outputs on the Data Generation/Acquisition Interface. Remove the press-on probe-tip adapter from the probe and then insert the probe tip into the BNC probe adapter. Configure one of the BSGs to generate a series of alternating 1s and 0s at the Digital Output to which the probe is connected. For example, if the probe is connected to Digital Output 1, make the following settings in the Telemetry and Instrumentation application: Digital Output Settings Digital Output 1 Source... BSG1 Signal... Data Generator Settings Binary Sequence Generator (BSG) 1 Generation Mode... User Entry Binary Sequence Bit Rate Observe the waveform on the Oscilloscope and adjust the compensation network on the probe to obtain a waveform display that has flat tops with no overshoot or rounding. Festo Didactic

12 Time division multiplexing (TDM) In this section, you will observe the operation of the TDM MUX in the Earth Station Transmitter and the TDM DEMUX in the Earth Station Receiver. TDM MUX 7. The timing signals on the Earth Station Transmitter can be observed without making any connections to the module inputs. Use the oscilloscope to observe the following signals: Channel Connect to Signal Ch 1 Transmitter TP2 FRAMING CLOCK Ch 2 Transmitter TP1 BIT CLOCK Oscilloscope Settings: Channel 1 Scale * mv/div Channel 2 Scale * mv/div Time Base... 1 s/div Trigger Source... Ch 1 Trigger Level V Trigger Slope... Rising * with x10 probe Trigger the oscilloscope on the framing clock. Adjust the oscilloscope to observe a little more than one complete frame. You should see two pulses in the framing clock signal. Figure 3-19 shows an example of what you may observe. a The oscilloscope display may fluctuate slightly. This is normal. Framing clock Frame Bit clock b Figure Framing clock and bit clock. You can move the trigger marker to position the display horizontally. Change the time base as necessary during this procedure. You may wish to use the vertical cursors to determine timing relationships. Note the information displayed below the graticule. 180 Festo Didactic

13 A pulse in the framing clock marks the beginning of a new frame. (The frame begins at the falling edge of the framing clock pulse.) Use the oscilloscope to determine the frame period and the frame rate. 8. Readjust the oscilloscope to observe several cycles of the bit clock. Figure 3-20 shows an example. Oscilloscope Settings: Channel 1 Scale * mv/div Channel 2 Scale * mv/div Time Base s/div Trigger Source... Ch 1 Trigger Level V Trigger Slope... Rising * with x10 probe Framing clock Bit clock Figure Framing clock and bit clock. Each full cycle of the bit clock corresponds to the duration of one multiplexer time slot. (Each time slot begins at the rising edge of the bit clock.) Determine the duration of one time slot. How many time slots are in each frame? Festo Didactic

14 9. Make the connections shown in Figure Make sure there is no USB cable connected to DATA INPUT 4 of the Earth Station Transmitter. a Because of the high frequencies involved, it is preferable to use the shortest cables possible when connecting digital inputs and outputs. Binary Sequence Generator (BSG) 1 DATA DATA INPUT 1 Binary Sequence Generator (BSG) 2 DATA DATA INPUT 2 Digital Modulator Earth Station Transmitter Binary Sequence Generator (BSG) 3 DATA DATA INPUT 3 BIT CLOCK BIT CLOCK OUTPUT Figure Connections for observing time-division multiplexing. Configure each of the three binary sequence generators to produce a 32-bit sequence of 0s at a bit rate of 4 Mbit/s. b A repeating sequence consisting only of 0s will produce the same data regardless of the sequence length. Using sequence of 32 0s will allow you to change one bit at a time and will help understand how the multiplexer works. 182 Festo Didactic

15 Using the Telemetry and Instrumentation Add-On In the Telemetry and Instrumentation application, make the following settings: Digital Output Settings Digital Output 1 Source... BSG1 Signal... Data Digital Output 2 Source... BSG2 Signal... Data Digital Output 3 Source... BSG3 Signal... Data Generator Settings Binary Sequence Generator (BSG) 1 Generation Mode... User Entry Binary Sequence Bit Rate Binary Sequence Generator (BSG) 2 Generation Mode... User Entry Binary Sequence Bit Rate Binary Sequence Generator (BSG) 3 Generation Mode... User Entry Binary Sequence Bit Rate b You can copy a binary sequence from one field and paste it into another. On the Earth Station Transmitter, make the following adjustments: Data Source... TDM MUX Use the oscilloscope to observe the following signals: Channel Connect to Signal Ch 1 Transmitter TP2 FRAMING CLOCK Ch 2 Transmitter TP3 TDM MUX output Adjust the oscilloscope to see a little more than one complete frame. You should see two pulses in the framing clock signal. Figure 3-22 shows an example. Festo Didactic

16 Oscilloscope Settings: Channel 1 Scale * mv/div Channel 2 Scale * mv/div Time Base... 1 s/div Trigger Source... Ch 1 Trigger Level V Trigger Slope... Rising * with x10 probe Framing clock TDM MUX output Figure Framing clock and TDM MUX output. The binary sequences applied to DATA INPUTS 1 to 3 contain only 0s and since DATA INPUT 4 is not connected, there are only 0s at this input as well. The fifth time slot is left empty by the TDM MUX (it contains only 0s). Each of these input streams is attributed one time slot in the multiplexed signal. The TDM MUX output during each frame is therefore a stream of 0s, as shown in the figure. 10. Set one bit of the DATA INPUT 1 binary sequence to 1. Using the Telemetry and Instrumentation Add-On In the Telemetry and Instrumentation application, make the following setting: Generator Settings Binary Sequence Generator (BSG) 1 Binary Sequence Bit Rate Compare the duration of each bit in this binary sequence with the duration of each multiplexer time slot. 184 Festo Didactic

17 The binary sequence at DATA INPUT 1 is a repeating sequence consisting of one 1 bit followed by 31 0 bits. Compare the period of this sequence with the frame period. How many 1 bits should be present in each frame of the multiplexed signal? 11. Restart the BSG connected to DATA INPUT 1 several times in order to change the timing relationship of the data with the other signals. Figure 3-23 and Figure 3-24 show examples of what you may observe. b If you are using the Telemetry and Instrumentation Add-On, click the Restart BSGs button on the Instrumentation tab. If you are using conventional instruments, you may have to turn the binary sequence generator off and back on. Note that the multiplexed 1 bit may appear anywhere in the frame each time the BSG is restarted as there is no synchronization between the generated binary sequence and the framing clock. Framing clock TDM MUX output Figure Multiplexed 1 bit in one time slot. Festo Didactic

18 In some cases, the 1 bit may appear to be split in two different time slots, as in Figure This is explained below the figure. Figure Multiplexed 1 bit split in two time slots. The TDM MUX in the Earth Station Transmitter continuously scans the five input data streams (four DATA INPUTs plus a fifth empty stream). Since the MUX is synchronized with the bit clock, it switches from one stream to the next at a rate of 20 MHz. Each time slot has a duration of 50 ns. Each complete scan of the TDM MUX contains five time slots and lasts 0.25 s. The TDM MUX, however, does not have a sample and hold circuit. If an input signal changes state during its time slot, the MUX output will also change state during the time slot. Figure 3-23 shows the case where the sampled data stream does not change state during its time slot. As a result, the MUX output is either low (0) or high (1) for the entire duration of each time slot. Figure 3-24 shows the case where the sampled data stream does change state during its time slot. The bit appears to be split into two different time slots at the MUX output. To produce these figures on the oscilloscope using a time span much less than the frame period, the BSG was restarted several times until the 1 in DATA INPUT 1 appeared only a few time slots after the pulse in the framing clock signal. The BIT CLOCK OUTPUT and the DATA INPUT 1 signals were acquired and stored in the oscilloscope memories. Figure 3-25 and Figure 3-26 show these signals in detail. They also show the bit clock from the BIT CLOCK OUTPUT and the DATA INPUT 1 signal which is generated by the BSG. The traces showing the framing clock, the DATA INPUT 1 signal, and the MUX output signal are superimposed. The falling edge of the frame clock marks the beginning of the first time slot in a new frame. The red lines in these figures show the time slots. These time slots are numbered according to the input data stream that is connected during the time slot. In time slot 1, for example, DATA INPUT 1 is connected to the MUX output. In time slot 5, stream 5 (the empty data stream) is connected to the MUX output. The binary sequence from the BSG that is applied to DATA INPUT 1 begins with a 1 bit (high level) followed by 31 0 bits (low level). The bit interval is 186 Festo Didactic

19 equal to 5 time slots. Each time the BSG is restarted, the timing relationship between the data and the framing clock changes. In Figure 3-25, the data goes high during time slot 4, while DATA INPUT 4 is connected to the MUX output. The MUX output remains low during time slots 4 and 5, then goes high for the duration of time slot 1. Framing Clock DATA INPUT 1 (from BSG) TDM MUX OUTPUT Time Slots: Bit Clock Figure DATA INPUT 1 goes high in time slot 4. Note that the transitions in the data occur shortly after the beginning of the time slots. This is desirable in order to avoid having transitions in the data at the same instant that the MUX is switching inputs. In Figure 3-26, the data goes high during time slot 1. The MUX output goes high after a short delay, then goes low exactly at the end of time slot 1. At the beginning of the next time slot 1, the data is still high. The MUX output goes high again and goes low shortly after the data goes low, before time slot 1 ends. This results in two brief pulses in the MUX output. The multiplexed 1 bit has been split into two time slots. Framing Clock DATA INPUT 1 (from BSG) TDM MUX OUTPUT Time Slots: Bit Clock Figure DATA INPUT 1 goes high in time slot 1. Festo Didactic

20 This shows that the MUX output is not a true digital signal since a digital signal can only change state at the boundaries of each bit interval. The MUX output must be sampled once per time slot by a clocked digital circuit in order to become a true digital signal. When transmitting multiplexed data, the Clock & Frame Encoder must be on because it adds the framing information necessary for the TDM DEMUX at the receiver to correctly demultiplex the data. The Clock & Frame Encoder is a clocked circuit that samples the MUX output signal once every time slot. The output of the Clock & Frame Encoder is a true digital signal with a channel bit rate of 20 Mbit/s, regardless of the bit rates of the individual data input signals. The Sampler and the Serial to Parallel Converter also sample their input signals every time slot. The BSG Sync. signal goes high for one bit interval at the beginning of each repetition of the binary sequence. This is useful for triggering the oscilloscope. 12. Trigger the oscilloscope on the BSG Sync. signal. Set all bits of the DATA INPUT 1 sequence to 0, then set two consecutive bits of the DATA INPUT 1 sequence to 1. Using the Telemetry and Instrumentation Add-On Connect DIGITAL OUTPUT 4 to the EXT TRIG input of the Virtual Instrument. In the Telemetry and Instrumentation application, make the following setting: Digital Output 4 Source... BSG1 Signal... Sync. Generator Settings Binary Sequence Generator (BSG) 1 Binary Sequence then Bit Rate Restart the BSG several times, if necessary, until there are two pulses in the MUX output very close to the pulse in the framing clock. Figure 3-27 shows an example of what you may observe if the data does not change state during a time slot. 188 Festo Didactic

21 Framing Clock TDM MUX output Figure Two consecutive data bits at one MUX input. Figure 3-28 shows the TDM MUX output signal in detail along with the bit clock. Bit Clock TDM MUX output Figure Two consecutive data bits at one MUX input. DATA INPUT 1 now contains two consecutive 1s; all other inputs contain only 0s. Explain the appearance of the TDM MUX output signal. Festo Didactic

22 13. Set the DATA INPUT 1 sequence to 32 1s. Using the Telemetry and Instrumentation Add-On In the Telemetry and Instrumentation application, make the following setting: Generator Settings Binary Sequence Generator (BSG) 1 Binary Sequence b When the Binary Sequence is selected, you can quickly modify the sequence by rolling the mouse wheel. Figure 3-29 shows an example of what s you may observe. DATA INPUT 1 now consists of a stream of 1s, whereas the data at the other inputs is all 0s. Oscilloscope Settings: Channel 1 Scale * mv/div Channel 2 Scale * mv/div Time Base s/div Trigger Source... EXT Trigger Level... 2 V Trigger Slope... Rising * with x10 probe triggered on BSG1 Sync. signal Bit Clock TDM MUX output Figure All 1s at DATA INPUT 1. Explain the appearance of the multiplexer output. What is the duration of one scan of the TDM MUX? How many TDM MUX scans occur during each frame? 190 Festo Didactic

23 14. Experiment by changing the binary sequences applied to the DATA INPUTs and observe the results on the oscilloscope. Using the Telemetry and Instrumentation Add-On For example, in the Telemetry and Instrumentation application, make the following settings: Generator Settings Binary Sequence Generator (BSG) 1 Binary Sequence Bit Rate Binary Sequence Generator (BSG) 2 Binary Sequence Bit Rate Binary Sequence Generator (BSG) 3 Binary Sequence Bit Rate Note any observations you make. 15. Set one binary sequence to , with a bit rate of 1 Mbit/s, and the other binary sequences to 1 followed by 32 0s with a bit rate of 4 Mbit/s. Using the Telemetry and Instrumentation Add-On For example, in the Telemetry and Instrumentation application, make the following settings: Generator Settings Binary Sequence Generator (BSG) 1 Binary Sequence Bit Rate Binary Sequence Generator (BSG) 2 Binary Sequence Bit Rate Binary Sequence Generator (BSG) 3 Binary Sequence Bit Rate Festo Didactic

24 Use the oscilloscope to observe the following signals: Channel Connect to Signal Ch 1 BSG1 Data DATA INPUT 1 Ch 2 Transmitter TP3 TDM MUX output EXT TRIG BSG1 Sync. or Data Sequence generator sync. signal or Data stream Figure 3-30 shows an example of what you may observe (if no data stream changes state during its time slot). a Since, Figure 3-30 was produced using the Telemetry and Instrumentation Add-On, the three BSGs are synchronized so that the rising edges of the 1s in each DATA INPUT occur at the same instant. Oscilloscope Settings: Channel 1 Scale... 5 V/div Channel 2 Scale * mv/div Time Base... 1 s/div Trigger Source... EXT Trigger Level... 2 V Trigger Slope... Falling * with x10 probe triggered on BSG1 Sync. signal DATA INPUT 1 TDM MUX output Figure DATA INPUT 1 and TDM MUX output. Figure 3-31 shows these signals in detail. The vertical cursors are positioned 0.05 s and 0.1 us after the beginning of the wide pulse in the TMD MUX output signal to show the positions of three time slots. 192 Festo Didactic

25 Oscilloscope Settings: Channel 1 Scale... 5 V/div Channel 2 Scale * mv/div Time Base s/div Trigger Source... EXT Trigger Level... 2 V Trigger Slope... Falling * with x10 probe triggered on BSG1 Sync. signal DATA INPUT 1 TDM MUX output. Figure DATA INPUT 1 and TDM MUX output. In Figure 3-31, each horizontal division of the graticule corresponds to 0.2 s, that is, 4 time slots. In Table 3-4, identify the source of each numbered high bit in Figure Table 3-4. High bits in Figure High bit Source Festo Didactic

26 16. Configure each binary sequence generator to produce a 32-bit sequence at 4 Mbit/s with a short pattern of 1s and 0s at the beginning of each sequence. Using the Telemetry and Instrumentation Add-On For example, in the Telemetry and Instrumentation application, you could make the following settings: Generator Settings Binary Sequence Generator (BSG) 1 Binary Sequence Bit Rate Binary Sequence Generator (BSG) 2 Binary Sequence Bit Rate Binary Sequence Generator (BSG) 3 Binary Sequence Bit Rate Use the memories of the oscilloscope to display the three DATA INPUT signals as well as the TDM MUX output signal. Figure 3-32 shows an example (the colors have been altered so as to have a white background). For each high bit in the multiplexed signal displayed on the oscilloscope, use arrows or numbers to identify which data input is responsible for that bit. DATA INPUT 1 DATA INPUT 2 DATA INPUT 3 TDM MUX output Figure DATA INPUTs 1, 2, and 3 and TDM MUX output. 194 Festo Didactic

27 TDM DEMUX 17. Make the connections shown in Figure Binary Sequence Generator (BSG) 1 Binary Sequence Generator (BSG) 2 DATA DATA DATA INPUT 1 DATA INPUT 2 Digital Modulator IF 1 OUTPUT Up Converter 1 Up Converter 2 RF OUTPUT Binary Sequence Generator (BSG) 3 DATA DATA INPUT 3 Earth Station Transmitter BIT CLOCK BIT CLOCK OUTPUT I Q I Q Repeater RF OUTPUT Earth Station Receiver Down Converter 2 IF 2 OUTPUT Down Converter 1 Digital Demodulator I Q I Q Figure Connections for transmission and reception of TDM data. 18. On the Earth Station Receiver, lock the Costas loop (see The QPSK Costas Loop in the Digital Demodulator). Use the oscilloscope to compare the transmitted data (DATA INPUTs 1 to 3 at the Earth Station Transmitter) with the received data (DATA OUTPUTs 1 to 3 signals at the Earth Station Receiver). b You can connect the oscilloscope using BNC cables or using probes and the BNC probe adapters. Compare each DATA INPUT with the corresponding DATA OUTPUT, one at a time. If the three BSGs are configured to generate binary sequences of the same length at the same bit rate, you can store the traces in the memories of the oscilloscope and observe them all simultaneously, as shown in Figure Festo Didactic

28 Using the Telemetry and Instrumentation Add-On You can use the following connections and settings to compare the DATA INPUT and the DATA OUTPUT signals. BIT CLOCK Data Generation/ Acquisition Interface DIGITAL OUTPUTs 1-3 (BSG1-3 Data) DIGITAL OUTPUT 4 (BSG1, 2, or 3 Sync.) DIGITAL OUTPUT 5 (BSG1, 2, or 3 Data) DATA INPUTs 1-3 EXT TRIG CH1 IN Digital Modulator I Q BIT CLOCK OUTPUT I Q Virtual Instrument Digital DemodulatorDigi tal Demodulator II Q II Q DATA OUTPUT 1, 2, or 3 CH2 IN Digital Output Settings Digital Output 1 Source... BSG1 Signal... Data Digital Output 2 Source... BSG2 Signal... Data Digital Output 3 Source... BSG3 Signal... Data Digital Output 4 Source... BSG1, 2, or 3 Signal... Sync. Digital Output 5 Source... BSG1, 2, or 3 (same as Digital Output 4) Signal... Data The DIGITAL OUTPUT 4 Source setting determines which BSG s sync. signal triggers the oscilloscope. The DIGITAL OUTPUT 5 Source setting determines which BSG s transmitted data is displayed on Channel 1 of the oscilloscope. The physical connection to one of the DATA OUTPUTs determines what received data is displayed on Channel 2 of the oscilloscope. To compare DATA INPUT 1 (transmitted data) and DATA OUTPUT 1 (received data), set the Source of both Digital Output 4 and 5 to BSG1 and physically connect DATA OUTPUT 1 to CH2 IN of the Virtual Instrument. 196 Festo Didactic

29 Figure 3-34 shows an example of the three DATA INPUT and DATA OUTPUT signals, displayed using both oscilloscope memories. a For Figure 3-34, the three BSGs were configured to generate binary sequences of the same length at the same bit rate. DATA INPUT 1 DATA INPUT 2 DATA INPUT 3 DATA OUTPUT 1 DATA OUTPUT 2 DATA OUTPUT 3 Figure DIGITAL INPUT and DIGITAL OUTPUT signals. Are the signals correctly demultiplexed by the TDM DEMUX of the Earth Station Receiver? 19. If you wish, configure each binary sequence generator to generate a different pseudo-random sequence. Compare the original data at the transmitter with the demultiplexed data at the receiver. Clock and frame encoding In this section, you will observe the operation of the Clock & Frame Encoder in the Earth Station Transmitter and the Clock & Frame Decoder in the Earth Station Receiver. 20. While comparing the input data applied to the TDM MUX (DATA INPUT 1, 2, or 3) at the transmitter and the demultiplexed output data (DATA OUTPUT 1, 2, or 3) at the receiver, turn off the Clock & Frame Encoder in the Earth Station Transmitter. Describe what happens b Press the Scrambler/Encoder button on the Earth Station Transmitter twice in order to turn off the Clock & Frame Encoder bur leave the Scrambler on. If the oscilloscope display becomes unstable, use the Single Refresh mode of the oscilloscope. Festo Didactic

30 21. Use the oscilloscope to observe the following signals: Channel Connect to Signal Ch 1 Transmitter TP2 FRAMING CLOCK Ch 2 Receiver TP8 FRAMING BIT Set the Time Base on the oscilloscope to 1 s/div and trigger the oscilloscope on the transmitter Framing Clock. On the Earth Station Transmitter, turn on the Clock & Frame Encoder and the Scrambler. On the Earth Station Receiver, lock the Costas Loop as shown in the procedure of Exercise 1-1. When the Costas loop is not locked, the receiver Framing Bit will be unstable. Figure 3-35 shows an example of what you may observe once the Costas loop is locked Tx framing clock Rx framing bit Figure Transmitter framing clock and receiver framing bit. On the Earth Station Transmitter, turn of the Clock & Frame Encoder (leave the Scrambler on). Explain what happens. 22. Configure one binary sequence generator to produce a 32-bit sequence with several 1s (not necessarily consecutive) at the beginning and with 0s in all the other bits, at a bit rate of 4 Mbit/s. 198 Festo Didactic

31 Using the Telemetry and Instrumentation Add-On For example, in the Telemetry and Instrumentation application, make the following settings: Generator Settings Binary Sequence Generator (BSG) 1 Binary Sequence Bit Rate Binary Sequence Generator (BSG) 2 Binary Sequence Bit Rate Binary Sequence Generator (BSG) 3 Binary Sequence Bit Rate On the Earth Station Transmitter, make the following adjustments: Data Source... TDM MUX Scrambler... Off Clock & Frame Encoder... On On the Earth Station Receiver, make the following adjustments: Descrambler... Off Use the oscilloscope to observe the following signals: Channel Connect to Signal Ch 1 Transmitter TP3 TDM MUX output Ch 2 Transmitter TP4 Clock & Frame Encoder output EXT TRIG BSG1 Sync. Sequence generator sync. signal Festo Didactic

32 Adjust the oscilloscope to display a little more than one complete frame. Figure 3-36 shows an example of what s you should observe. Unencoded data Encoded data b Figure Unencoded and encoded multiplexed data. If you see more pulses in the frame than there are 1s in the binary sequence, it is because some bits are being split by the TDM MUX. Click the BSGs button in the Instrumentation tab until the correct number of 1s appear in each frame. How does the encoded multiplexed data compare to the unencoded multiplexed data? What is the main purpose of the Clock & Frame Encoder and how does it accomplish this? 23. On the Earth Station Receiver, lock the Costas loop, as shown in the procedure of Exercise 1-1. Use the oscilloscope to observe the following signals: b Store the transmitter signals in memory and then display the receiver signals. Channel Connect to Signal Memory Ch 1 Transmitter TP3 Clock & Frame Encoder input Memory Ch 2 Transmitter TP4 Clock & Frame Encoder output Ch 1 Receiver TP6 Clock & Frame Decoder input Ch 2 Receiver TP7 Clock & Frame Decoder output EXT TRIG BSG1 Sync. Sequence generator sync. signal 200 Festo Didactic

33 Figure 3-37 shows an example. Unencoded data in the transmitter Encoded data in the transmitter Encoded data in the receiver Decoded data in the receiver Figure Clock & Frame Encoder and Clock & Frame Decoder signals. Compare the encoded data in the transmitter (at the Clock & Frame Decoder input) with the encoded data in the receiver (at the Clock & Frame Encoder output). Figure 3-38 shows an enlarged view of these two signals. In this figure, receiver data was shifted left in order to align it with transmitter data. Does the receiver correctly recover the encoded data? Encoded data in the transmitter Encoded data in the receiver Figure Encoded data in the transmitter and in the receiver (receiver data shifted left to align with transmitter data). Compare the unencoded multiplexed data in the transmitter with the decoded multiplexed data in the receiver. Festo Didactic

34 a Because of slight instabilities in the demodulator, some pulses in the decoded data may appear wider that the corresponding pulses in the encoded data. However, because this signal is resampled by the TDM DEMUX, this does not affect the demultiplexing process. Scrambling In this section, you will observe the operation of the Scrambler in the Earth Station Transmitter and the Descrambler in the Earth Station Receiver. You will also determine the polynomial used by the Scrambler and Descrambler by observing the Descrambler impulse response. The effect of scrambling observed in the time domain 24. Make the connections shown in Figure BIT CLOCK BIT CLOCK OUTPUT Earth Station Transmitter Binary Sequence Generator (BSG) DATA DATA INPUT 5 Digital Modulator I Q I Q IF 1 OUTPUT Up Converter 1 Up Converter 2 RF OUTPUT Satellite RepeaterSatellit e RF OUTPUT Earth Station Receiver Down Converter 2 IF 2 OUTPUT Down Converter 1 Digital Demodulator I Q I Q Figure Connections for unmultiplexed digital transmission. 202 Festo Didactic

35 25. Configure one binary sequence generator to produce a 32-bit sequence with a few 1s (not necessarily consecutive) at the beginning and with 0s in all the other bits, at a bit rate of 20 Mbit/s. In the Telemetry and Instrumentation application, you could make the following settings: Generator Settings Binary Sequence Generator (BSG) 1 Binary Sequence Bit Rate On the Earth Station Transmitter, make the following adjustments: Data Source... Sampler Scrambler... On Clock & Frame Encoder... Off Use the oscilloscope to observe the following signals: Channel Connect to Signal Ch 1 Transmitter TP3 Scrambler input Ch 2 Transmitter TP4 Scrambler output Adjust the oscilloscope to display a little more than one complete frame. Figure 3-40 shows an example of what you may observe. b Since the scrambled data is constantly changing, use the single refresh mode of the oscilloscope to observe these signals. Scrambler input (TP3) Scrambler output (TP4) Figure Scrambling a repetitive data stream. Festo Didactic

36 Compare the unscrambled and scrambled signals as seen in the time domain. 26. On the Earth Station Transmitter, turn on the Clock & Frame Encoder and the Scrambler. On the Earth Station Receiver, lock the Costas loop, as shown in the procedure of Exercise 1-1. Then turn off the Clock & Frame Encoder in the transmitter but leave the Scrambler on. a Although the Sync. LED goes off when the Clock & Frame Encoder is turned off, the Costas loop should remain locked. Observe the following signals on the oscilloscope: Channel Connect to Signal Memory Ch 1 Transmitter TP3 Scrambler input Memory Ch 2 Receiver DATA OUTPUT 5 Descrambler output Ch 1 Transmitter TP4 Scrambler output Ch 2 Receiver TP6 Descrambler input EXT TRIG BSG1 Sync. Sequence generator sync. signal b Since the scrambled data is constantly changing, use the single refresh mode of the oscilloscope to observe these signals. Oscilloscope Settings: Channel 1 * mv/div Channel 2 * m V/div Refresh Mode... Single Time Base s/div Trigger Source... EXT Trigger Level V Trigger Slope... Rising * with x10 probe triggered on BSG1 Sync. signal Scrambler Output Scrambler Input Descrambler Input Descrambler Output (using x10 probe and BNC probe adapter) Figure Scrambler and Descrambler signals. 204 Festo Didactic

37 Figure 3-41 shows an example. How do the signals in the receiver compare to those in the transmitter? Determining the scrambler and descrambler polynomial 27. Observe the following signals on the oscilloscope: Channel Connect to Signal Ch 1 Receiver TP6 Descrambler input Ch 2 Receiver DATA OUTPUT 5 Descrambler output Adjust the binary sequence generator to generate a sequence consisting one 1 followed by 31 0s at a bit rate of 20 Mbit/s. On the Earth Station Transmitter, make the following adjustments: Data Source... Sampler Scrambler... On Clock & Frame Encoder... On On the Earth Station Receiver, make the following adjustments: Descrambler... On Make sure the Costas loop is locked. On the Earth Station Transmitter, turn off the Clock & Frame Encoder but leave the Scrambler on. Adjust the Time Base of the oscilloscope in order to see several frames, as shown in Figure Oscilloscope Settings: Channel 1 * mv/div Channel 2 * m V/div Time Base s/div Trigger Source... EXT Trigger Level V Trigger Slope... Rising * with x10 probe triggered on BSG1 Sync. signal Descrambler input Descrambler output (using x10 probe and BNC probe adapter) Figure Descrambler input and output. Festo Didactic

38 Turn off the Scrambler in the Earth Station Transmitter. Figure 3-43 shows an example of what you may observe with the Scrambler off. When the transmitter transmits a single 1 followed by a long string of 0s, with no scrambling, the transmitted signal consists of a series of impulses. This series of impulses is recovered in the receiver and is present at the input of the Descrambler. Impulses at Descrambler input Descrambler impulse response Figure Descrambler input impulses and impulse response. For each impulse at the input of the Descrambler, how many 1s are present at the Descrambler output? 28. Change the time base of the oscilloscope to observe the response of the Descrambler for one impulse. To make it easier to count the positions, you may wish to display the RECOVERED CLOCK OUTPUT signal as well (use the oscilloscope memory). Oscilloscope Settings: Channel 1 * mv/div Channel 2 * m V/div Time Base s/div Trigger Source... Ch 1 Trigger Level V Trigger Slope... Rising * with x10 probe Descrambler input impulse Descrambler impulse response Recovered clock Figure Descrambler input impulse, impulse response and recovered clock. 206 Festo Didactic

39 Determine the positions of each of the 1s in the impulse response with respect to the input impulse. The input impulse is in position 0. b Count the clock cycles or use cursors to determine positions of the 1s. One clock cycle corresponds to 0.05 s. What is the polynomial of the Scrambler and Descrambler? The effect of scrambling on the QPSK constellation 29. Connect the oscilloscope probes as follows: Channel Connect to Signal Ch 1 Transmitter TP6 Serial to Parallel Converter I-output Ch 2 Transmitter TP7 Serial to Parallel Converter Q-output EXT TRIG BSG1 Sync. Sequence generator sync. signal Adjust the binary sequence generator to generate a sequence consisting one 1 followed by 31 0s at a bit rate of 20 Mbit/s. Turn the Scrambler on. On the oscilloscope, set the Trigger Source to EXT. Adjust the Channel 1 (X) and Channel 2 (Y) scale to 100 mv/div. Set the Display format to X-Y. Adjust the trace position controls in order to approximately center the pattern displayed on the oscilloscope, as shown in Figure a a In the Telemetry and Instrumentation application, using a more sensitive scale setting under the present conditions will result in clipping. On some oscilloscopes, the EXT TRIG input is disabled when using the X-Y display format. In this case, the EXT TRIG connection is unnecessary. Festo Didactic

40 Oscilloscope Settings: Channel 1 (X) Scale mv/div Channel 2 (Y) Scale mv/div Format... X - Y Mode... Dots Sampling Window s Trigger Source... EXT Trigger Level... 2 V Trigger Slope... Rising Figure Positioning the X-Y trace on the oscilloscope. On the Earth Station Transmitter, turn the Scrambler and the Clock & Frame Encoder off. Set the Display Mode of the oscilloscope to Dots. The oscilloscope now displays the QPSK signal constellation as shown in either Figure 3-46a or b. (a) Quadrants 3 and 4 visited (b) Quadrants 2 and 3 visited Figure Observed (above) and ideal (below) QPSK constellations without scrambling. Each of the points in a constellation represents a signal state. Ideally, the signals used to display these constellations on an oscilloscope should be perfectly rectangular pulses of uniform amplitude. If this was so, only one point would appear in each quadrant that is visited. The signals in real systems are often band-limited and may exhibit ringing, jitter, and noise. As a result the points in the constellation, as displayed on an oscilloscope, are constantly being displaced. Instead of one point in each of the quadrants that is visited, multiple points are displayed. When these small 208 Festo Didactic

41 displacements are not significant, it is necessary to imagine the ideal constellations, as shown below the screen captures in Figure 3-46a and b. b The oscilloscope displays the constellation points one after the other. On some oscilloscopes, if you freeze the display (using Single Refresh or Stop, depending on the model), or if you capture the screen, you will likely see only the constellation point displayed at that instant. If necessary, turn persistence on to simultaneously display all of the constellation points that are currently being visited. Turn the Scrambler on. Compare the constellation of the scrambled and unscrambled signals. What effect has scrambling on the number of quadrants visited? Turn off the Scrambler and turn on the Clock & Frame Encoder. Compare the effect has Clock & Frame encoding only versus scrambling only on the quadrants visited. Turn on both the Scrambler and the Clock & Frame Encoder. Do all quadrants appear to be visited equally? If you wish, repeat your observations using a two-bit binary sequence (00, 01, 10, or 11), with the Scrambler off and then on. The effect of scrambling observed in the frequency domain 30. Turn off the Scrambler and the Clock & Frame Encoder. Adjust the binary sequence generator to generate a highly repetitive sequence, for example, 1 followed by 31 0s at a bit rate of bit/s. In the Telemetry and Instrumentation application, make the following settings: Generator Settings Binary Sequence Generator (BSG) 1 Binary Sequence Bit Rate Use the spectrum analyzer to observe the spectrum of the IF 1 OUTPUT signal of the Digital Modulator with the Scrambler off then on. Figure 3-47 shows an example using a highly repetitive data sequence. Festo Didactic

42 Ex. 3-1 Digital Baseband Processing Conclusion (a) Without scrambling (b) With scrambling Figure Effect of scrambling on a DQPSK spectrum (Frequency Span 5 MHz/div, Center Frequency 335 MHz). What is the effect of scrambling on the power distribution of the DQPSK spectrum? 31. When you have finished using the system, exit any software being used and turn off the equipment. CONCLUSION In this exercise, you observed the operation of digital baseband processing techniques used at the earth station transmitter and at the earth station receiver. You observed time-division multiplexing and demultiplexing, scrambling and descrambling, and clock and frame encoding and decoding. REVIEW QUESTIONS 1. What is the advantage of using TDM in a satellite communications system? 2. Briefly describe TDM. 210 Festo Didactic