Product Specification PE4151
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1 PE UltraCMOS Low Frequency Passive Mixer with Integrated LO Amplifier Product Description The PE is an ultra-high linearity Quad MOSFET mixer with an integrated LO amplifier. The LO amplifier allows for LO drive levels of less than dbm to produce IIP values similar to a Quad MOSFET Array driven with a dbm LO drive. It is designed for use in up-conversion and downconversion applications such as mobile radios, cellular infrastructure equipment, and STB/CATV systems. The PE operates with differential signals at the RF and IF ports while the LO port can be either differential or singleended. Features Ultra-high linearity Quad MOSFET array with integrated LO amplifier Ideal for mobile radio and up or down conversion applications Low conversion loss High LO Isolation RoHS compliant -lead MSOP package Ideal for highly magnetic environments The PE is an ideal mixer core for a wide range of mixer products, including module level solutions that incorporate baluns or other single-ended matching structures enabling three-port operation. The PE is manufactured on Peregrine s UltraCMOS process, a patented variation of silicon-on-insulator (SOI) technology on a sapphire substrate, offering the performance of GaAs with the economy and integration of conventional CMOS. This process enables the PE to have a high level of performance. Figure. Functional Diagram Figure. Package Type -Lead MSOP. mm Document No. DOC-- Peregrine Semiconductor Corp. All rights reserved. Page of
2 PE Table. AC and DC Electrical Specifications (V DD =.V, temperature = + C unless specified otherwise) Parameters Min Typ Max Unit Current drain (a function of frequency) ma Off state leakage current µa RF input frequency VHF band UHF band UHF band LO frequency VHF band UHF band UHF band IF output frequency. 9. MHz LO input power dbm RF input power dbm Conversion loss VHF band UHF band UHF band rd order input intercept (IIP) dbm nd order input intercept (IIP) VHF band UHF band UHF band RF to IF isolation db LO to IF isolation db LO to RF isolation db... MHz MHz MHz MHz MHz MHz db db db dbm dbm dbm Notes:. Measurements taken on PE evaluation board with M/A-Com ETK-T baluns on the RF and IF ports. See Figure for details.. IIP and IIP are measured with two tones at dbm, khz spacing. Table. Supplemental Table for Operation in HF Band * (V DD =.V, temperature = + C unless specified otherwise) Parameters Min Typ Max Unit RF input frequency. MHz LO frequency MHz IF output frequency. MHz LO input power dbm RF input power dbm Conversion loss. db rd order input intercept (IIP) dbm nd order input intercept (IIP) dbm RF to IF isolation db LO to IF isolation db LO to RF isolation db Note: * Measurements taken on PE evaluation board with M/A-Com ETK-T baluns on the RF and IF ports. See Figure for details. Peregrine Semiconductor Corp. All rights reserved. Document No. DOC-- UltraCMOS RFIC Solutions Page of
3 PE Figure. Pin Configuration (Top View) Table. Absolute Maximum Ratings Parameters/Conditions Min Max Unit EN V DD IF_P IF_N RF_P 9 INA INB V DD GND RF_N V DS Maximum DC plus peak AC across drain-source I DS-DC Maximum DC current across drain-source ±. V ma T ST Storage temperature range + C Tj Operating junction temperature + C V ESD ESD voltage HBM, MIL_STD Method. V Table. Pin Descriptions Pin # Symbol Function EN Enable pin (active low) V DD Supply voltage IF_P Positive IF port IF_N Negative IF port RF_P Positive RF input RF_N Negative RF input GND Ground V DD Supply voltage 9 INB Positive LO input INA Negative LO input Table. Operating Ranges Parameters/Conditions Min Typ Max Unit V DD Power supply voltage.9.. V T OP Operating temperature range + C Note: Operation should be restricted to the limits in the Operating Ranges table. Exceeding absolute maximum ratings may cause permanent damage. Operation should be restricted to the limits in the Operating Ranges table. Operation between operating range maximum and absolute maximum for extended periods may reduce reliability. Electrostatic Discharge (ESD) Precautions When handling this UltraCMOS device, observe the same precautions that you would use with other ESD-sensitive devices. Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to avoid exceeding the specified rating. Latch-Up Avoidance Unlike conventional CMOS devices, UltraCMOS devices are immune to latch-up. Table. Power On/Off Control Function EN Powered On Mode Power Off Mode Moisture Sensitivity Level The moisture sensitivity level rating for the PE in the -lead MSOP package is MSL. Document No. DOC-- Peregrine Semiconductor Corp. All rights reserved. Page of
4 PE Figure. Conversion Loss vs Voltage ( C, - dbm LO Input, 9. MHz IF) Figure. Conversion Loss vs Temperature (.V, dbm LO Input, 9. MHz IF).. Conversion Loss (db)...9 V. V. V Conversion Loss (db).. C C C.. Figure. RF to IF Isolation vs Voltage ( C, dbm LO Input, 9. MHz IF) Figure. RF to IF Isolation vs Temperature (.V, dbm LO Input, 9. MHz IF) Isolation (db).9 V. V. V Isolation (db) C C C Figure. LO to IF Isolation vs Voltage ( C, dbm LO Input, 9. MHz IF) Figure 9. LO to IF Isolation vs Temperature (.V, dbm LO Input, 9. MHz IF) Isolation (db).9 V. V. V Isolation (db) C C C Peregrine Semiconductor Corp. All rights reserved. Document No. DOC-- UltraCMOS RFIC Solutions Page of
5 PE Figure. LO to RF Isolation vs Voltage ( C, dbm LO Input, 9. MHz IF) Figure. LO to RF Isolation vs Temperature (.V, dbm LO Input, 9. MHz IF) Isolation (db).9 V. V. V Isolation (db) C C C Figure. IIP vs Voltage ( C, dbm LO Input, 9. MHz IF) Figure. IIP vs Temperature (.V, dbm LO Input, 9. MHz IF) 9 9 IIP (dbm).9 V. V. V IIP (dbm) C C C Figure. IIP vs Voltage ( C, dbm LO Input, 9. MHz IF) Figure. IIP vs Temperature (.V, dbm LO Input, 9. MHz IF) IIP (dbm).9 V. V. V IIP (dbm) C C C Peregrine Semiconductor Corp. All rights reserved. Document No. DOC-- UltraCMOS RFIC Solutions Page of
6 PE Figure. IIP vs LO Input Power (.V, C, 9. MHz IF) Figure. IIP vs LO Input Power (.V, C, 9. MHz IF) 9 IIP (dbm) dbm dbm dbm IIP (dbm) dbm dbm dbm Peregrine Semiconductor Corp. All rights reserved. Document No. DOC-- UltraCMOS RFIC Solutions Page of
7 PE Figure. Conversion Loss vs V DD ( C, dbm LO Input,. MHz IF) Figure 9. RF to IF Isolation vs V DD ( C, dbm LO Input,. MHz IF) Conversion Loss [db].... VDD =. V VDD =. V Figure. LO to IF Isolation vs V DD ( C, dbm LO Input,. MHz IF) Figure. LO to RF Isolation vs V DD ( C, dbm LO Input,. MHz IF) VDD =. V VDD =. V Figure. IIP vs V DD ( C, dbm LO Input,. MHz IF) IIP [dbm] VDD =. V Figure. IIP vs. V DD ( C, dbm LO Input,. MHz IF) IIP [dbm] VDD =. V Document No. DOC-- Peregrine Semiconductor Corp. All rights reserved. Page of
8 PE Conversion Loss [db] Figure. Conversion Loss vs V DD ( C, dbm LO Input, MHz IF).... VDD =. V Figure. RF to IF Isolation vs V DD ( C, dbm LO Input, MHz IF) VDD =. V Figure. LO to IF Isolation vs V DD ( C, dbm LO Input, MHz IF) VDD =. V Figure. LO to RF Isolation vs V DD ( C, dbm LO Input, MHz IF) VDD =. V Figure. IIP vs V DD ( C, dbm LO Input, MHz IF) IIP [dbm] VDD =. V Figure 9. IIP vs V DD ( C, dbm LO Input, MHz IF) IIP [dbm] VDD =. V Peregrine Semiconductor Corp. All rights reserved. Document No. DOC-- UltraCMOS RFIC Solutions Page of
9 PE Figure. Conversion Loss vs V DD ( C, dbm LO Input, MHz IF) Conversion Loss [db].... VDD =. V Figure. RF to IF Isolation vs V DD ( C, dbm LO Input, MHz IF) VDD =. V Figure. LO to IF Isolation vs V DD ( C, dbm LO Input, MHz IF) Figure. LO to RF Isolation vs V DD ( C, dbm LO Input, MHz IF) VDD =. V VDD =. V Figure. IIP vs V DD ( C, dbm LO Input, MHz IF) Figure. IIP vs V DD ( C, dbm LO Input, MHz IF) IIP [dbm] VDD =. V IIP [dbm] VDD =. V Document No. DOC-- Peregrine Semiconductor Corp. All rights reserved. Page 9 of
10 PE Figure. Conversion Loss vs IF Frequency ( C, dbm LO Input) Figure. RF to IF Isolation vs IF Frequency ( C, dbm LO Input) Conversion Loss [db].... MHz MHz MHz MHz MHz MHz Figure. LO to IF Isolation vs IF Frequency ( C, dbm LO Input) Figure 9. LO to RF Isolation vs IF Frequency ( C, dbm LO Input) MHz MHz MHz MHz MHz MHz Figure. IIP vs IF Frequency ( C, dbm LO Input) Figure. IIP vs IF Frequency ( C, dbm LO Input) IIP [dbm] MHz MHz MHz IIP [dbm] 9 MHz MHz MHz Peregrine Semiconductor Corp. All rights reserved. Document No. DOC-- UltraCMOS RFIC Solutions Page of
11 PE Figure. I DD vs IF Frequency ( C, dbm LO Input) Current [ma] 9 MHz MHz MHz Input Power [dbm] Figure. PdB vs IF Frequency ( C, dbm LO Input) MHz MHz MHz Document No. DOC-- Peregrine Semiconductor Corp. All rights reserved. Page of
12 PE Evaluation Kit The mixer evaluation kit board was designed to ease customer evaluation of the PE quad MOSFET mixer with integrated LO amplifier. Figure. Evaluation Board Layout The RF and IF ports are connected through Ω transmission lines and : transmission line transformers to J and J, respectively. The LO ports are connected through Ω transmission lines to J and J, respectively, and can support either a single-ended or differential signal drive. With a single-ended input, no termination is needed on the un-used port. The board is constructed of a two metal layer FR with a total thickness of.". The bottom layer provides ground for the RF transmission lines. The transmission lines were designed using a coplanar waveguide with ground plane model using a trace width of.", trace gaps of.", dielectric thickness of.9" and metal thickness of.". J can be used to enable or disable the part. The chip enable EN is active low. De-coupling capacitors are provided on the V DD traces. These capacitors should be placed as close to the V DD pin as possible. PRT- Peregrine Semiconductor Corp. All rights reserved. Document No. DOC-- UltraCMOS RFIC Solutions Page of
13 PE Figure. Evaluation Board Schematic INB_NC Z= Ohm 9 J R R OHM J HEADER PIN R C pf VDD R9 R C pf C μf INA_INB ENB_INA J J Z= Ohm Z= Ohm R OHM R R OHM R C pf R OHM U L_MSOP R R R R T ETK-T R OHM R R9 R Z= Ohm J RF J HEADER, PIN VDD VDD_GND_ENB R OHM μf pf R R9 J SOCKET_L_MSOP R R R ETK-T T OHM J T T ETK-T ETK-T Z= Ohm Z= Ohm J9 R R OHM R OHM R R Notes:. Caution: contains parts and assemblies susceptible to damage by electrostatic discharge (ESD).. LO input can be differential or single ended (INA_INB/ INB_NC).. With single ended LO input, no termination is needed on unused port. Z= Ohm J IF DOC- Document No. DOC-- Peregrine Semiconductor Corp. All rights reserved. Page of
14 PE Figure. Package Drawing -lead MSOP. mm A... C (X). B C (X) PIN # CORNER..±. (x).9 (x).±..±. (x).. TOP VIEW FRONT VIEW RECOMMENDED LAND PATTERN. C. C SEATING PLANE SIDE VIEW.±..9±. C. C A B. C ALL FEATURES DOC- Figure. Marking Specification AAAA LLLL YWW Pin identification AAAA Product number LLLL Last four digits of the assembly lot number YWW Date code, last digit of the year and two digit work week Peregrine Semiconductor Corp. All rights reserved. Document No. DOC-- UltraCMOS RFIC Solutions Page of
15 PE Figure. Tape and Reel Drawing Pin Table. Ordering Information Order Code Description Package Shipping Method PEMLAA-Z Low frequency passive mixer with LO amplifier Green -lead MSOP units / T&R EK- PE evaluation board Evaluation kit / Box Sales Contact and Information For sales and contact information please visit Advance Information: The product is in a formative or design stage. The datasheet contains design target specifications for product development. Specifications and features may change in any manner without notice. Preliminary Specification: The datasheet contains preliminary data. Additional data may be added at a later date. Peregrine reserves the right to change specifications at any time without notice in order to supply the best possible product. : The datasheet contains final data. In the event Peregrine decides to change the specifications, Peregrine will notify customers of the intended changes by issuing a CNF (Customer Notification Form). The information in this datasheet is believed to be reliable. However, Peregrine assumes no liability for the use of this information. Use shall be entirely at the user s own risk. Document No. DOC-- No patent rights or licenses to any circuits described in this datasheet are implied or granted to any third party. Peregrine s products are not designed or intended for use in devices or systems intended for surgical implant, or in other applications intended to support or sustain life, or in any application in which the failure of the Peregrine product could create a situation in which personal injury or death might occur. Peregrine assumes no liability for damages, including consequential or incidental damages, arising out of the use of its products in such applications. The Peregrine name, logo and UTSi are registered trademarks and UltraCMOS, HaRP, MultiSwitch and DuNE are trademarks of Peregrine Semiconductor Corp. Peregrine Semiconductor Corp. All rights reserved. Page of
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