Converters: Analogue to Digital

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1 Converters: Analogue to Digital Presented by: Dr. Walid Ghoneim References: Process Control Instrumentation Technology, Curtis Johnson Op Amps Design, Operation and Troubleshooting. David Terrell

2 1 - ADC Definition and Intro: ADC accepts the analog signal and produces a corresponding digital output. The digital output consists of several bits (data lines), the number of which varies with the resolution of the converter. 1 - Resolution describes the percentage of input voltage change required to cause a step change in the output. Table 1 shows the relationship between number of bits and the resolution. For an 8-bit ADC designed to accept 0 to 10-volt input signals, the range would be divided into 255 discrete steps of about 39 millivolts per step. By contrast, a 4-bit ADC would have less resolution, with each of the 15 output steps being equivalent to 6.66 % of the full-scale input, or 666 mv. Thus, the higher the resolution (the number of bits in the converted output), the smaller the input change required to move to the next output step.

3 1 - ADC Definition and Intro: Typical applications require resolutions of 8,12, or 20 bits. n Steps Resolution %

4 1 - ADC Definition and Intro: 2 - Since the analog input may take on any value but the output must be resolved into a fixed number of discrete levels or steps, each output step represents a range of input voltages. The process of forming discrete groups from the continuous input is called quantization, so the output does not exactly represent a given input value; rather, it represents an approximation. The resulting error is called quantization uncertainty and is equal to ±1/2 the value of the LSB of the converted output (the resolution of the ADC). In the example of the 8-bit converter described, this equates to an uncertainty of ±1/2 x 39 mv, or about ±19.5 mv. The magnitude of the quantization uncertainty is less with greater resolution. Therefore, if we need less quantization error, we must increase the number of bits in the output.

5 1 - ADC Definition and Intro: The Continuous and the sampled signals (discrete signal): discrete time, continuous values

6 1 - ADC Definition and Intro: Quantized signal: continuous time, discrete values

7 1 - ADC Definition and Intro: Digital signal (sampled and quantized): discrete time, discrete values

8 1 - ADC Definition and Intro: 3 - If the converter has no linearity problems, then the amount of input change to produce a change in the output will be consistent throughout the entire range of operation. When the amount of input change needed to reach the next step in the output varies, we call this variation nonlinearity. 4 - A converter whose output is progressively higher for progressively higher inputs has the property of monotonicity. It is possible, however, for a particular output step to be smaller than the preceding step. That is, the magnitude of the digital output decreases rather than increases on a particular step. This type of output response is called nonmonotonic.

9 1 - ADC Definition and Intro: 5 - Sometimes the intended range of input signals does not match the actual range. For example, the converter may be designed to accept a 0-volt to 10-volt input, but the actual device may be found to produce a maximum digital output for a 9.7-volt input. This discrepancy in full-scale operation is called gain error or scaling error. 6 - The entire operational range of the A/D converter can be shifted up or down. For example, it may be designed to produce a minimum digital output with 0 volts on the input; however, actual measurement may reveal that a DC offset voltage must be applied at the input in order to produce the minimum digital output. This is called the offset error and is often expressed as a percentage of full-scale input voltage.

10 1 - ADC Definition and Intro: 7 - Accuracy is a term used to describe the overall performance of an A/D converter. It includes the combined effects of all errors and measures the worstcase deviation from a given input signal and the equivalent value of its converted digital output. 8 - The amount of time required to generate a particular digital number to represent a given analog input signal is called conversion time. Alternately, the number of these conversions that can be accomplished in one second is called conversion rate.

11 2 Preamplifiers/Signal Conditioning: Special differential operational amplifiers called instrumentation amplifiers are used for this purpose. They offer a very high rejection to common-mode signals (e.g., 50 Hz hum picked up on long cables), but offer high amplification to differential-mode signals (e.g., the actual transducer signal). A low-pass filter is a must for anti-aliasing purposes. Figure 2 shows the position of the preamplifier with respect to the ADC.

12 3 Sample and Hold Circuit: Since the conversion of an analog signal into an equivalent digital number requires a certain amount of time (conversion time), And since the analog signal may change during the conversion process, Hence, substantial errors may be introduced. To eliminate this problem, we introduce a sample-and-hold (S/H) circuit between the preamplifier and the A/D converter as shown in figure.

13 3 Sample and Hold Circuit: A S/H circuit is a peak detector circuit but it is gated on and off. When the S/H circuit receives the track command (ON), it follows/ samples the input voltage. When a hold command is received (OFF), it opens its link to the input signal and holds the most recently sampled value at its output. This output is held constant throughout the conversion time of the ADC. Once the conversion has been completed, the track command is issued and the cycle repeats. The acquisition time is the time taken by the S/H circuit for the output to match the present level of analog input. The aperture time is a delay between the issuance of a hold command and the actual disconnecting of the S/H circuit from the input signal. The sampled input voltage is held constant by using a capacitor. Although the capacitor has a very low discharge current, it does eventually leak off, causing the S/H output to slowly decay or decrease. The rate at which this occurs is called the droop rate.

14 4 Sample rate and aliasing: The more often a signal is sampled, the better the digital representation of the analog signal. If the input signal changes rapidly relative to the speed of the conversion process, then substantial portions of the input signal will be missed (i.e., will go undetected). As an absolute minimum, the input signal must be sampled twice during each cycle. That is, the sampling rate (frequency) must be at least twice the highest frequency component present in the input signal (Shannon s theorem). While this may sound like a serious limitation, the use of a sample-andhold circuit actually extends the highest usable frequency of an A/D converter by several thousand times. Sample-and-hold circuits are available in integrated form. The AD386 is a sample-and-hold amplifier manufactured by Analog Devices, Inc., that offers a 3.6-microsecond acquisition time, a 12- nanosecond aperture time, and a 20-millivolt-per-second droop rate.

15 4 Sample rate and aliasing: The figure shows a sine input signal and an ADC that is sampling slower than the signal is changing. In this case, the system would conclude that it was measuring a sinusoid exactly half the frequency of the real input. This is called aliasing. Aliasing can occur any time that the input frequency is a multiple of the sample frequency. Also shown in Figure another input waveform that is not a sinusoid. As you can see, the resulting pattern of data values does not match the input at all.

16 4 Sample rate and aliasing: Any system must be designed so that it can keep up with whatever it is measuring. This includes the speed at which the ADC can collect samples and the speed at which the microprocessor can process them. If the input frequency will be greater than the measurement capability of the system, there are three ways to handle it: 1. Speed up the system to match the input. 2. Filter out high-frequency components with external hardware ahead of the ADC measuring the signal. 3. Use Digital Filter (FIR and IIR) to ignore high-frequency components. Any abrupt and sudden change (noise, glitches, faulty sensor ) are ignored.. Good system design depends on choosing the right tradeoffs between processor speed, system cost, and ease of manufacture.

17 5 Multiplexers: Many systems have several analog inputs that are monitored by a single computer or digital system. Each of these signals must be converted before the computer can process the signal. Since the A/D conversion circuitry can be quite expensive, designers opt to multiplex several analog inputs through a single A/D converter circuit. The multiplexer acts like a rotary switch that connects each of the analog inputs to the S/H circuit on a one-at-a-time basis. The position and timing of the "switch" are controlled by the computer or digital system. There should be total isolation between the channels, but sometimes signal voltages from one channel couples into another channel (generally via stray or internal capacitance). The resulting interference is called crosstalk.

18 5 Multiplexers:

19 5 Multiplexers: Many systems have several analog inputs that are monitored by a single computer or digital system. Each of these signals must be converted before the computer can process the signal. Since the A/D conversion circuitry can be quite expensive, designers opt to multiplex several analog inputs through a single A/D converter circuit. The multiplexer acts like a rotary switch that connects each of the analog inputs to the S/H circuit on a one-at-a-time basis. The position and timing of the "switch" are controlled by the computer or digital system. This makes possible the use of higher performance S/H and ADC circuits. Muxes are available as integrated circuits: the AD7506 manufactured by Analog Devices is a 16-ch device designed to select 1 of 16 analog input signals and connect it through to a single analog output.

20 6 Types: Parallel (Flash) ADC: It is the fastest technique and the simplest to understand. It is limited to small numbers of bits, since it requires 2^n-1 comparator circuits in order to produce an n-bit digital output. Ex. producing a 3-bit digital output (8 states) requires 2^3-1, or 7, comparator circuits plus a significant amount of logic circuitry. The following figure shows the complete schematic diagram of a 3-bit parallel A/D converter circuit (including decoder logic). The voltage divider provides a stable reference for one input of each of the seven voltage comparators. Each voltage tap on the divider is 1.25 volts higher than the preceding one, which effectively divides the 10-volt range into 8 distinct ranges. These ranges and the corresponding comparator outputs are shown in the following table, which also shows the converted digital output for each voltage range. The converted digital output for the given converter is in standard binary format.

21 6 Types: Parallel (Flash) ADC:

22 6 Types: Parallel (Flash) ADC: The AD9028 high-speed 8-bit A/D converter circuit, manufactured by analog Devices, Inc., is an example of a parallel converter. It can deliver an 8-bit output in 3.3 nanoseconds.

23 6 Types: Successive Approximation: Assume the counter is at 0 and the analog input is at some positive voltage. The output of the counter is converted to an analog voltage by a DAC and compared with the analog input signal by the comparator. In this condition, the output of the comparator will be low. The control unit interprets this low output to mean that the counter output is lower than the analog input, so the counter is allowed to increment. This situation continues on each subsequent clock -pulse until the counter has incremented to a value that exceeds the analog input voltage. When this point is reached, the output of the DAC will be higher than the analog input voltage, causing the comparator output to go to a high level. The control unit interprets this to mean that: The counter has recently exceeded the input, It directs the counter to STOP, It latches the counter Value where it is accessible to other circuitry, and It issues an END_OF CONVERSION signal. Waits for the new START_OF_CONVERSION signal to start the counter from zero again.

24 6 Types: Successive Approximation:

25 6 Types: Tracking ADC: At start, it operates exactly like the SA ADC. The counter starts incrementing from 0 till the DAC produces and analog output that is higher than the analog input, and the comparator output is turned High. The control unit interprets this to mean that the counter value has exceeded the input and directs the counter to begin counting down. As the counter decrements, the output of the D/A becomes less. As soon as the DAC output falls below the analog input, the output of the comparator switches low again and causes the counter to start incrementing once more. Thus, as the input changes the counter automatically tracks it. Every time the comparator changes state, the control unit transfers the counter value to a latch where it is accessible to other circuitry. This method is simple and inexpensive, it is faster than the SA method since the counter is not reset, but it is not particularly fast (especially for large input changes).

26 6 Types: Tracking ADC: For example, let us assume that the clock is operating at 20 megahertz and the converter is designed to provide a 16-bit output. If the input signal makes a small (equivalent of 1 bit) change, then it will take the circuit 1 /20 megahertz, or 50 nanoseconds, to provide a valid output. However, if the input makes a full-range step change, it takes the converter (1/20 MHz) * (2^16), or 3.28 milliseconds, to provide a valid result. This converter is best suited for either slow signals or signals that make only small changes at any given time. The response time of the tracking A/D converter is determined solely by the frequency of the input clock.

27 6 Types: Tracking ADC: The analog input makes a step change that takes the counter and A/D circuit six clock pulses to climb to the new input level. At this point, the counter and A/D signal oscillate back and forth on either side of the analog signal. This oscillation in the least significant bit will always occur, since the counter must always count either up or down.

28 6 Types: Single Slope ADC:

29 6 Types: Single Slope ADC: Very similar to the SA ASC but replaces the a DAC with a ramp generator (op amp integrator circuit with discharging transistor). The integrator produces a sawtooth waveform on its output, from zero to the maximum possible analog voltage, set by Vref. The counter can count from 0 up to (2^n-1), n = number of ADC bits. When Vramp equals Vin, the comparator op amp (control circuit) stops the counter and captures the last counter value by the buffer which will be the digital correspondent to the analog voltage input. At the same time, it resets the counter and the integrator (discharges the Capacitor via Q), starting the conversion of the next sample. This type suffers from the same problem as with the SA and the tracking ones: the speed of conversion that depends on the clock and the input voltage.

30 6 Types: Dual Slope ADC:

31 6 Types: Dual Slope ADC:

32 6 Types: Dual Slope ADC:

33 6 Types: Dual Slope ADC: Similar to the single slope ADC except that a variable-slope ramp and a fixed-slope ramp are both used. A ramp generator (integrator) is used to generate the ramps. Assume the counter is reset and the integrator o/p is zero. Assume a positive input voltage is applied (Vin) through the switch. The capacitor will charge linearly with a ve voltage and ramp. After a specific number of counts, the control logic will reset the counter and switch the input to the ve reference voltage (-Vref). At this point, the capacitor is charged with a negative voltage (-V) proportional to Vin. Now the capacitor discharges linearly from (-V) to zero producing a +ve ramp that is independent of the charge voltage. As the capacitor discharges, the counter advances. Because the discharge rate (slope) is constant, the time taken for Vc to reach zero depends only on the initial charge voltage (-V), which is proportional to Vin.

34 6 Types: Dual Slope ADC: When Vc reaches zero, the integrator o/p voltage will reach zero too. The comparator o/p will be LOW, which will Disables the CLK to the counter. The Binary Count (digital value) is LATCHED via the buffer. Indicates the end of conversion The Binary Counts (Digital Value) is proportional to Vin because the time taken for the capacitor to discharge depends only on (-V), and the counter counts this interval of time.

35 7 ADC Comparisons:

36 8 Real ADC: Input Level: The most common range for real ADCs, is between 0 and 5 Volts but many of them operate over a wider range of voltages. The Analog Devices AD570 has a 10v input range. The part can be configured so that this 10v range is either 0 to 10v or -5v to +5v, using one pin, but in this case the device needs a negative voltage supply. Other common input voltage ranges are ±2.5v and ±3v. With the trend toward lower-powered devices and small consumer equipment, the trend in ADC devices is to lower voltage, singlesupply operation. Traditional single-supply ADCs have operated from +5V and had an input range between 0v and 5v. Newer parts often operate at 3.3 or 2.7v, and have an input range somewhere between 0v and the supply (PC and DSP).

37 8 Real ADC: Internal Reference: Many ADCs provide an internal reference voltage. The Analog Devices AD872 is a typical device with an internal 2.5v reference. The internal reference voltage is brought out to a pin and the reference input to the device is also connected to a pin. To use the internal reference, the two pins are connected together. To use your own external reference, connect it to the reference input instead of the internal reference.

38 8 Real ADC: Reference Bypassing: Although the reference input is usually high impedance, with low DC current requirements, many ADCs will draw current from the reference briefly while a conversion is in process. This is especially true of successive approximation ADCs, which draw a momentary spike of current each time the analog switch network is changed. Consequently, most ADCs require that the reference input be bypassed with a capacitor of.1 microfarad or so.

39 8 Real ADC: Examples Low cost, low speed (successive approximation, 8bit-8KHz sampling), National semiconductor ADC0801,2,3,4 family. See Presentation / REPORT Medium speed (half-flash, 8-bit 666KHz), National semiconductor ADC0820. Presentation / REPORT High speed (flash 8-bit,40 to 80MHz, video quality) Philips TDA8714 (/7/6/4) family. See

40 8 Real ADC: Multichannel ADCs Property1 Property2 PropertyN input transducer signal conditioning input transducer signal conditioning input transducer signal conditioning converts property to electrical voltage/current produces convenient voltage/current levels over range of interest mux sample & hold Selects channel holds value during conversion Analog to Digital Conv. Digital value

41 8 Real ADC: Multichannel ADCs Example Available with multiple channels from 2 to 8. The Analog Devices AD7824 is a typical device, with 8 channels. It contains a single 8-bit ADC and an 8-channel analog multiplexer. The microprocessor interface to the AD7824 is equipped with additional three address lines (A0 A2) to select which channel is to be converted (3 lines => 2^3 state => 8 channels). It may be used in a mode where the microprocessor starts a conversion and is placed into a wait state until the conversion is complete. The microprocessor can also start a conversion on any channel (by reading data from that channel), then wait for the conversion to complete and perform another read to get the result. The AD7824 also provides an interrupt output that indicates when a conversion is complete. PRESENTATION / Report

42 9 Data Acquisition Cards: There are commercially available multiple input channels ADC board with channel select (Analog Multiplexer) and sample-and-hold

43 9 Data Acquisition Cards: Sensor Transducer Process Signal Conditioning Signal Conditioning A/D Conversion D/A Conversion Computer

44 9 Data Acquisition Systems: Data Acquisition Data storage Data manipulation and display Process Control and Optimization Report Generation

45 9 Data Acquisition Systems: Signal Cond.: Amplification Attenuation Multiplexing Filtering Excitation Linearization

46 10 Internal Microcontroller ADCs: Many microcontrollers contain on-chip ADCs. Typical devices include the Microchip PIC167C7xx family, the Atmel AT90S4434 and the AVR ATMEGA family. Most microcontroller ADCs are successive approximation because this gives the best tradeoff between speed and IC real estate on the microcontroller die. The PIC16C7xx microcontrollers contain an 8-bit successive approximation ADC with analog input multiplexers. The microcontrollers in this family have from 4 to 8 channels. Internal Control Registers control which channel is selected, start of conversion, and so on. Once an input is selected, there is a settling time that must elapse to allow the S/H capacitor to charge before the A/D conversion can start. The software must insure that this delay takes place.

47 10 Internal Microcontroller ADCs: Reference Voltage: The Microchip devices allow you to use one input pin as a reference voltage, which is normally tied to some kind of precision reference. The value read from the A/D converter after a conversion is: Digital word = (Vin/Vref ) * 256 The Microchip parts also permit the reference voltage to be internally set to the supply voltage, which permits the reference input pin to be another analog input. In a 5v system, this means that Vref is 5V. So measuring a 3.2v signal would produce the following result: Digital word = (Vin/Vref ) * 256 = (3.2/5) * 256 = 163 However, the result is dependent on the value of the 5v supply. If the supply voltage is high by 1%, it has a value of 5.05 volts, the value of the A/D conversion will be: (3.2/5.05) * 256 = 162 Typical power supplies can vary by 2% or 3%, their variations can have a significant effect on Vref, hence the results.

48 10 Internal Microcontroller ADCs: Codecs: The term codec means coder/decoder. It has a two-way operation: it can turn analog signals into digital and vice-versa, or it can convert to and from some compression standard. The National Semiconductor LM4540 is an audio codec intended to implement the sound system in a personal computer. It contains an internal 18-bit ADC and an 18-bit DAC. It also includes much of the audio-processing circuitry needed for 3D PC sound. The LM4540 uses a serial interface to communicate with its host processor. The National TP3504 is a telecom-type codec, and includes ADC, DAC, filtering, and companying circuitry. The TP3504 also has a serial interface.

49 10 Internal Microcontroller ADCs: Interrupt Rate: The MAX151 can perform a conversion every 3.3ms, or 300,000 conversions per second (300KS/sec, 0.3 MS/sec). Even a 33MHz processor operating at one instruction per clock cycle can only execute 110 instructions in that time. The interrupt overhead of saving and restoring registers can be a significant portion of those instructions. In some applications, the processor does not need to process every conversion, but in others the processor takes four samples, then calculates the averages (digital filter).

50 10 Internal Microcontroller ADCs: Interrupt Rate: In cases like this, using a processor with Direct Memory Access DMA capability can reduce the interrupt overhead. The DMA controller is programmed to read the ADC at regular intervals, based on a timer (the ADC has to be a type that starts a new conversion as soon as the previous result is read). After all the conversions are complete, the DMA controller interrupts the processor. The accumulated ADC data is processed and the DMA controller is programmed to start the sequence over. Processors that include on-chip DMA controllers include the and the 386EX.

51 11 Questions:

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