Introduction to Digital Logic Missouri S&T University CPE 2210 Exam 2 Logistics

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1 Introduction to Digital Logic Missouri S&T University CPE 2210 Exam 2 Logistics Egemen K. Çetinkaya Egemen K. Çetinkaya Department of Electrical & Computer Engineering Missouri University of Science and Technology cetinkayae@mst.edu 31 October 2016 rev Egemen K. Çetinkaya

2 Exam2 Logistics Overview Exam will be held on 2 November 2016 It will be in room ECE102 You are responsible from all material covered chapter readings from book lecture notes in-class discussions Cheating is prohibited! read course policies as a reminder Closed notes, books, no calculator Bring pencil and eraser 2

3 Exam2 Logistics Style Exam duration will be 50 minutes Exam will include different types of questions short answer long answer Students are responsible all material covered emphasis will be on topics after exam 1 3

4 Exam1 Topics 4

5 Applications and History Binary logic is the basis for digital systems Early history goes to 1850s not much done till 1938 significant progress after World War II with invention of transistor last decade is head-spinning There are many application areas of digital systems very pervasive in our lives Analog signals are continuous signals Digital signals are discrete signals 5

6 Signals can be: analog: continuous digital: discrete Important terminology: bit, byte, nibble, LSB, MSB Number Systems Important number systems: decimal, binary, hex, octal Conversions will be needed throughout your careers: know by heart 6

7 Electric Circuits There are two types of digital circuits combinatorial circuits: no memory sequential circuits: memory Ohm s law: V=IR Switches are basic components of digital circuits Switches have two states: on and off Transistors are basic electric circuit component CMOS have NMOS and PMOS transistors together NMOS transistors conduct when gate is on PMOS transistors conduct when gate is off 7

8 Basic Logic Gates Logic gates building blocks of complex logic circuits Gate functions can be represented via: symbols truth tables equations timing diagrams transistor circuits Important three basic gates are: AND OR NOT 8

9 Boolean Algebra Understand the important Boolean algebra properties commutativity distributivity associativity identity complementery null elements idempotent law involution law DeMorgan s law absorption law 9

10 Boolean Representations Three Boolean representations: circuits equations truth tables Important terminology variables/literals product term/sum term/sum-of-products/product-of-sums normal term/minterm/maxterm canonical sum (sum-of-minterms) canonical product (product-of-maxterms) 10

11 Combinatorial Logic Circuit Design and Analysis Combinatorial logic circuit analysis truth table might be hard to construct for many inputs equations can be simplified via Boolean algebra circuits Combinatorial logic circuit design/synthesis capture behavior create equations simplify implement as a gate-based circuit 11

12 Logic Gates: NAND, NOR, XOR, XNOR Basic gates are: AND OR NOT More gates: NAND NOR XOR XNOR Universal gates: NAND & NOR 12

13 Real gates have delay Wires also have delay Practical Considerations Designer must consider critical path delay Attention to active-lows are required Simulations help analyze digital logic 13

14 Karnaugh Maps Karnaugh maps used to simplify truth tables Group together adjacent cells containing ones 1s grouping is done for a group of: 2 0, 2 1, 2 2 1s Every one must be in at least one group Each group should be as large as possible Fewest number of groups possible Overlapping of 1s is allowed Zeros are not allowed Diagonal groupings are not allowed For DC conditions; assign a 0 or a 1 and then simplify 14

15 Exam2 Topics 15

16 Latches There are two types of digital circuits combinatorial circuits: no memory sequential circuits: memory Sequential circuit elements: latches, flip-flops, etc. Latches store a bit Latch types: basic SR latch level-sensitive SR latch level-sensitive D latch SR 11 is an issue for latches 16

17 Flip-flops store one bit Flip-Flops Latches are level-sensitive Flip-flops are edge-triggered Signal travels one cycle per flip-flop D-flip-flops are most commonly used Flip-flop types: SR, JK, D, T Two types of flip-flops: edge-triggered: active edge of the clock impacts the state master-slave: with two gated latches 17

18 Finite State Machines FSM is a mathematical formalism method FSMs are useful in designing sequential logic circuits Representations: state diagrams state transition tables timing diagrams Attention to non-exclusive and incomplete transitions! Types: Mealy machines & Moore machines 18

19 Controllers Controllers are sequential logic that implements FSM Mathematical formalism that help digital design: FSM for sequential logic circuits Boolean algebra for combinatorial logic circuits Controller design steps: capture the FSM setup architecture encode states create the truth table implement the combinatorial circuit Reverse engineering is converting circuit to FSM There are practical aspects: delay, initial states 19

20 State reduction: Sequential Logic Optimizations Egemen K. Çetinkaya reduces number of states without changing the behavior fewer states potentially reduces: register and circuit reducing states does not guarantee reduction in reg. & circt. State encoding: assignment of unique bits to each state may or may not reduce size of circuit and/or state register Moore: Outputs are determined by the current state Mealy: Outputs are determined by: current state current input 20

21 Registers Registers store multiple bits a flip-flop stores only one bit Several types of registers exist serial/parallel I/O combinations directional (right or left)/bidirectional Important operations using registers: shift: right: divide operation left: multiply operation rotation does not drop LSB or MSB, substitutes 21

22 Questions? 22

Introduction to Digital Logic Missouri S&T University CPE 2210 Exam 3 Logistics

Introduction to Digital Logic Missouri S&T University CPE 2210 Exam 3 Logistics Egemen K. Çetinkaya Egemen K. Çetinkaya Department of Electrical & Computer Engineering Missouri University of Science and