Interface Control Document From: Back End To: Correlator

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Janes Observatory of Bordeaux IPT Leader Approvals: Organization Date Observatory of Bordeaux System Engineering Approvals:

1 Interface Control Document ALMA A-ICD Version: A Prepared By: Organization Date John Webber Ray Escoffier Alain Baudry Clint Janes Observatory of Bordeaux IPT Leader Approvals: Organization Date Observatory of Bordeaux System Engineering Approvals: Organization Date ESO Configuration Control Board Approval: Organization Date ALMA Configuration Control Board Secretary, signing for the Control Board JAO Director Release Authorization: Organization Date Joint ALMA Office Project Director

2 Page: 2 of 11 Change Record Version Date Affected Section(s) Change Request # Reason/Initiation/Remarks

3 Page: 3 of 11 Table of Contents 1 DESCRIPTION Purpose Scope RELATED DOCUMENTS AND DRAWINGS References Related Interface Control Drawings PHYSICAL SYSTEM INTERFACES Mechanical Interface Optical Fiber Routing Electrical Power Interface Electronic Interface Reference Clocks Optical Fiber Receiver Interface Thermal Interface SOFTWARE/CONTROL FUNCTION INTERFACE SAFETY INTERFACE... 11

4 Page: 4 of 11 1 Description 1.1 Purpose The ALMA correlator processes digital IF signals received via a DTS fiber optics receiver card (part of the Back End subsystem) which is physically mounted in the racks of the correlator. The optical signals are transmitted from the antennas, pass through a patch panel within the AOS building, and are terminated in the optical receiver cards. 1.2 Scope This ICD covers the interface requirement between the ALMA system Back End and the ALMA correlator, including reference frequency signals and digital signals to/from the optic fiber transmission system. 2 Related Documents and Drawings 2.1 Applicable Documents [AD01] ALMA A-ICD [AD02] CORL x-DWG 2.2 Reference Documents [RD01] Fiber Optic RX to Station Rack, CORL x-DWG [RD02] ALMA Design Requirements, ALMA x-SPE [RD03] ALMA Monitor and Control Bus Interface Specification, ALMA x-SPE [RD04] BEND A-GEN, Backend Electronics Risk Analysis Assessment (Appendix A) Laser Safey SOP 3 Physical System Interfaces The correlator shall have inputs for a system 125 MHz clock and 48 msec time tick, to be in the first quadrant. The racks that house the ALMA correlator also provide installation space for 256 ALMA DTS receiver printed circuit cards. These cards are not considered in this specification to be part of the correlator even though they are mounted in the racks and motherboards of the correlator.

5 Page: 5 of 11 The optical fibers carrying the digital IF signals from the optical patch panel to the DTS receiver cards shall be routed through the correlator racks, and the method of accomplishing this is included here as well. 3.1 Mechanical Interface Optical Fiber Routing Large optical fiber bundles shall route the IF signals to their destinations in the correlator. The bundles shall be separated into quadrant- and/or rack-specific cables before entering the correlator room, then be distributed overhead. Within a correlator quadrant, the bundle shall enter one or more breakout boxes which shall split the fiber bundle into groups of fibers, then individual fibers, obeying the rules regarding minimum bend radius. The separated fibers shall be routed within the rack assemblies to the optical receiver cards in each station rack. Details of the routing depend on whether Erbium-Doped Fiber Amplifiers (EDFA) are required; there are two options: Option 1: EDFA present From the patch panel room, 768 data fibers, bundled in convenient sized groupings (of 24 or 48, plus an allotment of pre-terminated spare cables) of tight buffered single mode distribution cable, shall be routed from a splice rack fed by the optical demultiplexer breakout cables to station racks located in the correlator room. These cables shall reside in a cable tray that runs between the rooms (and over the hallway which separates the rooms). Because the aforementioned splice rack shall be the primary flexibility point for data path reassignments during correlator construction phase transitions, it shall be necessary to pigtail the incoming and outgoing fibers with connectors in such a way that the routing of the data fibers can be easily re-assigned. The distribution cable (or cables) that feeds each correlator room station rack shall terminate in one of sixteen splice enclosures installed on the cable tray above each rack. All distribution fibers, active data and spares, shall be pigtailed. By keeping these splice enclosures out of the station racks, the risk of interfering with station rack airflow is averted. Additionally, fiber management inside the rack should be simplified by keeping the station racks free of internal splice enclosures. These

6 Page: 6 of 11 enclosures shall house the splice trays necessary for accommodating the 48 data connections plus the spare allocation. From each of these splice enclosures forty-eight individual patch cables (twentyfour sent down each side of a rack), shall be routed to each of the forty-eight inputs on the fiber optic receiver cards. Inside the station racks and behind each of the four station bin motherboards shall sit a shelf to aid in routing each patch cable to its assigned fiber optic receiver. The station rack patch cables shall be subjected to some stress due to the normal frequency at which receiver assemblies shall be replaced. In the event of a single patch cable failure, it would not be difficult to replace the defective patch cable from a supply of spares. Option 2: EDFA not present In the event it is determined that EDFAs are not required in the fiber optic cable system, the Option 1 fiber cable management plan shall remain. The only change to this scheme would be that, providing there is adequate space, the optical demultiplexers and their associated splice rack shall reside in the correlator room instead of the patch panel room. If space is not available in the correlator room for these additional racks, the demultiplexer and splice rack shall remain in the patch panel room. 3.2 Electrical Power Interface Each fiber receiver card gets 48 VDC with a drive capacity of up to 2 Amperes from the correlator station motherboard. Tolerance of the 48 VDC power connection is +/- 5 VDC with ripple less than 1.0 VPP. 3.3 Electronic Interface Reference Clocks The correlator requires an input sinusoidal reference signal from the Back End at 125 MHz which shall be terminated in 50 Ω at the correlator end. The input signal level shall be a minimum of +10 dbm. The correlator shall provide an N type connector receptacle for the 125 MHz clock signal and the Back End shall provide the mating plug and cable. The cable will be on the order of 35 m long and installed by SE & I IPT in cable troughs provided for the fiber optic cabling.

7 Page: 7 of 11 The correlator also requires a time tick from the Back End: a single 48 msec system cycle tick with LVDS interface standards that is low for 42 msec and high for 6 msec. The tolerance on this duty cycle is ±1 msec. The leading edge of this signal (low to high) is used by the correlator as the system time reference. The correlator shall provide a BNC twinax connector receptacle, AMP Tyco part number , on the correlator mother board for the time tick signal and the Back End shall provide the mating plug and shielded twisted-pair cable. The cable will be on the order of 35 m long and will be installed by SE & I IPT in the cable tray provided for the fiber optic cabling. Pin 1 of the mother board mounted connector (the mother board twinax connector pin that is a socket) shall carry the true sense of the differential 48 msec signal Optical Fiber Receiver Interface The interface between the DTS receiver printed circuit cards and the ALMA correlator include 4 types of signals Clock The correlator provides a single +6 dbm (into 50 Ω) sinusoidal 125 MHz clock for each receiver card. Amplitude tolerance of this signal from the correlator is ± 1 db. The clock interface should be terminated on the receiver card with a 50 Ω resistor to ground. The clock signal is synchronous with the LO-supplied 125 MHz correlator clock Time Tick Each receiver card gets a single 48 msec system cycle tick with LVDS interface standards that is low for 42 msec and high for 6 msec. The positive-going transition of this signal is set by the correlator as the system time reference. Tolerance on the high duration of this signal is +/- 1 msec. The time tick signal is synchronous with the LO supplied correlator time tick Samples Each receiver card outputs for each of two basebands, thirty-two 3-bit demultiplexed sample streams synchronous with the correlator system 125 MHz clock. Any given 3-bit sampler data interface carries bits from every 32 nd sample of the original 4-GS/S digitizer output. Sample data from the fiber optic card output drivers shall have LVCMOS3.3 logic levels (ground-to-3.3 VDC rail-to-rail) with each digital output having a 91 ohm series termination resistor on the receiver card.

8 Page: 8 of 11 Each output of the receiver card shall be terminated on correlator system digital filter cards using a 110 ohm resistor to ground. No specification on exact timing of signals to/from the fiber optic cards relative to the correlator system clock is necessary because of the adjustability of FPGAs in the system. See the drawing [AD02] for the fiber optic receiver card pin-out as supported by the ALMA correlator station motherboard and other requirements the fiber optic card must meet Auxiliary Signals Three additional interface signal types are part of the fiber optic card-correlator interface only in that the station motherboard supplies PCB traces and connectors for the signals. These signals do not otherwise interface with the correlator in any way (see Figure 1 of [AD02] for pinout details) Receiver card optical fiber inputs Each fiber optic card gets input data from 3 optical fibers and the station motherboard mounts fiber connectors in support of this interface (See Figure 1 of [AD02] for connector types) CAN bus Each fiber receiver card communicates with the ALMA computer system via a CAN bus. Each station motherboard in the ALMA correlator provides two male-female DB9 connector pairs in accordance with the ALMA CAN bus standards as defined in ALMA specification [RD03]. The CAN bus cable is provided by Computer IPT as explained in a separate ICD EDFA SAFE signals EDFA SAFE signals have been removed from the receiver board and the need for the SAFE signals obviated by use of the optical multiplexor Drawing descriptions and additional information Signal Labels

9 Page: 9 of 11 Figure 1 of drawing [AD02] shows the conversion of signal labels between the ALMA optic fiber receiver card schematic and the schematic of the ALMA correlator station motherboard on which it mounts. Each receiver card outputs two baseband signals. Each baseband signal consists of 32 time demultiplexed sample streams 3 bits in width. The two baseband signals are differentiated by the BB0 and BB1 label prefixes. The input samples that drive the filter card input from the DTS receiver card can be seen in Figure 1 of drawing [AD02]. There are 32 three-bit sample signals for each baseband synchronous with the 125 MHz system clock. The busses are labeled D[31:0], C[31:0], and B[31:0]. The 3-bit sample D0,C0,B0 is the oldest sample (that is, of the 32 parallel input samples, the zero index sample was the first in time taken by the digitizer). Sample coding shall be identical to the Folding Differential Logic Gray code delivered by the ALMA digitizer assembly. The input format of the 3-bit Gray code samples into the filter card is: D C B Maximum negative digitizer input Maximum positive digitizer input Test data interface Both the fiber optic transmitter and receiver cards shall support testing of the ALMA correlator data interface by being able to substitute for digitizer outputs 35-bit pseudo-random data signals that shift by 32 states every 125 MHz system clock. A normal 35-bit PN generator has a 35-bit shift register with a single EXOR of the 35 th and 33th output stages as the input to the first stage. By using 32

10 Page: 10 of 11 EXORs, the state of the generator 32 clocks forward can be anticipated and the PN generator made to appear as if it clocks 32 steps on each clock. Each test signal PN generator shall have the ability to be initialized using an arbitrary 32-bit seed pattern jam loaded into the PN register synchronous with the 48 msec time tick (the other 3 bits of the seed may be strapped low). This jam load can also be turned off to allow the PN generator to run continuously. Three independently seeded 35-bit PN generators are required for substitution of the 3-bit samples of each baseband signal (a total of 6 PN generators for 2 basebands). Any 32 of the 35-bit outputs of a given PN generator can be used as outputs (order of PN output to sample bit output is not important) Mode Selection The fiber optic receiver cards shall support mode selection in the correlator by having a cross-bar stage between the receiver card internal BB0-BB1 signals and the BB0-BB1 card outputs into the correlator Optical Receiver Card The optical receiver card is a 6U X 280 card equipped with Scanbe (APW) P/N S-217 card ejectors, two EPT Hardmetric P/N connectors, and one EPT Hardmetric P/N connector as shown in Figure 1 of drawing [AD02]. Details of connector location for these and the auxiliary signal connectors described in section below are shown in Figure 2 of [AD02] Slot mechanical layout Figure 2 of [AD02] shows the mechanical layout of the ALMA correlator station motherboard fiber optic receiver card receptacle slot. 3.4 Thermal Interface The optical receiver card is cooled by the air flow within the Station Rack, as specified in [AD01]. 4 Software/Control Function Interface The optical receiver card is controlled over the CAN bus independently from the correlator.

11 Page: 11 of 11 5 Safety Interface The optical receiver card is subject to the same requirements for fire and earthquake hazard as the correlator as a whole, as specified in [AD01]. Laser and Fiber optic safety requirements are given in [RD04].

EVLA Fiber Selection Critical Design Review

EVLA Fiber Selection Critical Design Review December 5, 2001 SJD/TAB 1 Fiber Selection CDR Decision about what fiber to install Select cable Jan 2002 Order cable Jan 2002 Receive cable May 2002 Start installation