SingMai Electronics SM06. Advanced Composite Video Interface: DVI/HD-SDI to acvi converter module. User Manual. Revision th December 2016

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1 SM06 Advanced Composite Video Interface: DVI/HD-SDI to acvi converter module User Manual Revision th December 2016 Page 1 of 23

2 Revision History Date Revisions Version First Draft Added support for NTSC/PAL encoding Updates for Revision 2 PCB. 0.3 Page 2 of 23

3 Contents Revision History... 2 Contents... 3 Tables... 3 Figures Introduction acvi Overview Connecting up the module Data Transfers Circuit description Specification Tables Table 1 acvi supported video formats... 5 Figures Figure 1 SM06 module...4 Figure 2 acvi Spectrum....6 Figure 3 SM06 Interconnections Figure 4 UTP connector pin assignments...8 Figure 5 SM06 Data slicing selection - J Figure 6 SM06 Schematics - Sheet Figure 7 SM06 Schematics - Sheet Figure 8 SM06 Schematics - Sheet Figure 9 SM06 Schematics - Sheet Figure 10 SM06 Schematics - Sheet Figure 11 SM06 Schematics - Sheet Figure 12 SM06 Schematics - Sheet Figure 13 SM06 Schematics - Sheet Figure 14 SM06 Schematics - Sheet Figure 15 SM06 Schematics - Sheet Page 3 of 23

4 1. Introduction SM06 is a transmitter module compatible with the acvi Advanced Composite Video Interface format. SM06 accepts either DVI or SDI/HD-SDI input formats which it converts to analogue NTSC/PAL/aCVi encoded video for driving both twisted pair and coaxial cable. acvi is a method to transmit HD video over long distances of existing coaxial or twisted-pair cable networks or allow the use of less expensive RG-59/UTP cable in long distance installations. SM06 supports the following HD acvi formats: 720p-25/30/50/59/60Hz, 1080p-24/25/29/30Hz and 1080i-50/59/60Hz and also 525i and 625i which it encodes to NTSC-M and PAL respectively. Switching between formats is automatic. Figure 1 SM06 module. Page 4 of 23

5 2. acvi Overview The following is a brief overview of the acvi interface. The basic concept of the acvi interface is to build on the proven and reliable transport method of NTSC. NTSC is capable of transmitting more than 1km across RG-59 cable but the bandwidth is limited to 5MHz. Because the cable system is a closed system, it is only necessary for the transmitter and receiver to understand each other and we can modify the basic NTSC method to suit HD transmissions. According to the SMPTE-296M specification, HD (74.25MHz sampling) video transmission requires a luma bandwidth of 30MHz and chroma bandwidth of 15MHz. To save on system costs acvi supports the 30MHz luma bandwidth but constrains the chroma bandwidth to 7.5MHz (4:1:1 sampling). The colour difference signals are modulated onto a carrier in quadrature so they effectively use the same bandwidth: the chroma subcarrier is ~24.75MHz.. The high frequency luma and the modulated chroma overlap above 12.4MHz but because of the line to line phase relationship of the chroma, may be separated using a line comb filter (and also because of the use of single chip image sensors, there is usually little high frequency content to cause image artifacts). The effective bandwidth of the complete signal is therefore approximately 12.3MHz (chroma upper sideband + filter roll off) MHz or about 37MHz, setting a minimum sampling frequency of 2 x 37MHz or 74MHz. For convenience we choose 74.25MHz as a sampling frequency as this is related to the SMPTE272M standard; (see Figure 2). For transmission over 300m of RG-59 cable we can expect 18dB loss at higher frequencies 50MHz). However the synchronizing signals are at a much lower frequency where the loss is only about 1-2dB so reliable rastering of the received signal should always be assured. The peak to peak video level of acvi is 1.26V (100% colour bars) which maintains compatibility with any legacy SD equipment on the network and also allows common low-power 3.3V drivers to be used. Table 1 lists the currently supported video formats for acvi. Format Pixels/line Line F SC /F H Subcarrier frequency ratio 720p/25Hz kHz MHz 720p/30Hz kHz MHz 720p/50Hz kHz MHz 720p/59.94Hz kHz MHz 720p/60Hz kHz MHz 1080p/24Hz kHz MHz 1080p/25Hz kHz MHz 1080p/29.97Hz kHz MHz 1080p/30Hz kHz MHz 1080i/50Hz kHz MHz 1080i/59.94Hz kHz MHz 1080i/60Hz kHz MHz 1 Input clock is MHz (else 148.5MHz). Table 1 acvi supported video formats. Page 5 of 23

6 Figure 2 acvi Spectrum. Page 6 of 23

7 3. Connecting up the module The SM06 module is powered by a universal input (90-260VAC) AC-DC adaptor. The 5VDC, 12W output of this adaptor should be connected to the jack input, +5V IN, of the SM06. Once connected, the yellow LED, FPGA OK should light, indicating the FPGA has been correctly configured and the module is running. Figure 3 shows the SM06 interconnections. Figure 3 SM06 Interconnections. SM06 accepts either SDI/HD-SDI or DVI inputs. Switching between the inputs is automatic, priority being given to the SDI/HD-SDI input. If a valid SDI/HD-SDI clock is detected on the input, the SDI LOCK LED will light. If the SDI/HD-SDI input has valid TRS timing pulses and is one of the supported acvi video standards shown in Table 1 or 525i/625i standard, the SDI/HD-SDI input will be switched to, even if the DVI input is also present. The DVI input is connected via an HDMI style connector. The DVI has to be one of the formats shown in Table 1 (or 525i or 625i) graphics formats are not accepted. If a DVI source is detected the HDMI HPD (Hot Plug Detect) LED will light. Note, that even with this LED lit, if the SDI input is connected the SM06 will prioritise the SDI input. SM06 provides simultaneous single ended coaxial and differential twisted-pair (UTP) outputs, for both SD and HD video. The UTP outputs are connected via a RJ45 style connector. Figure 4 shows the pin assignments for the connector: acvi assumes the UTP cable connections are straight so both the transmitter and receiver use pin 1 for the VIDEO+ (non-inverted) signal, and pin 2 VIDEO- (inverted) signal. Page 7 of 23

8 Figure 4 UTP connector pin assignments. Should the input to the SM06 be removed or fail, the SM06 will switch to an internal colour bar generator. The output video standard will be whatever was last detected on the inputs (e.g. if the last detected input was 525i, the output will be 75% colour bars at NTSC-M format). If no valid input has previously been detected, the output will default to 720p/60Hz. The SM06 will be shipped set for your requested cable choice (i.e. coaxial or UTP). For the automatic cable compensation and data transfer to operate correctly it is necessary to select the cable input to extract the data from. To do this, remove one of the end panels of the SM06 by removing the four screws in the corners of the panel. The top panel can then be slid off (see Figure 5). Figure 5 SM06 Data slicing selection - J9. Data from the receiver to the transmitter in acvi mode is selected by J9. J9 pins 1-2 should be connected to select the coaxial acvi input, or J9 pins 2-3 connected for the UTP acvi input: Pull off Page 8 of 23

9 the small pin header and place over the pins you require for your cable type. The panels can then be refitted. Page 9 of 23

10 4. Data Transfers TBF. Page 10 of 23

11 5. Circuit description Figures 6-15 show the schematics for the SM06. Below is a brief technical description of the module. Sheet 1. J3 is the 5VDC power input connector to the SM06 module. The 5VDC is protected from reverse polarity and over-range inputs by D1, D2 and the resettable fuse, F1. The input is then filtered by L1 and C2 to provide the clean 5VDC for the analogue output stage and also linearly regulated by U1 and U20 to provide the 3.3VDC and 2.5VDC supply voltages. Sheet 2. U2 provides the 1.2VDC for the internal voltage of the FPGA. U3 provides the 2.5VDC for the analogue PLL circuity of the FPGA and L2 and C25 filter the VCCINT for the FPGA PLL digital blocks. U12 provides the 1.8V for the HDMI receiver with LC networks providing isolation for the various individual rails. Sheet 3. J1 is the DVI/HDMI input connector. U13 and U14 protect the HDMI receiver from overshoots on the TMDS signals and U15 does the same for the control signals. The hot plug detect signal, indicating the presence of a HDMI source, is shown by LED, D5. Sheet 4. U16 is the HDMI receiver IC, an Analog Devices ADV7611. The output from this IC is Y,Cb,Cr in 4:2:2 format. In free-run mode this IC provides the fixed 13.5/74.25MHz clock. The video input standard is read from the ADV7611 status registers. Sheet 5. U4 is the cable equalizer for the HD-SDI input. U18 deserialises the 270MHz/1.485GHz input to five LVDS inputs and a DDR clock. Further demuxing, extraction of the TRS timing signals and the video formatting is performed by the FPGA. LED D9 lights if U18 is able to lock to incoming SDI/HD-SDI signal. The input standard is also determined by the FPGA. Sheet 6. U19 is the FPGA. The FPGA is an Altera EP4CE15 device in a 144 pin 0.5mm TQFP package. The FPGA contains the PT55 CVBS/aCVi encoder, a SingMai PT13 control microprocessor, a colour bar generator and the HD-SDI input decoder. Sheet 7. The FPGA is a volatile device and needs configuring on switch on, which it does using U5, a 4Mb EEPROM. The device is automatically configured on switch on, and successful configuration is indicated by LED, FPGA OK. The EEPROM may also be reprogrammed via J4, which is compatible with the Altera USB-Blaster and the Quartus Programmer. Sheet 8. X1 is a 27MHz crystal oscillator, and is used to clock the PT13 microprocessor and also as a fixed time-base to determine the SDI/HD-SDI input standard. U7 is a proprietary copy-protection IC. U7 calculates a checksum from a PT13 generated data stream, and the calculated checksum from U7 is compared with an FPGA internally generated checksum. If the two do not match the SM06 module is shut down. This means that even if the bit stream of the FPGA/EEPROM is captured the PT55 IP core will not run without U7 being fitted. U17 is an RS232 level translator. The RS232 data interface is described in Chapter 4. Page 11 of 23

12 Sheet 9. U8 is a 10 bit digital to analogue converter (DAC). The DAC converts the CVBS/aCVi encoded digital data to an analogue signal of 0-1.0V amplitude. The DAC is clocked at 27/148.5MHz. U6 provides a clean 3.3V for the DAC. U21 amplifies the DAC output to provide a 1.26V pk-pk output for driving the outputs and U9 provides a programmable low pass filter to remove the clock from output video and reconstitute the waveform. Sheet 10. U10-A buffers the coaxial acvi video while U23 converts the differential acvi to a single ended output. J9 selects the input from either the coaxial connector (connect J9 pins 1-2) or the UTP connector (connect J9 pins 2-3). U10-B filters the input signal and C50 and D3 form a sync tip clamp to ensure stable DC levels into the data slicer. The data slicer is formed by comparator U10-D and buffered by U11 before being decoded by the PT55 acvi encoder IP core. Page 12 of 23

13 Figure 6 SM06 Schematics - Sheet 1. Page 13 of 23

14 Figure 7 SM06 Schematics - Sheet 2. Page 14 of 23

15 Figure 8 SM06 Schematics - Sheet 3. Page 15 of 23

16 Figure 9 SM06 Schematics - Sheet 4. Page 16 of 23

17 Figure 10 SM06 Schematics - Sheet 5. Page 17 of 23

18 Figure 11 SM06 Schematics - Sheet 6. Page 18 of 23

19 Figure 12 SM06 Schematics - Sheet 7. Page 19 of 23

20 Figure 13 SM06 Schematics - Sheet 8. Page 20 of 23

21 Figure 14 SM06 Schematics - Sheet 9. Page 21 of 23

22 Figure 15 SM06 Schematics - Sheet 10. Page 22 of 23

23 6. Specification The following refers to the specification for the SM06 receiver module only. Power: +5VDC ± ~450mA. Dimensions: 120mm x 78mm x 27mm. SDI/HD-SDI input: SDI (SD): SMPTE-259M HD-SDI (HD): SMPTE-292M Video standards: 720p/25Hz,720p/30Hz, 720p/50Hz, 720p/59.94Hz, 720p/60Hz 1080p/25Hz, 1080p/29.97Hz, 1080p/30Hz, 525i/29.97Hz, 625i/25Hz. Luma bandwidth: Chroma bandwidth: acvi: 29.7MHz ± 1dB MHz. SD: 5.2MHz ± 1dB. 6.75MHz. acvi: 7.5MHz ± 1dB. 12.3MHz. SD: 1.3MHz -3dB. Page 23 of 23

SingMai Electronics SM06. Advanced Composite Video Interface: HD-SDI to acvi converter module. User Manual. Revision 0.

SingMai Electronics SM06. Advanced Composite Video Interface: HD-SDI to acvi converter module. User Manual. Revision 0. SM06 Advanced Composite Video Interface: HD-SDI to acvi converter module User Manual Revision 0.4 1 st May 2017 Page 1 of 26 Revision History Date Revisions Version 17-07-2016 First Draft. 0.1 28-08-2016