ECE 172 Digital Systems. Chapter 2.2 Review: Ring Counter, Johnson Counter. Herbert G. Mayer, PSU Status 7/14/2018
|
|
- Candice Jennings
- 5 years ago
- Views:
Transcription
1 ECE 172 Digital Systems Chapter 2.2 Review: Ring Counter, Johnson Counter Herbert G. Mayer, PSU Status 7/14/2018 1
2 Syllabus l Ring Counter l Parallel Output Ring Counter l Ring Counter via D Flip-Flops l Timing Diagram of Ring Counter l Johnson Counter l Ring vs. Johnson Counter Table l Pros and Cons 2
3 Ring Counter Pictures and flow of ideas taken from [1] 3
4 Counter l When the output of a shift register array is fed back to its input, result is a ring counter l Data pattern contained within shift register will recirculate as long as clock pulse applied l Constant data pattern will repeat every n clock pulses in n-bit shift register; see below for n = 4 l But necessary first to load some data pattern l Initializing all 0 s or all 1 s doesn t count l How useful is such a simple, continuously looping digital signal pattern? l May be used for counting, count reduction via division, integer modulo operation 4
5 Abstract 4-bit Ring Counter Ring Counter via Shift Registers, 4-bit modulo counter: Possible to Initialize via parallel inputs D A.. D D Or serially via bit-string input at D A 5
6 Ring Counter l Above abstract 4-bit ring counter implemented as sequence of 4 Flip-Flops l May be JK or D Flip-Flops l Initialization may happen serially via D A input, costing 4 separate clock cycles l Or in parallel, costing 1 cycle, via array of inputs D A.. D D l Initial pattern repeats itself every 4 clocks l Number of Flip-Flops 4 is arbitrary, same logic for any number of components l Likely cases 16, 32, or 64 6
7 Abstract 4-bit Ring Counter Abstract Ring Counter, 4 bits, showing parallel outputs. Same repeated pattern of 4 bits every 4 clocks 7
8 Parallel Output Ring Counter l Above abstract 4-bit ring counter functions like the earlier l Yet shows possible parallel outputs Q A.. Q D l In addition to sequential output at Q D of last D Flip-Flop, serially 1 bit per clock cycle l Ring again implemented via direct feedback from last output to first input l If we interpret bit sequence of Flip-Flop as binary number, we d have to invert order of the powers of 2 l Leftmost 1 digit to be viewed lowest power l Bit string is , decimal value: 1, as in 2 0 l Next cycle yields , value: 2, as in 2 1 8
9 Ring Counter via D Flip-Flops Each of 4 bits of Ring Counter via D Flip-Flop: Output Q of FF D back to input D of FF A Read all 4 outputs in parallel Q A.. Q D, or serially at Q D 9
10 Timing Diagram of Ring Counter l Assuming 4 bits and initialization pattern of for 4 bits, input pattern repeats every 4 cycles at output l 5 ½ cycles shown, to emphasize repeat of 1 10
11 Johnson Counter Taken from [2] 11
12 Johnson Counter Def: l A Johnson Counter is a modified ring counter, whose inverted output of last Flip- Flop becomes input to the first l Interestingly, the MOD of the Johnson Counter is 2 * n, with n being number of bits, i.e. number of Flip-Flops used 12
13 Johnson Counter l Named after Robert Royce Johnson, US inventor, l Johnson Counter, AKA Johnson Ring Counter, AKA Twisted Ring Counter l Similar to Ring Counter above l But instead of using the output Q of last D Flop-Flop as input, inverted output Q becomes input of first Flip-Flop l Model here uses 4 Flip-Flops l Initial pattern of of 4 input bits creates 1 output at Q of last (or 4 th ) D Flip-Flop, which is then fed into input of 1 st D Flip-Flop 13
14 Johnson Counter Table Johnson uses inverted output Q D of D Flip-Flop as Feedback into first Flip-Flop Input D 14
15 Johnson Counter Inverted Output Q of FF D into Input D of FF A 15
16 Johnson Counter l Johnson 4-bit ring counter streams blocks of four 0s followed by four 1s l Thus producing an 8-bit pattern with 4 Flip- Flops l Inverted output Q is connected to D input l Thus an 8-bit pattern continually repeats l Example: 1000, 1100, 1110, 1111, 0111, 0011, 0001, 0000, 1000 etc. l Circuit above shows such a Johnson Counter l Next table show Ring- and Johnson Counter 16
17 Ring vs. Johnson Counter Table Ring Counter and Johnson Counter Truth Table: Johnson Counter has 8 States with 4 Flip-Flops! 17
18 Pros and Cons l Johnson Ring counters used in ASIC and FPA design l Goal to create FSAs l Binary counter would required more complex adder circuit, using more components than a ring counter l Adder has higher propagation delay: l Delay steps for adder increase with number of digits l Propagation delay for Ring Counter is nearly constant, regardless of number of bits 18
19 Pros and Cons l Ring Counter can represent only n states, with n = number of bits (Flip-Flops) l Johnson Ring counters can represent 2 * n states l Binary adder can represent 2 n states l Johnson can self-initialize to all 0 state! l Ring- as well as Johnson Flip-Flop only have a limited number states 19
20 Bibliography 1. Wiki for Ring Counter: chpt-12/ring-counters/ 2. Wiki for Johnson counter: seq_6.html 3. Regular and Johnson ring counter together: 4. Robert Joyce Jophnson: en.wikipedia.org/wiki/ Robert_Royce_Johnson 20
Registers and Counters
Registers and Counters Clocked sequential circuit = F/Fs and combinational gates Register Group of flip-flops (share a common clock and capable of storing one bit of information) Consist of a group of
More informationCounter dan Register
Counter dan Register Introduction Circuits for counting events are frequently used in computers and other digital systems. Since a counter circuit must remember its past states, it has to possess memory.
More informationComputer Organization & Architecture Lecture #5
Computer Organization & Architecture Lecture #5 Shift Register A shift register is a register in which binary data can be stored and then shifted left or right when a shift signal is applied. Bits shifted
More informationAsynchronous (Ripple) Counters
Circuits for counting events are frequently used in computers and other digital systems. Since a counter circuit must remember its past states, it has to possess memory. The chapter about flip-flops introduced
More informationLogic Design II (17.342) Spring Lecture Outline
Logic Design II (17.342) Spring 2012 Lecture Outline Class # 03 February 09, 2012 Dohn Bowden 1 Today s Lecture Registers and Counters Chapter 12 2 Course Admin 3 Administrative Admin for tonight Syllabus
More informationCounters
Counters A counter is the most versatile and useful subsystems in the digital system. A counter driven by a clock can be used to count the number of clock cycles. Since clock pulses occur at known intervals,
More informationChapter 6. Flip-Flops and Simple Flip-Flop Applications
Chapter 6 Flip-Flops and Simple Flip-Flop Applications Basic bistable element It is a circuit having two stable conditions (states). It can be used to store binary symbols. J. C. Huang, 2004 Digital Logic
More informationLogic Design. Flip Flops, Registers and Counters
Logic Design Flip Flops, Registers and Counters Introduction Combinational circuits: value of each output depends only on the values of inputs Sequential Circuits: values of outputs depend on inputs and
More informationUniversal Asynchronous Receiver- Transmitter (UART)
Universal Asynchronous Receiver- Transmitter (UART) (UART) Block Diagram Four-Bit Bidirectional Shift Register Shift Register Counters Shift registers can form useful counters by recirculating a pattern
More informationChapter 6 Registers and Counters
EEA051 - Digital Logic 數位邏輯 Chapter 6 Registers and Counters 吳俊興國立高雄大學資訊工程學系 January 2006 Chapter 6 Registers and Counters 6-1 Registers 6-2 Shift Registers 6-3 Ripple Counters 6-4 Synchronous Counters
More informationLecture 12. Amirali Baniasadi
CENG 24 Digital Design Lecture 2 Amirali Baniasadi amirali@ece.uvic.ca This Lecture Chapter 6: Registers and Counters 2 Registers Sequential circuits are classified based in their function, e.g., registers.
More informationPart 4: Introduction to Sequential Logic. Basic Sequential structure. Positive-edge-triggered D flip-flop. Flip-flops classified by inputs
Part 4: Introduction to Sequential Logic Basic Sequential structure There are two kinds of components in a sequential circuit: () combinational blocks (2) storage elements Combinational blocks provide
More informationELE2120 Digital Circuits and Systems. Tutorial Note 8
ELE2120 Digital Circuits and Systems Tutorial Note 8 Outline 1. Register 2. Counters 3. Synchronous Counter 4. Asynchronous Counter 5. Sequential Circuit Design Overview 1. Register Applications: temporally
More information1. Convert the decimal number to binary, octal, and hexadecimal.
1. Convert the decimal number 435.64 to binary, octal, and hexadecimal. 2. Part A. Convert the circuit below into NAND gates. Insert or remove inverters as necessary. Part B. What is the propagation delay
More informationECE 331 Digital System Design
ECE 331 Digital System Design Counters (Lecture #20) The slides included herein were taken from the materials accompanying Fundamentals of Logic Design, 6 th Edition, by Roth and Kinney, and were used
More informationECE 301 Digital Electronics
ECE 301 Digital Electronics Counters (Lecture #20) The slides included herein were taken from the materials accompanying Fundamentals of Logic Design, 6 th Edition, by Roth and Kinney, and were used with
More informationRS flip-flop using NOR gate
RS flip-flop using NOR gate Triggering and triggering methods Triggering : Applying train of pulses, to set or reset the memory cell is known as Triggering. Triggering methods:- There are basically two
More informationSequential Digital Design. Laboratory Manual. Experiment #7. Counters
The Islamic University of Gaza Engineering Faculty Department of Computer Engineering Spring 2018 ECOM 2022 Khaleel I. Shaheen Sequential Digital Design Laboratory Manual Experiment #7 Counters Objectives
More informationVignana Bharathi Institute of Technology UNIT 4 DLD
DLD UNIT IV Synchronous Sequential Circuits, Latches, Flip-flops, analysis of clocked sequential circuits, Registers, Shift registers, Ripple counters, Synchronous counters, other counters. Asynchronous
More informationExperiment 8 Introduction to Latches and Flip-Flops and registers
Experiment 8 Introduction to Latches and Flip-Flops and registers Introduction: The logic circuits that have been used until now were combinational logic circuits since the output of the device depends
More informationASYNCHRONOUS COUNTER CIRCUITS
ASYNCHRONOUS COUNTER CIRCUITS Asynchronous counters do not have a common clock that controls all the Hipflop stages. The control clock is input into the first stage, or the LSB stage of the counter. The
More informationDIGITAL SYSTEM FUNDAMENTALS (ECE421) DIGITAL ELECTRONICS FUNDAMENTAL (ECE422) COUNTERS
COURSE / CODE DIGITAL SYSTEM FUNDAMENTALS (ECE421) DIGITAL ELECTRONICS FUNDAMENTAL (ECE422) COUNTERS One common requirement in digital circuits is counting, both forward and backward. Digital clocks and
More informationIntroduction. Serial In - Serial Out Shift Registers (SISO)
Introduction Shift registers are a type of sequential logic circuit, mainly for storage of digital data. They are a group of flip-flops connected in a chain so that the output from one flip-flop becomes
More informationFlip-Flops and Sequential Circuit Design
Flip-Flops and Sequential Circuit Design ECE 52 Summer 29 Reading ssignment Brown and Vranesic 7 Flip-Flops, Registers, Counters and a Simple Processor 7.5 T Flip-Flop 7.5. Configurable Flip-Flops 7.6
More informationModule -5 Sequential Logic Design
Module -5 Sequential Logic Design 5.1. Motivation: In digital circuit theory, sequential logic is a type of logic circuit whose output depends not only on the present value of its input signals but on
More informationRegisters and Counters
Registers and Counters Clocked sequential circuit = F/Fs and combinational gates Register Group of flip-flops (share a common clock and capable of storing one bit of information) Consist of a group of
More informationChapter 7 Counters and Registers
Chapter 7 Counters and Registers Chapter 7 Objectives Selected areas covered in this chapter: Operation & characteristics of synchronous and asynchronous counters. Analyzing and evaluating various types
More informationObjectives. Combinational logics Sequential logics Finite state machine Arithmetic circuits Datapath
Objectives Combinational logics Sequential logics Finite state machine Arithmetic circuits Datapath In the previous chapters we have studied how to develop a specification from a given application, and
More informationBachelor Level/ First Year/ Second Semester/ Science Full Marks: 60 Computer Science and Information Technology (CSc. 151) Pass Marks: 24
2065 Computer Science and Information Technology (CSc. 151) Pass Marks: 24 Time: 3 hours. Candidates are required to give their answers in their own words as for as practicable. Attempt any TWO questions:
More informationCHAPTER 6 COUNTERS & REGISTERS
CHAPTER 6 COUNTERS & REGISTERS 6.1 Asynchronous Counter 6.2 Synchronous Counter 6.3 State Machine 6.4 Basic Shift Register 6.5 Serial In/Serial Out Shift Register 6.6 Serial In/Parallel Out Shift Register
More informationLecture 8: Sequential Logic
Lecture 8: Sequential Logic Last lecture discussed how we can use digital electronics to do combinatorial logic we designed circuits that gave an immediate output when presented with a given set of inputs
More informationVTU NOTES QUESTION PAPERS NEWS RESULTS FORUMS Registers
Registers Registers are a very important digital building block. A data register is used to store binary information appearing at the output of an encoding matrix.shift registers are a type of sequential
More informationRS flip-flop using NOR gate
RS flip-flop using NOR gate Triggering and triggering methods Triggering : Applying train of pulses, to set or reset the memory cell is known as Triggering. Triggering methods:- There are basically two
More informationCOMP sequential logic 1 Jan. 25, 2016
OMP 273 5 - sequential logic 1 Jan. 25, 2016 Sequential ircuits All of the circuits that I have discussed up to now are combinational digital circuits. For these circuits, each output is a logical combination
More informationRegisters & Counters. Logic and Digital System Design - CS 303 Erkay Savaş Sabanci University
Registers & ounters Logic and igital System esign - S 33 Erkay Savaş Sabanci University Registers Registers like counters are clocked sequential circuits A register is a group of flip-flops Each flip-flop
More informationChapter 4. Logic Design
Chapter 4 Logic Design 4.1 Introduction. In previous Chapter we studied gates and combinational circuits, which made by gates (AND, OR, NOT etc.). That can be represented by circuit diagram, truth table
More informationMC9211 Computer Organization
MC9211 Computer Organization Unit 2 : Combinational and Sequential Circuits Lesson2 : Sequential Circuits (KSB) (MCA) (2009-12/ODD) (2009-10/1 A&B) Coverage Lesson2 Outlines the formal procedures for the
More informationLogic Design Viva Question Bank Compiled By Channveer Patil
Logic Design Viva Question Bank Compiled By Channveer Patil Title of the Practical: Verify the truth table of logic gates AND, OR, NOT, NAND and NOR gates/ Design Basic Gates Using NAND/NOR gates. Q.1
More informationRegisters and Counters
Registers and Counters ( 范倫達 ), Ph. D. Department of Computer Science National Chiao Tung University Taiwan, R.O.C. Fall, 2011 ldvan@cs.nctu.edu.tw http://www.cs.nctu.edu.tw/~ldvan/ Registers Shift Registers
More informationFinal Exam review: chapter 4 and 5. Supplement 3 and 4
Final Exam review: chapter 4 and 5. Supplement 3 and 4 1. A new type of synchronous flip-flop has the following characteristic table. Find the corresponding excitation table with don t cares used as much
More informationAdvanced Devices. Registers Counters Multiplexers Decoders Adders. CSC258 Lecture Slides Steve Engels, 2006 Slide 1 of 20
Advanced Devices Using a combination of gates and flip-flops, we can construct more sophisticated logical devices. These devices, while more complex, are still considered fundamental to basic logic design.
More informationSequential Logic Counters and Registers
Sequential Logic ounters and Registers ounters Introduction: ounters Asynchronous (Ripple) ounters Asynchronous ounters with MOD number < 2 n Asynchronous Down ounters ascading Asynchronous ounters svbitec.wordpress.com
More informationSEQUENTIAL LOGIC. Satish Chandra Assistant Professor Department of Physics P P N College, Kanpur
SEQUENTIAL LOGIC Satish Chandra Assistant Professor Department of Physics P P N College, Kanpur www.satish0402.weebly.com OSCILLATORS Oscillators is an amplifier which derives its input from output. Oscillators
More informationSri Vidya College of Engineering And Technology. Virudhunagar Department of Electrical and Electronics Engineering
Sri Vidya College of Engineering And Technology Virudhunagar 626 005 Department of Electrical and Electronics Engineering Year/ Semester/ Class : II/ III/ EEE Academic Year: 2017-2018 Subject Code/ Name:
More informationYEDITEPE UNIVERSITY DEPARTMENT OF COMPUTER ENGINEERING. EXPERIMENT VIII: FLIP-FLOPS, COUNTERS 2014 Fall
YEDITEPE UNIVERSITY DEPARTMENT OF COMPUTER ENGINEERING EXPERIMENT VIII: FLIP-FLOPS, COUNTERS 2014 Fall Objective: - Dealing with the operation of simple sequential devices. Learning invalid condition in
More informationChapter 3 Unit Combinational
EE 200: Digital Logic Circuit Design Dr Radwan E Abdel-Aal, COE Logic and Computer Design Fundamentals Chapter 3 Unit Combinational 5 Registers Logic and Design Counters Part Implementation Technology
More informationNH 67, Karur Trichy Highways, Puliyur C.F, Karur District UNIT-III SEQUENTIAL CIRCUITS
NH 67, Karur Trichy Highways, Puliyur C.F, 639 114 Karur District DEPARTMENT OF ELETRONICS AND COMMUNICATION ENGINEERING COURSE NOTES SUBJECT: DIGITAL ELECTRONICS CLASS: II YEAR ECE SUBJECT CODE: EC2203
More informationUNIT IV. Sequential circuit
UNIT IV Sequential circuit Introduction In the previous session, we said that the output of a combinational circuit depends solely upon the input. The implication is that combinational circuits have no
More informationDigital Logic Design ENEE x. Lecture 19
Digital Logic Design ENEE 244-010x Lecture 19 Announcements Homework 8 due on Monday, 11/23. Agenda Last time: Timing Considerations (6.3) Master-Slave Flip-Flops (6.4) This time: Edge-Triggered Flip-Flops
More informationUnit-5 Sequential Circuits - 1
Unit-5 Sequential Circuits - 1 1. With the help of block diagram, explain the working of a JK Master-Slave flip flop. 2. Differentiate between combinational circuit and sequential circuit. 3. Explain Schmitt
More informationCHAPTER 4: Logic Circuits
CHAPTER 4: Logic Circuits II. Sequential Circuits Combinational circuits o The outputs depend only on the current input values o It uses only logic gates, decoders, multiplexers, ALUs Sequential circuits
More informationIntroduction to Microprocessor & Digital Logic
ME262 Introduction to Microprocessor & Digital Logic (Sequential Logic) Summer 2 Sequential Logic Definition The output(s) of a sequential circuit depends d on the current and past states of the inputs,
More informationDr. Shahram Shirani COE2DI4 Midterm Test #2 Nov 19, 2008
Page 1 Dr. Shahram Shirani COE2DI4 Midterm Test #2 Nov 19, 2008 Instructions: This examination paper includes 13 pages and 20 multiple-choice questions starting on page 3. You are responsible for ensuring
More informationCHAPTER 4: Logic Circuits
CHAPTER 4: Logic Circuits II. Sequential Circuits Combinational circuits o The outputs depend only on the current input values o It uses only logic gates, decoders, multiplexers, ALUs Sequential circuits
More informationChapter 9: Shift Registers
樹德科技大學資訊工程系 hapter 9: Shift Registers Shi-Huang hen Fall 2010 1 Outline Basic Shift Register Functions Serial In/Serial Out Shift Registers Serial In/Parallel Out Shift Registers Parallel In/Serial Out
More informationEET2411 DIGITAL ELECTRONICS
5-8 Clocked D Flip-FlopFlop One data input. The output changes to the value of the input at either the positive going or negative going clock trigger. May be implemented with a J-K FF by tying the J input
More informationUNIT-3: SEQUENTIAL LOGIC CIRCUITS
UNIT-3: SEQUENTIAL LOGIC CIRCUITS STRUCTURE 3. Objectives 3. Introduction 3.2 Sequential Logic Circuits 3.2. NAND Latch 3.2.2 RS Flip-Flop 3.2.3 D Flip-Flop 3.2.4 JK Flip-Flop 3.2.5 Edge Triggered RS Flip-Flop
More informationFlip Flop. S-R Flip Flop. Sequential Circuits. Block diagram. Prepared by:- Anwar Bari
Sequential Circuits The combinational circuit does not use any memory. Hence the previous state of input does not have any effect on the present state of the circuit. But sequential circuit has memory
More informationIT T35 Digital system desigm y - ii /s - iii
UNIT - III Sequential Logic I Sequential circuits: latches flip flops analysis of clocked sequential circuits state reduction and assignments Registers and Counters: Registers shift registers ripple counters
More information(CSC-3501) Lecture 7 (07 Feb 2008) Seung-Jong Park (Jay) CSC S.J. Park. Announcement
Seung-Jong Park (Jay) http://www.csc.lsu.edu/~sjpark Computer Architecture (CSC-3501) Lecture 7 (07 Feb 2008) 1 Announcement 2 1 Combinational vs. Sequential Logic Combinational Logic Memoryless Outputs
More informationRegisters and Counters
Registers and Counters ( 范倫達 ), Ph. D. Department of Computer Science National Chiao Tung University Taiwan, R.O.C. Fall, 2017 ldvan@cs.nctu.edu.tw http://www.cs.nctu.edu.tw/~ldvan/ Registers Shift Registers
More informationCHAPTER 4 RESULTS & DISCUSSION
CHAPTER 4 RESULTS & DISCUSSION 3.2 Introduction This project aims to prove that Modified Baugh-Wooley Two s Complement Signed Multiplier is one of the high speed multipliers. The schematic of the multiplier
More informationDigital Logic Design Sequential Circuits. Dr. Basem ElHalawany
Digital Logic Design Sequential Circuits Dr. Basem ElHalawany Combinational vs Sequential inputs X Combinational Circuits outputs Z A combinational circuit: At any time, outputs depends only on inputs
More informationLogic and Computer Design Fundamentals. Chapter 7. Registers and Counters
Logic and Computer Design Fundamentals Chapter 7 Registers and Counters Registers Register a collection of binary storage elements In theory, a register is sequential logic which can be defined by a state
More informationMultiplexor (aka MUX) An example, yet VERY useful circuit!
Multiplexor (aka MUX) An example, yet VERY useful circuit! A B 0 1 Y S A B Y 0 0 x 0 0 1 x 1 1 x 0 0 1 x 1 1 S=1 S=0 Y = (S)? B:A; Y=S A+SB when S = 0: output A 1: output B 56 A 32-bit MUX Use 32 1-bit
More informationUNIVERSITI TEKNOLOGI MALAYSIA
SULIT Faculty of Computing UNIVERSITI TEKNOLOGI MALAYSIA FINAL EXAMINATION SEMESTER I, 2016 / 2017 SUBJECT CODE : SUBJECT NAME : SECTION : TIME : DATE/DAY : VENUES : INSTRUCTIONS : Answer all questions
More informationCOE 202: Digital Logic Design Sequential Circuits Part 1. Dr. Ahmad Almulhem ahmadsm AT kfupm Phone: Office:
COE 202: Digital Logic Design Sequential Circuits Part 1 Dr. Ahmad Almulhem Email: ahmadsm AT kfupm Phone: 860-7554 Office: 22-324 Objectives Sequential Circuits Memory Elements Latches Flip-Flops Combinational
More informationLogic Design II (17.342) Spring Lecture Outline
Logic Design II (17.342) Spring 2012 Lecture Outline Class # 05 February 23, 2012 Dohn Bowden 1 Today s Lecture Analysis of Clocked Sequential Circuits Chapter 13 2 Course Admin 3 Administrative Admin
More informationName Of The Experiment: Sequential circuit design Latch, Flip-flop and Registers
EEE 304 Experiment No. 07 Name Of The Experiment: Sequential circuit design Latch, Flip-flop and Registers Important: Submit your Prelab at the beginning of the lab. Prelab 1: Construct a S-R Latch and
More informationSequential Logic and Clocked Circuits
Sequential Logic and Clocked Circuits Clock or Timing Device Input Variables State or Memory Element Combinational Logic Elements From combinational logic, we move on to sequential logic. Sequential logic
More informationECE 301 Digital Electronics
ECE 301 Digital Electronics Derivation of Flip-Flop Input Equations and State Assignment (Lecture #24) The slides included herein were taken from the materials accompanying Fundamentals of Logic Design,
More informationScanned by CamScanner
NAVEEN RAJA VELCHURI DSD & Digital IC Applications Example: 2-bit asynchronous up counter: The 2-bit Asynchronous counter requires two flip-flops. Both flip-flop inputs are connected to logic 1, and initially
More informationLSN 12 Shift Registers
LSN 12 Shift Registers Department of Engineering Technology LSN 12 Shift Registers Digital circuits with data storage and data movement functions Storage capacity is the total number of bits of digital
More informationLecture 11: Synchronous Sequential Logic
Lecture 11: Synchronous Sequential Logic Syed M. Mahmud, Ph.D ECE Department Wayne State University Aby K George, ECE Department, Wayne State University Contents Characteristic equations Analysis of clocked
More informationDesign and Simulation of a Digital CMOS Synchronous 4-bit Up-Counter with Set and Reset
Design and Simulation of a Digital CMOS Synchronous 4-bit Up-Counter with Set and Reset Course Number: ECE 533 Spring 2013 University of Tennessee Knoxville Instructor: Dr. Syed Kamrul Islam Prepared by
More informationCombinational vs Sequential
Combinational vs Sequential inputs X Combinational Circuits outputs Z A combinational circuit: At any time, outputs depends only on inputs Changing inputs changes outputs No regard for previous inputs
More informationSequential Logic. Analysis and Synthesis. Joseph Cavahagh Santa Clara University. r & Francis. TaylonSi Francis Group. , Boca.Raton London New York \
Sequential Logic Analysis and Synthesis Joseph Cavahagh Santa Clara University r & Francis TaylonSi Francis Group, Boca.Raton London New York \ CRC is an imprint of the Taylor & Francis Group, an informa
More informationExperiment # 9. Clock generator circuits & Counters. Digital Design LAB
Digital Design LAB Islamic University Gaza Engineering Faculty Department of Computer Engineering Fall 2012 ECOM 2112: Digital Design LAB Eng: Ahmed M. Ayash Experiment # 9 Clock generator circuits & Counters
More information(Refer Slide Time: 2:03)
(Refer Slide Time: 2:03) Digital Circuits and Systems Prof. S. Srinivasan Department of Electrical Engineering Indian Institute of Technology, Madras Lecture # 22 Application of Shift Registers Today we
More informationCHAPTER1: Digital Logic Circuits
CS224: Computer Organization S.KHABET CHAPTER1: Digital Logic Circuits 1 Sequential Circuits Introduction Composed of a combinational circuit to which the memory elements are connected to form a feedback
More informationCHW 261: Logic Design
HW 261: Logic Design Instructors: Prof. Hala Zayed Dr. Ahmed Shalaby http://www.bu.edu.eg/staff/halazayed14 http://bu.edu.eg/staff/ahmedshalaby14# Slide 1 Digital Fundamentals HAPTER Shift Registers Slide
More informationSequential Logic Notes
Sequential Logic Notes Andrew H. Fagg igital logic circuits composed of components such as AN, OR and NOT gates and that do not contain loops are what we refer to as stateless. In other words, the output
More informationFlip-Flops and Related Devices. Wen-Hung Liao, Ph.D. 4/11/2001
Flip-Flops and Related Devices Wen-Hung Liao, Ph.D. 4/11/2001 Objectives Recognize the various IEEE/ANSI flip-flop symbols. Use state transition diagrams to describe counter operation. Use flip-flops in
More informationContents Circuits... 1
Contents Circuits... 1 Categories of Circuits... 1 Description of the operations of circuits... 2 Classification of Combinational Logic... 2 1. Adder... 3 2. Decoder:... 3 Memory Address Decoder... 5 Encoder...
More informationChapter Contents. Appendix A: Digital Logic. Some Definitions
A- Appendix A - Digital Logic A-2 Appendix A - Digital Logic Chapter Contents Principles of Computer Architecture Miles Murdocca and Vincent Heuring Appendix A: Digital Logic A. Introduction A.2 Combinational
More informationPrinciples of Computer Architecture. Appendix A: Digital Logic
A-1 Appendix A - Digital Logic Principles of Computer Architecture Miles Murdocca and Vincent Heuring Appendix A: Digital Logic A-2 Appendix A - Digital Logic Chapter Contents A.1 Introduction A.2 Combinational
More informationSequential Circuit Design: Principle
Sequential Circuit Design: Principle modified by L.Aamodt 1 Outline 1. 2. 3. 4. 5. 6. 7. 8. Overview on sequential circuits Synchronous circuits Danger of synthesizing asynchronous circuit Inference of
More informationENGG 1203 Tutorial. D Flip Flop. D Flip Flop. Q changes when CLK is in Rising edge PGT NGT
ENGG 1203 Tutorial D Flip Flop Sequential Logic 14/21 Feb Learning Objectives Design circuits with Flip Flop Design a finite state machine News Feb 27, 2014, 11:55pm Ack.: HKU ELEC1008, ISU CprE 281x,
More informationFlip-Flops. Because of this the state of the latch may keep changing in circuits with feedback as long as the clock pulse remains active.
Flip-Flops Objectives The objectives of this lesson are to study: 1. Latches versus Flip-Flops 2. Master-Slave Flip-Flops 3. Timing Analysis of Master-Slave Flip-Flops 4. Different Types of Master-Slave
More informationDIGITAL TECHNICS. Dr. Bálint Pődör. Óbuda University, Microelectronics and Technology Institute
DIGITAL TECHNICS Dr. Bálint Pődör Óbuda University, Microelectronics and Technology Institute 7. LECTURE: REGISTERS, COUNTERS AND SERIAL ARITHMETIC CIRCUITS st (Autumn) term 208/209 7. LECTURE: REGISTERS,
More informationLong and Fast Up/Down Counters Pushpinder Kaur CHOUHAN 6 th Jan, 2003
1 Introduction Long and Fast Up/Down Counters Pushpinder Kaur CHOUHAN 6 th Jan, 2003 Circuits for counting both forward and backward events are frequently used in computers and other digital systems. Digital
More informationMODEL QUESTIONS WITH ANSWERS THIRD SEMESTER B.TECH DEGREE EXAMINATION DECEMBER CS 203: Switching Theory and Logic Design. Time: 3 Hrs Marks: 100
MODEL QUESTIONS WITH ANSWERS THIRD SEMESTER B.TECH DEGREE EXAMINATION DECEMBER 2016 CS 203: Switching Theory and Logic Design Time: 3 Hrs Marks: 100 PART A ( Answer All Questions Each carries 3 Marks )
More informationDelta-Sigma ADC
http://www.allaboutcircuits.com/vol_4/chpt_13/9.html Delta-Sigma ADC One of the more advanced ADC technologies is the so-called delta-sigma, or Σ (using the proper Greek letter notation). In mathematics
More information1. a) For the circuit shown in figure 1.1, draw a truth table showing the output Q for all combinations of inputs A, B and C. [4] Figure 1.
[Question 1 is compulsory] 1. a) For the circuit shown in figure 1.1, draw a truth table showing the output Q for all combinations of inputs A, B and C. Figure 1.1 b) Minimize the following Boolean functions:
More informationFind the equivalent decimal value for the given value Other number system to decimal ( Sample)
VELAMMAL COLLEGE OF ENGINEERING AND TECHNOLOGY, MADURAI 65 009 Department of Information Technology Model Exam-II-Question bank PART A (Answer for all Questions) (8 X = 6) K CO Marks Find the equivalent
More informationINC 253 Digital and electronics laboratory I
INC 253 Digital and electronics laboratory I Laboratory 9 Sequential Circuit Author: ID Co-Authors: 1. ID 2. ID 3. ID Experiment Date: Report received Date: Comments For Instructor Full Marks Pre lab 10
More informationCS T34-DIGITAL SYSTEM DESIGN Y2/S3
UNIT III Sequential Logic: Latches versus Flip Flops SR, D, JK, Master Slave Flip Flops Excitation table Conversion of Flip flops Counters: Asynchronous, synchronous, decade, presettable Shift Registers:
More informationComputer Architecture and Organization
A-1 Appendix A - Digital Logic Computer Architecture and Organization Miles Murdocca and Vincent Heuring Appendix A Digital Logic A-2 Appendix A - Digital Logic Chapter Contents A.1 Introduction A.2 Combinational
More informationWINTER 15 EXAMINATION Model Answer
Important Instructions to examiners: 1) The answers should be examined by key words and not as word-to-word as given in the model answer scheme. 2) The model answer and the answer written by candidate
More informationSwitching Theory And Logic Design UNIT-IV SEQUENTIAL LOGIC CIRCUITS
Switching Theory And Logic Design UNIT-IV SEQUENTIAL LOGIC CIRCUITS Sequential circuits Classification of sequential circuits: Sequential circuits may be classified as two types. 1. Synchronous sequential
More information