Synchronization Issues During Encoder / Decoder Tests

Transcription

1 OmniTek PQA Application Note: Synchronization Issues During Encoder / Decoder Tests Revision OmniTek Advanced Measurement Technology

2 1 INTRODUCTION The OmniTek PQA system is very well suited to performing real-time picture quality tests on compression encoders and decoders. The PQA can quickly display any changes to the various quality metrics when the encoded bit-rate is changed, allowing broadcasters and transmission engineers to optimize their system parameters or chose between equipment from different manufacturers. When setting up a test system to perform reliable, repeatable picture quality measurements, it is important to understand some of the timing and synchronization issues involved. This Application Note highlights some of the potential pitfalls and recommends suitable connection topologies. 2 THE PROBLEM Consider the generalized encoder / decoder system block diagram shown in Figure 1. Figure 1: Typical Encoder / Decoder Arrangement With most broadcast-quality compression encoder systems (for example MPEG-2, MPEG-4, JPEG 2000), the input to the encoder is an SDI (or HD-SDI) signal. The compressed data output from the encoder emerges as an ASI stream, or perhaps an asynchronous network connection in IPTV applications, or an ATM network port. In the decoder unit, this compressed stream is then converted back to the SDI domain. In order to maintain a synchronous video link with no dropped or repeated frames, the SDI output from the decoder must be co-timed (within tight tolerances) to the encoder SDI input. How is this achieved, given that (a) the encoder and decoder may be physically located many miles apart, and (b) the compressed data interface between encoder and decoder is asynchronous to the video? The answer is that video timing information packets are embedded inside the compressed data stream, to enable the decoder to accurately reconstruct the video timing. In the case of regular MPEG-2 / MPEG-4 transport streams, these packets are called Program Clock Reference or PCR data, and are usually transmitted around 10 ~ 30 times per second. The PCR data is in the form of a 42-bit counter value, based on a reference 27MHz clock inside the encoder unit which is locked to the incoming SDI stream. The bottom 9 bits of the counter run from 0 ~ 299 and then roll over, at which time the value of the top 33-bit count is incremented. This means that the top 33-bit counter is operating at a nominal 90kHz count rate, called the base rate. 2

3 The decoder receives the PCR data and uses the count values to synchronize an internal 27MHz clock (usually implemented in a voltage-controlled oscillator / phase-locked loop circuit). The output SDI timing is then derived from this 27MHz reconstructed clock. See figure 2. Figure 2: Simplified decoder clock recovery circuit This PCR process has some inherent limitations, which give rise to errors in the recovered clock accuracy, increased jitter, and low-frequency drifting or wander. There is a lot of freely-available technical literature on the analysis of PCR jitter (see references), but a detailed description is outside the scope of this Application Note. The most important point to understand is that: The SDI output from the decoder may have a considerable amount of jitter or wander, compared to the original encoder SDI input. Figure 3 contains a graph of end-to-end SDI propagation delay measurements through a typical broadcast MPEG-2 encoder / decoder system. The graph shows how the total delay through the system drifts over a 17-hour period, due to the accumulated PCR inaccuracies. Note there seem to be two separate wander frequencies at work here: (a) the relatively high frequency oscillation of +/-5 µs, which corresponds to the 90kHz PCR base timing jitter; and (b) the extremely low frequency drift, which may be due to temperature susceptibility of the generator or decoder VCO circuit. Figure 3: Propagation delay through a typical MPEG-2 encoder / decoder 3

4 To help reduce output jitter & wander, and to maintain a controlled video processing latency, many manufacturers provide an optional frame synchronizer function on the SDI output from the broadcast decoder unit. When the decoder is supplied with a reference sync source, the SDI output is stabilized and re-timed to this sync input. 3 USING THE OmniTek PQA To perform measurements with real-time encoder & decoder systems, the OmniTek PQA can be used either in Internal / External mode (see figure 3) or External / External mode (figure 4). It is important to know that the PQA does not contain internal frame synchronizers on the SDI inputs; the processing electronics requires that the reference and test sources are co-timed (with each other, and also with the PQA internal clock). It doesn t matter if there is a fixed H or V offset between the inputs, so long as they are co-timed. If the sources are not synchronous, then the PQA will detect TRS or CRC errors on the inputs and the quality measurements will not be reliable. Figure 4: Using the PQA in Internal / External mode 4

5 Figure 5: Using the PQA in External / External mode The two SDI inputs of the PQA do actually contain small asynchronous FIFO buffers, to allow for a little jitter or wander between the inputs (and with respect to the PQA internal clock). The size of these FIFO buffers has been considerably increased in the latest software release: Version and earlier: +/- 200ns (HD), +/- 600ns (SD) Version : +/- 13 µs (HD), +/- 37µs (SD) When making measurements with the PQA, it is important to be aware of the magnitude of any timing wander expected between the input sources. The graph in Figure 3 shows that quite a wide timing range can be expected from certain encoder/decoder systems. Note that it sometimes takes several minutes for the encoder/decoder timing to stabilize after changing the input source or after adjusting any of the encoder parameters. If the propagation delay wander is likely to be larger than the time periods quoted above, then it will be necessary to employ an external frame synchronizer unit to re-align the signals and prevent any input buffer over/underflows leading to data errors. The frame synchronizer may actually be built into the decoder itself, as mentioned earlier. When using a frame synchronizer, the recommended system configuration is shown in Figure 6. Be aware, however, that this is not a perfect solution to the wander issue; the frame sync will simply drop or repeat frames in order to maintain output timing, which may cause further problems because the temporal frame alignment between the two video sources will then be incorrect. It may be necessary to make repeated adjustments to the PQA delay compensation buffer, depending on how often the frames are dropped or repeated. Use the picture difference display to make sure the images are aligned at all times. 5

6 Figure 6: Using a decoder with built-in output frame synchronizer 4 SUMMARY When performing picture quality measurements using real-time encoder/decoder combinations, it is important to understand the timing relationship between the encoder SDI input and the decoder SDI output. These must be co-timed, within a narrow time range. The latest software release for the OmniTek PQA, version , contains improved SDI input buffers which provide for a much larger timing window between these inputs, so all PQA customers are advised to upgrade to this release when convenient. If the timing window is still insufficient to cope with the drift in propagation delay through the encoder/decoder, then the use of an external frame synchronizer on the decoder output is recommended. For more information on this subject or any other questions regarding the PQA, please contact your local OmniTek dealer or the head office in Basingstoke. 6

7 5 REFERENCES OmniTek PQA User Manual v2.2 OmniTek PQA Application Guide v2.2 ISO/IEC , , : Information Technology Generic coding of moving pictures and associated audio information ETSI Technical Report TR : Measurement guidelines for DVB systems Tektronix 25W_14617_1: PCR Measurements Primer 7