CODE GENERATION FOR WIDEBAND CDMA

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1 ST JOURAL OF SYSTEM RESEARCH - VOL1 - UMBER 1 CODE GEERATIO FOR WIDEBAD CDMA Daiele Lo Iacoo Ettore Messia Giuseppe Avelloe Agostio Galluzzo Fracesco Pappalardo STMicroelectroics This paper presets a overview of codes used i CDMA systems It briefly reviews theoretical aspects of pseudo-oise sequeces as well as orthogoal spreadig codes for CDMA cellular systems focusig o both scramblig ad chaelizatio code geeratio suitable for 3GPP FDD UMTS For each code geerator we poit out architectural aspects as well as implemetatio issues 1 ITRODUCTIO Code Divisio Multiple Access (CDMA) systems offer high spectrum efficiecy thas to their capability to allocate all available badwidth to each user Spreadig is accomplished by multiplyig the iformatio symbols with a high rate pseudo-radom sequece (so called pseudo-oise P) ow to the receiver The resultig sigal is widebad ad ca be demodulated agai by multiplyig it with a sychroized replica of the P sequece used by the trasmitter Spreadig codes have good correlatio properties so that each spread spectrum sigal is ucorrelated with every other sigal sharig the same badwidth The P sequece is private to each user thus allowig badwidth sharig without ay loss of iformatio CDMA systems shall be capable of hadlig differet users gratig differet services with variable bit rate to each user For this purpose orthogoal codes ca be used to allow chaelizatio of differet users ad differet data rate services The 3GPP (3rd Geeratio Partership Proect) stadard defies for both FDD (Frequecy Domai Duplex) ad TDD (Time Domai Duplex) modes the spreadig of a user data stream via OVSF (Orthogoal Variable Spreadig Factor) codes as chaelizatio code ad Gold/Kasami P sequeces as scramblig code The first oe is used for users/services separatio while the secod oe is eeded to distiguish data from 70 COPYRIGHT STMICROELECTROICS 003

2 ST JOURAL OF SYSTEM RESEARCH - VOL1 - UMBER 1 differet BTS (Base Trasceiver Statio) or MS (Mobile Statio) The 3GPP stadard defies the same OVSF code set for both modes (eve if with a differet maximum spreadig factor) Log ad short scramblig code geerators are defied oly for FDD mode [5] while TDD mode uses oly very short codes [9] Our paper proposes several architectures for FDD mode scramblig ad chaelizatio code geerators focusig o schemes suitable for mobile termials This paper is orgaized as follows: the ext sectio presets a brief review of the theoretical aspects of the P sequeces Scramblig code geerators will be itroduced i Sectio 3 while chaelizatio code geerators will be treated i Sectio 4 Coclusios are provided i 5 PSEUDO-OISE SEQUECES 1 Liear Feedbac Shift Registers A pseudo-oise code sequece ca be geerated by meas of the Galois Liear Feedbac Shift Register (LFSR) as show i Fig 1 From ow o additios shall be iteded as modulo- which correspods to a XOR gate while 1-bit multiplicatios are ormally implemeted as a AD gate A -stage LFSR ca geerate periodic sequeces with period -1 Each sequece depeds o the feedbac taps (coefficiets c ) as well as o the LFSR iitial state (vector a ) c c -1 c c1 a -1 a - a1 a0 FIGURE 1: GALOIS LFSR Output sequece ca be expressed as a polyomial: b It has bee show that code sequece ca be calculated by performig the polyomial log divisio over the Galois field GF() b G ( D) = a a G0 ( D) D K =0 = cd ( ) 1+ c D K where a G0 (D) is a polyomial depedig oly o the iitial LSFR state vector while c(d) is the geerator polyomial over GF() depedig oly o the feedbac coefficiets c [1] It has bee prove that each polyomial c(d) associated to a polyomial b(d) of legth must divide 1+D [1] A polyomial c(d) of degree is said to be primitive if the smallest iteger for which c(d) divides 1+D is = -1 Primitive polyomials are irreducible so they caot be factored [1] Maximal legth sequeces Sice a -stage LFSR has a total of = -1 states a primitive polyomial leads the geerator cycle through all possible states allowig the geeratio of a uique sequece called Maximal- Legth Sequece (MLS) or m-sequece Thus if c(d) is a primitive polyomial each differet a G0 (D) polyomial results i a differet phase of the same m-sequece A iterestig property of the Galois LFSR is that it cycles through the elemets of GF( ) i reverse order This meas that if a G0 (D)=D i is represeted as a power of D the cotets of the LFSR at time correspods to a G (D)=D i- after cycles (where D - = D - ) Give a G0 (D) iitial coditios a G (D) that yield a -uits advaced sequece ca be foud by evaluatig the modulo-c(d) product over the Galois extesio field GF ( ) [1]: 1 =1 () bd ( )= b D =0 (1) a G ( D) = D a G 0 ( D) cd ( ) (3) where D is the delay operator correspodig to oe LFSR cloc cycle that is evaluatig the remaider whe dividig by D - a G0 (D) by c(d): CODE GEERATIO FOR WIDEBAD CDMA 71

3 ST JOURAL OF SYSTEM RESEARCH - VOL1 - UMBER 1 a G ( D) = D a G 0 ( D) cd ( ) (4) It ca be prove that m-sequeces b F (D) ad b G (D) have the same phase oly if the followig is verified [1]: Assumig c = 1 ad cosiderig that polyomial c(d) divides 1+D it is possible to retrieve the followig equatio: D = 1 + c D Evaluatig equatio (3) correspods to the reductio of the order of the polyomial multiplicatio D - a G0 (D) by recursively applyig the equatio (5) util the order of the correspodig polyomial becomes less the Similarly iitial coditios a G (D) for a -uit delayed sequece ca be foud by: 1 =1 ( D) = D a G 0 ( D) c D a G ( ) (5) (6) a G 0 ( D) = a F0 ( D) cd ( ) Equatio (8) ca be carried out performig the polyomial multiplicatio a F0 (D) c(d) ad the equatig resultig coefficiets havig degree less tha Apart from havig the maximum possible period over -stages (= -1) m-sequeces satisfy a iterestig property (shiftad-add): modulo- sum of a m-sequece ad ay phase shift of the same m-sequece yields aother phase of the same m- sequece As a direct cosequece ay time-shifted replica of a give m-sequece ca be geerated by proper modulo- addig a certai umber of itermediate taps of the Fiboacci LFSR as show i Fig 3 (8) Give a primitive polyomial c(d) its uique m-sequece ca also be geerated by meas of a Fiboacci LFSR (Fig ) a c 1 a -1 c a - c -1 c a1 a0 b c 1 c c -1 c a -1 a - a1 a0 FIGURE : FIBOACCI LFSR Code sequece ca be calculated by: b a' 0 a' 1 a' a' -1 FIGURE 3: TIME-SHIFTED REPLICA OF A M-SEQUECE Time-shifted output b (D) is: 1 b' b ( D) = a a ( D) (9) = 0 b F 1 ( D) = a ( D) a D K F0 = 0 = cd ( ) 1 + c D K =1 (7) The polyomial taps selector a (D) that yields a -uit advaced sequece ca be evaluated usig the followig: a ( D) = D D c D = ( ) D c( D) (10) The Fiboacci geerator is well suited for m-sequece geeratio but as a drawbac is slower tha the Galois LFSR because of a series of adders i the feedbac path Give that c(d) has degree for a advace of < polyomial a (D) ca be writte as: a ( D) = D (11) 7 COPYRIGHT STMICROELECTROICS 003

4 ST JOURAL OF SYSTEM RESEARCH - VOL1 - UMBER 1 This ca easily be see i Fig 3 ad correspods to the selectio of the -th itermediate tap of the Fiboacci LFSR Equatio (10) ca be solved usig equatio (8) which correspods to ruig a Galois LFSR loaded with a G0 (D)=D for cycles ad usig state a G (D) at time as polyomial tap selector Similarly for a -uit delayed sequece: a which agai correspods to solvig (6) with a G0 (D)=D or ruig a Galois LFSR ad usig state a" G (D) at time - as polyomial tap selector M-sequeces have a two-valued autocorrelatio fuctio: It has to be oted that autocorrelatio (13) is evaluated over a etire period Whe performed over a fractio of period correlatio lacs orthogoality [1][3][4] Cross-correlatio betwee two m-sequeces may exhibit large values as show by the Welch lower boud for a set of K sequeces of legth [3]: Composite codes such as the Gold ad Kasami codes have better performace i terms of cross-correlatio as we will explai i the followig paragraphs 3 Gold Codes Startig from a m-sequece b(d) of period sequece b (D) obtaied by samplig b(d) every q uits is called decimatio of b(d) by a factor of q If the greatest commo divisor gcd(q) is equal to oe it has bee demostrated that b (D) has period as well [4] The couple b(d) b (D) is called preferred pair if: ( D) = D D cd = ( ) D+ c( D) R ( ) = = 0 1 others R ( ) K 1 K 1 (1) (13) (14) A set of Gold sequeces is composed of the preferred pair b(d) b (D) ad all the sequeces give by modulo- sum of b(d) ad ay phase shift of b (D) that is b(d) D b (D) with [0-1] Ay pair of codes i the set has a three-valued cross-correlatio: where t()=1+ The auto-correlatio of a Gold sequece has the same value as well 4 Kasami sequeces q = +1 or +1 ; ad gcd( )= 1 odd eve R ( ) 1 t ( ) t ( ) + Kasami sequeces ca be obtaied i the same fashio as Gold sequeces The small set of Kasami sequeces is made by costructig a decimated sequece b (D) with q= / +1 havig period q- The small Kasami set is composed of b(d) b (D) ad all the b(d) D b (D) sequeces with [0q-] The correlatio is three-valued: The large set of Kasami sequeces cotais sequeces tae from a Gold set ad the small Kasami set itself It is made by costructig two decimated sequeces b (D) ad b (D) respectively usig q = / +1 ad q = /+1 +1 as decimatio factors The set is defied by b(d) b (D) b (D) ad all the sequeces b(d) D b (D) D h b (D) where both h [0-1] The correlatio is five-valued: { } { } R ( ) 1 1 ± / (15) (16) R ( ) { 1 1 ± / 1 ± / +1 } (17) CODE GEERATIO FOR WIDEBAD CDMA 73

5 ST JOURAL OF SYSTEM RESEARCH - VOL1 - UMBER 1 3 SCRAMBLIG CODE GEERATIO 31 Upli scramblig code Two types of scramblig codes (short ad log) ca be used i upli (UL) Both are formed by the followig: X LFSR X b b' S = I [ C 0 + C 1 Q ] (18) Y LFSR y where C 0 ad C 1 are repetitio of the OVSF code described i paragraph 4 I is a real chip rate code ad Q is a decimated versio (by a factor of ) of the real chip rate code Q These codes have bee desiged to maitai a proper phase rotatio betwee the i phase ad quadrature compoets i order to limit the trasitio of the basebad sigal which will be processed by the shapig filter This reduces the pea to average power ratio at the output of the shapig filter thus allowig for a more efficiet power amplifier implemetatio 3 Upli log scramblig code The UL log scramblig code is a pair of Gold codes each shorteed to the UMTS radio frame legth (38400 chips) Code geeratio is performed by meas of two -stage (=5) Fiboacci LFSRs (X ad Y) each geeratig a biary m- sequece of period = -1 The primitive polyomials over GF() are: c X c Y ( D) =1 + D 3 + D 5 ( D) =1 + D + D + D 3 + D 5 The state iitializatio polyomials are: a X0 a Y 0 3 ( D) = i D i + D 4 i = 0 5 ( D) = D i i = 0 (19) (0) where the coefficiets i are the biary represetatio over -1 bits of code umber FIGURE 4: UPLIK LOG SCRAMBLIG CODE GEERATOR Output biary code b (i)=x (i) y(i) shall be mapped accordig to Table 31: b K (i) B K (i) TABLE 31 Sequece b (i) is obtaied advacig b (i) of τ= uits A advace of the b (i) sequece is obtaied usig the shiftad-add property ad retrievig the polyomial taps selector as i (10) I-brach is give by I (i)=b (i) while Q-brach is Q (i)=b (i)=b (i+τ) The UL log scramblig code ca the be formed as i (18): S ()= i I ()+ i 1 ( ) i I () i Q ( m) i where m= Implemetatio (Fig 4) is direct sice each code umber correspods to the state vector that has to be loaded ito X LFSR to obtai the specific code: a X ( D) = i D i 33 Upli short scramblig code The UL short scramblig code set is a very large Kasami set shorteed to 56 chips It ca be used o system request to support low-complexity multi-user detectio Code geeratio is performed by meas of three -stage i=1 (1) () 74 COPYRIGHT STMICROELECTROICS 003

6 ST JOURAL OF SYSTEM RESEARCH - VOL1 - UMBER 1 LFSRs (=8) correspodig to the polyomials: c X c Y c Z ( D) =1 + D + D + 3D 3 + D 5 + D 8 ( D) =1 + D + D 5 + D 7 + D 8 ( D) = 1+ D 4 + D 5 + D 7 + D 8 (3) Z LFSR b The state iitializatio polyomials are: a X0 a Y 0 a Z 0 ( D) = ( 0 +1)+ i D i 7 ( D) = + i D i i = 0 7 ( D) = +i D i i= 0 7 i =1 (4) Y LFSR X LFSR mod 4 mod 4 where the coefficiets i are the biary represetatio over 3 bits of code umber Its output ca be writte as: b ()= i x ()+ i yi ()+ zi () 4 Table 3 maps I ad Q compoets b K (i) I K (i) Q K (i) TABLE 3 The UL short scramblig code is give by: S ()= i I ( h) + 1 ( ) i I ( h) Q ( m) h where h = i ad m= Its implemetatio is show i Fig 5 It has to be oted that because X LFSR is a four-valued LFSR additios shall be carried out modulo-4 Give that i =1 c i x i 4 = c i x i 4 i =1 4 (5) (6) (7) FIGURE 5: UPLIK SHORT SCRAMBLIG CODE GEERATOR multiplicatios ca be performed modulo-4 as well This leads to a simplificatio such that multiplicatio by is a left shift while multiplicatio by 3 ca be performed as i Fig 6 x i 3 34 Dowli scramblig code FIGURE 6: MODULO-4 3X MULTIPLIER { x i } The dowli (DL) scramblig code is a Gold code shorteed to the UMTS radio frame legth (38400 chips) It cosists of a subset of all the possible Gold sequeces that ca be geerated usig two -stage (=18) Fiboacci LFSRs [5] Scramblig codes are divided ito 51 sets each cosistig of a Primary Scramblig Code (PSC) ad 15 Secodary Scramblig Codes (SSCs) PSCs are defied by scramblig codes 16 p where p [0511] while all the SSCs withi the p-th PSC set cosist of scramblig codes 16p+s where s [115] Hece the complete set cosists of 819 scramblig codes correspodig to =16p+s CODE GEERATIO FOR WIDEBAD CDMA 75

7 ST JOURAL OF SYSTEM RESEARCH - VOL1 - UMBER 1 Each code is associated with two alterative sets of codes that may be used i compressed mode [5] The left alterative correspodig to the code has code umber while the right alterative has code umber Thus a total of =3 819 codes shall be geerated The DL scramblig code geerator is depicted i Fig 7 X LFSR Y LFSR FIGURE 7: DOWLIK SCAMBLIG CODE GEERATOR The primitive polyomials over GF() are: c X c Y ( D) =1 + D 7 + D 18 The state iitializatio polyomials are: The output of the scramblig code geerator is: where is the scramblig code umber The sequece b (i) is obtaied advacig b (i) of τ= -1 uits If b (i) ad b (i) are both mapped accordig to Table 31 assumig I (i)=b (i) ad Q (i)=b (i)=b (i+τ) the complete set of Gold sequeces ca be writte as: X X' y y' ( D) =1 + D 5 + D 7 + D 10 + D 18 a X0 a Y 0 ( D) =1 17 ( D) = D i i = 0 b ()= i x ( i + ) yi () b ()= i b ( i +τ) = ( i + ) y () i x b b' (8) (9) (30) (31) S ()= i I ()+ i Q () i Give that each code correspods to a -positio advace of the x sequece while maitaiig the same y sequece the attetio shall be focused o X LFSR Each code x (i) ca be obtaied by loadig the X LFSR with a proper iit state a X0 (D) Each iit state correspodig to -th code ca be pre-calculated ad stored i a memory This requires a K X bits memory Memory depth ca be reduced i such a way that oly PSC code umbers have to be stored SSCs ca be geerated usig the shift-ad-add property For this purpose give that the taps to be added deped oly o the s-th SSC withi the p-th PSC set applyig the shift-ad-add property correspods to the XOR masig sectio of Fig 8 Each tap selector polyomial a X (D) ca be pre-calculated ad stored i a small 15 X bit Loo-Up Table (LUT) The a X (D) X LFSR itermediate taps mased by polyomial selector a X (D) ca the modulo- added to produce the s-th SSC s a' x (D)LUT a(d) x XOR MASK FIGURE 8: SSC CODE GEERATOR USIG THE SHIFT-AD-ADD PROPERTY Eve if the masig sectio applies to both x ad x geeratio it has to be oted that x XOR masig ca be reduced to a multiplexer I fact beig s< x evaluatio falls ito (11) The X LFSR sectio for the scramblig code geerator is depicted i Fig 9 The Y LFSR cotributio ca be easily added to the correspodig X LFSR sectio output It is capable of geeratig oe PSC code (chose as mai left or right alterative code) ad oe SSC withi the PSC defied set The code memory holds the primary code taps (icludig both mai ad alteratives) while tap selectors are stored i the LUT x s (3) 76 COPYRIGHT STMICROELECTROICS 003

8 ST JOURAL OF SYSTEM RESEARCH - VOL1 - UMBER 1 a p s 9 4 3x51x18 15x18 X LFSR a X0 (D) a' X(D) a X(D) XOR MASK X' p The code umber cosists of bits (a) idicatig if the mai left or right alterative code has to be geerated 9 bits addressig the p-th PSC set ad 4 bits as LUT selector for s-th SSC withi the p-th PSC set Up to ow iitial states for both mai ad alterative codes have bee stored i the 15 x 18 bit LUT As stated the left ad right alterative codes cosist of advaced replicas of the X LFSR compoet of mai code This correspods to addig the proper a X (D) taps of the mai PSC code to geerate left ad right alteratives Fig 10 shows a possible architecture capable of geeratig two PSCs simultaeously (the mai ad related left or right alterative) ad two SSCs associated with the mai ad alterative code sets respectively I Fig 10 the code umber cosists of 1 bit (a) idicatig which alterative code has to be geerated 9 bits addressig the p-th PSC set ad 4 bits for s-th SSC withi the p-th PSC set The 15x18 bit LUT is addressed as i Fig 9 while the remaiig 30x18 bit LUTs are addressed with 5 bits idicatig whether the s-th SSC belogs to the left or right alterative code that is if the left or right tap selector set eeds to be used Istead of usig a LUT to store the tap selector for each SSC code it is possible to geerate the tap selector locally ruig a Galois LFSR (Fig 11) for s cycles as explaied i paragraph 1 This leads to a maximum latecy of s max =15 cloc cycles to geerate the tap selector while reducig the amout of LUTs memory For the circuit show i Fig 10 three Galois LFSRs have to be used i frot of 5 LUTs of 15x18 bits each FIGURE 9: X LFSR SECTIO OF THE SCRAMBLIG CODE GEERATOR X s X' s X p a p 9 4 s 5 51x18 15x18 30x18 30x18 a(d) x X LFSR XOR MASK FIGURE 10: X LFSR SECTIO OF DUAL SCRAMBLIG CODE GEERATOR a G0 (D) p s Galois LFSR E DOW COUTER a' G (D) a x (D) x' p x pa x' pa x s x' s x sa x' sa It has to be oted that thas to high-speed capability of the Galois LFSR it is possible to use the maximum cloc available i the system (typically up to 8 times the chip rate) i order to reduce the latecy 4 ORTHOGOAL CODE GEERATIO Orthogoal codes are commoly used to improve badwidth efficiecy O the trasmitter side each iformatio bit is spread usig a code tae from a set such as the Walsh code set A code of legth correspods to a badwidth expasio (spreadig factor) of XOR MASK FIGURE 11: TAPS SELECTOR GEERATIO BY MEAS OF A GALOIS LFSR x p x s CODE GEERATIO FOR WIDEBAD CDMA 77

9 ST JOURAL OF SYSTEM RESEARCH - VOL1 - UMBER 1 41 Walsh-Hadamard codes Walsh fuctios ca be geerated by meas of the Hadamard matrix Assumig = the Hadamard matrix ca be obtaied recursively: H = H H H H where H 1 = [1] The Walsh code H J correspods to -th row of matrix H Walsh codes have zero correlatio betwee each other: 1 H i = 0 ( ) ( ) H ( )= 0 i (33) (34) Differet shifts of Walsh codes are strogly correlated so a sychroizatio of at least oe chip betwee trasmitter ad receiver is required whe usig differet codes o the same chael Row H J ca be geerated usig the circuit show i Fig 1 where is the biary represetatio of the code umber ad the covetioal mappig (0 11-1) is used The Hadamard geerator of Fig 1 ca be used to geerate the Secodary Sychroizatio Chaels used by the cell search procedure to retrieve frame sychroizatio [5] OVSF code geeratio for a give spreadig factor = ca be obtaied by recursively costructig the matrix: = = 0 0 C C where C 10 =[1] The x matrix (35) defies a code set where -th row cosists of a code sequece of legth Direct ispectio of (35) shows that the OVSF code matrix differs from the Hadamard matrix (33) oly i the rows order Thus is also a orthogoal set The relatioship betwee Walsh ad OVSF codes ca be retrieved itroducig the permutatio matrix: = G H (35) (36) 4 OVSF codes OVSF codes are commoly used to allow differet data services with differet data rates cloc Cloc divider 0-1 FIGURE 1: HADAMARD CODE GEERATOR H The matrix G ca be evaluated recursively: G = G 0 G 1 G G 3 G G 1 G G 0 G 0 1 = 0 G 1 G G 1 (37) 78 COPYRIGHT STMICROELECTROICS 003

10 ST JOURAL OF SYSTEM RESEARCH - VOL1 - UMBER 1 where G 10 =[1] All the code sets C associated with the spreadig factors K= with varyig i the rage [1] ca be retrieved usig the code tree of Fig 13 [7] K-SHL cloc MOD-K COUTER K-1 C 0 =(11) C 40 =(1111) C 41 =(11-1-1) K "0" 0 C K C 10 =(1) C 4 =(1-11-1) FIGURE 14: VARIABLE SPREADIG FACTOR OVSF CODE GEERATOR K 1 C 1 =(1-1) C 43 =(1-1-11) 4 8 BIT REVERSAL K-SHL 1 0 OVSF GEERATOR C K FIGURE 13: OVSF CODE TREE Each code set C cotais K codes of legth K Two differet codes belogig to differet code sets are also orthogoal except whe oe of the two codes is the mother for the other For a give code C K all the codes C K/h /h where h [14K] belog to the path that leads to code tree root C 10 ad thus caot be used The OVSF code geeratio ca be performed reusig the circuit of Fig 1 Colum reorderig ca be performed usig the relatioships show i (36) which ca be easily accomplished by bit-reversig the code umber biary represetatio of before feedig it ito the Hadamard geerator of Fig 1 Fig 14 shows a OVSF code geerator capable of supportig differet spreadig factors [5] Depedig o the spreadig factor K the code umber word is left-shifted by =log K positios before bit-reversal It has to be oted that i Fig 14 the cloc divider has bee implemeted usig a modulo-k cloc couter A circuit able to geerate both the Hadamard ad OVSF codes is show i Fig 15 Sigal s CH is used to select if a Hadamard or OVSF code has to be geerated K S CH FIGURE 15: DUAL OVSF/HADAMARD CODE GEERATOR The geerator of Fig 14 ca be used to spread the iformatio bits as well as to de-spread icomig spread bits o the receiver side De-spreadig ca be performed correlatig icomig bits by meas of a itegrate ad dump circuit Alteratively a filter matched to the specific code ca be used I this case it could be useful to have a parallel code geeratio Assumig that the biary represetatio of the code umber over =log bits is: 1 = h h (38) h=0 each elemet (i) with i [0-1] of code row ca be geerated by: ()= i h (39) i h 0 where (0)=0 ad i h are the digits of the biary represetatio of idex i CODE GEERATIO FOR WIDEBAD CDMA 79

11 ST JOURAL OF SYSTEM RESEARCH - VOL1 - UMBER 1 The total umber of required modulo- operatios ca be writte as: 1 Fig 16 illustrates a circuit for = 8 = h (40) h =0 [] SPREADIG CODES FOR DIRECT SEQUECE CDMA AD WIDEBAD CDMA CELLULAR ETWORKS E H Dia B Jabbari IEEE Comm Magazie Sep 1998 [3] LOWER BOUDS O THE MAXIMUM CROSS-CORRELATIO OF SIGALS L R Welch IEEE Tras Ifo Theory vol IT-0 May "0" 0 C C K C K C K C K C K K C K C K (7) (6) (5) (4) (3) () (1) (0) FIGURE 16: PARALLEL OVSF CODE GEERATOR [4] CROSSCORRELATIO PROPERTIES OF PSEUDO-RADOM AD RELATED SEQUECES DV Sarwate MB Pursley Proc IEEE vol 68 May 1980 [5] SPREADIG AD MODULATIO (FDD) 3GPP TS 513 v350 RA-WG1 [6] SPREAD SPECTRUM/CDMA S G Glisic Iteratioal Courses for Telecom Professioals course COCLUSIO I this paper we have provided a brief overview of 3GPP FDD scramblig ad chaelizatio code geerators Based o the P sequece theory a ovel geerator implemetatio for DL log code able to geerate more tha oe code at the same time has bee outlied This ca be very useful for mobile termials supportig data streams comig from differet sources (hadover betwee differet BTSs or differet services from the same BTS) Moreover we have explored chaelizatio code geeratio ad preseted differet geerators architectures able to geerate both OVSF ad Walsh codes Sice implemetatio has bee targeted to mobile applicatios all the proposed architectures have bee implemeted to meet the size memory ad power cosumptio requiremets of the mobile termial [7] TREE-STRUCTURE GEERATIO OF ORTHOGOAL SPREADIG CODES WITH DIFFERET LEGTHS FOR FORWARD LIK OF DS-CDMA MOBILE RADIO F Adachi M Sawahashi K Oawa Electro Lett vol 33 Ja 1997 [8] ORTHOGOAL FORWARD LIK USIG ORTHOGOAL MULTI-SPREADIG FACTOR CODES FOR COHERET DS-CDMA MOBILE RADIO K Oawa F Adachi IEICE Tras Commu vol E81-B Apr 1998 [9] SPREADIG AD MODULATIO (TDD) 3GPP TS 53 v350 RA-WG1 REFERECES [1] ITRODUCTIO TO SPREAD SPECTRUM COMMUICATIOs R Peterso R Ziemer D Borth Pretice Hall 1995 COTACT: STJOURAL@STCOM 80 COPYRIGHT STMICROELECTROICS 003

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