AN2031 APPLICATION NOTE

Transcription

1 AN0 APPLICATION NOTE STA0-0 EVALUATION BOARD DESCRIPTION DESCRIPTION The STA0A is a single chip solution for digital audio processing and control in multi-channel application. It provides output capabilities for DDX (Direct Digital Amplification). In conjunction with DDX power device, it provides high quality, high efficiency, all digital amplification. STA0 is a monolithic quad half bridge stage in Multipower BCD technology. The device can be used as dual bridge or reconfigured, by connecting CONFIG pin to V dd pin, as single bridge with double current capability. This device is particularly designed to make the Output stage of a stereo DDX amplifier capable to deliver 0 + = 0% at V cc = V output power on Ω load. In single BTL configuration, is also capable to deliver a peak of 60W@THD = 0% at V cc = V on 4Ω load (t<= sec). STA0-0// EVALUATION BOARD DESCRIPTION In this board it is possible to solder STA0 or STA0A device how digital audio processor. There are three jumpers (JP, JP, JP6) to select the correct device. The board has one S/PDIF input (electrical single ended and optical). In this board it is possible to use two different powers (0V to V on J) and logic (V on J) stages or only one supply (0V to V on J) for both stages. This feature is possible setting JP in EXT-SEL or INT-SEL respectively. U6 and U7 are configured to drive or ohm (over 0W) on the channel.. SUPPLY VOLTAGE, REGULATORS The STA0-0// board uses V,.V power regulation for logic circuitry and 0<V cc < for power section of STA0 device. It is possible to apply only one power supply and to extract the logic power supply utilizing the L47D step down device. S/PDIF INPUT INTERFACE The STA0A controller's data interface is serial I S for input. The STA0-0//-EVB input accommodates coaxial or optical S/PDIF digital audio interfaces using a digital audio receiver IC. Jumper JP may select either input. S/PDIF interfaces (STA0D) will support sample rates from KHz to 6KHz Optical S/PDIF receiver IC is SHARP GPFR.. DIGITAL SIGNAL PROCESSING The STA0A converts pulse code modulated, PCM, digital audio input signals into Pulse- Width Modulated PWM. This signal enters in the same time in the two STA0 ICs and the exit signal is at high level of power. The STA0A has two independent volume control registers AN0/070 Rev. /

2 AN0 APPLICATION NOTE that have an adjustment range from +4dB to -7dB in 0.dB increments. In addition, the mater volume is adjustable from 0dB to -7dB in 0.dB steps. Tone control registers boost or cut the treble and bass by +/-db, in db steps. EQ filters are IIR biquads configurable by programmable coefficients..4 POWER OUTPUT The power level signals are applied to passive two-pole low pass filter, and provide low distortion audio power to the load. The output filter functions to prevent unwanted high frequency switching signals from reaching the load. Filter designs for Ω. Peak voltage on power pins must not exceed V. Snubber networks are employed to protect the output MOSFETs from inductive transients, which can reach levels higher than the supply voltage. Output snubber filter values are R/C66 and R4/C. The other critical components for device reliability are C47, C, C, C6 (uf) and C4, C, C, C64 (F); these bypass capacitors from Vcc and power pins of STA0. These capacitors must be X7R Ceramic or Tantalum SMD construction and must be located as close as possible to the device pins. The STA0 shuts down when it reaches 0 C.. JUMPERS CONNECTOR The STA0-0//-EVB provides some jumpers to configure the board... JUMPERS: JP: (INT-SEL-EXT): short on EXT-SEL to use different power supplies; short on INT-SEL to use only one power supply; JP: (.A): short (with solder tin) if STA0 IC is solder on the board. If there is the STA0A this jumper could be opened; JP: (.A): short (with solder tin) if STA0 IC is solder on the board. If there is the STA0A this jumper could be opened; JP4: short this jumper to use two different power supply; JP: (OPTIC- SPDIF -ELEC): short the central pin with ELEC pin to use Electric S/PDIF; short the central pin with OPTIC pin to use the optical S/PDIF. JP6: short (with solder tin).a and center if STA0A IC is solder on the board. If there is the STA0A this jumper could be short on.v and center JP7: this pin must be open... CONNECTORS: J: Logic supply (V) J: Power Supply (0V to V) J: Male 0 pin connector for plug control board J4: RCA connector electric S/PDIF J: Optical S/PDIF SHARP GPFR J6: Connector for output load A /

3 AN0 APPLICATION NOTE CONFIGURE STA0A-0//-EVB WITH LPT INTERFACE ) Plug the LPT Interface on the board utilizing J of STA0A-0//-EVB and J of LPT Interface; ) Connect PC parallel port to the LPT board using a parallel cable; ) Select S/PDIF Input mode (electric or optical) with JP; 4) Connect logic supply (+V) on J and power supply [0V..V] on J; ) Connect output load on J6; 6) 6Turn on the board; 7) Run STA0A-0PControlPanel.exe on the PC.. Configuring GUI Software: ) Go to "Registers" page on GUI. ) Click "AutoFind LPT" button. It appears the number of LPT port (0x7 or 0x7); ) Click "Reset" button 4) Click "Power Up" button ) Click "Test Board I/O". If "passed" it is OK. If "failed", then perform manual board-reset by pressing SW button and try again. If still "failed" then make sure connections are OK. 6) Go to "Control" page on GUI. 7) Click "Ext Amp Power Up" to enable the output power. ) Increase "ALL" master volume control. 4 PERFORMANCES 4. THD+Noise Ratio versus Output Power at different input power supply Input frequency: KHz; Output load: 4Ω; Blue: V; Cyan: 0V; Green: V; Yellow: 0V; Red: V; Magenta: 7V Figure. Audio Precision 0 % m 0m 0m 00m 00m 00m W /

4 AN0 APPLICATION NOTE 4. THD+Noise Ratio versus Output Power at different input power supply Input frequency: KHz; Output load:.67ω; Blue: V; Cyan: 0V; Green: V; Yellow: 0V; Red: V; Magenta: 7V Figure. Audio Precision 0 % m 0m 0m 00m 00m 00m W 4. THD+Noise Ratio versus Output Power at different input power supply Input frequency: KHz; Output load: Ω; Blue: V; Cyan: 0V; Green: V; Yellow: 0V; Red: V; Magenta: 7V Figure. Audio Precision 0 % m 00m 00m W 4/

5 AN0 APPLICATION NOTE 4.4 THD+Noise Ratio versus frequency at different output power Input power supply: V; Output load: 4Ω; Blue: 0dB; Cyan: -0dB; Green: -0dB; Figure 4. Audio Precision % k k k 0k 0k Hz SCHEMATIC AND LAYOUT. Schematic Figure. Power Section J Logic +V JP V SEL Ext Sel Int J Pwr +0V Vcc C6 LCL L + C 0u 0V C 0n 0V R.K C n R 0K C 0 U L47D C0 JP4 JUMPER C.n V L 0u D SMS60 R.7K R4 4.7K C + 00u 0V + C 0u 0V U IN LD06DT OUT C7 L + C4 0u 0V FERRITE A V C JP V A JP A U IN LD06DT OUT FERRITE L4 FERRITE L C4 + C 0u 0V C C6 FERRITE L6 Vicino all'sta0 /

6 AN0 APPLICATION NOTE Figure 6. Connection Section RESET R 0 C7 n R 0K SW BUTTON SCL EAPD PWDN TH_W SDA JP7 V TP TP TP TP4 TP TP6 TP7 TP TP TP0 J CON0 Figure 7. S/P DIF Section U4 V J4 GPFR +VS DATA J L7 FE RRITE RCA JACK R C JP SPDT/SM OPT - ELEC C C C 4 LRCKI SPDIF C VERF Cd/F Cc/F0 Cb/E Ca/E C0/E0 VD+ D RXP RXN FS YNC SCK CS /FCK U Ce/F SDATA ERF M M0 VA+ A FI LT MCK M M SEL CBL STA0 DATA SPDIF R6 60 C 0 XTI SPDIF Non Saldare D A 0 C n R 0 R 0 NON saldare R7 C 470n BICKI SPDIF R 0 R NON Saldare 6/

7 7/ AN0 APPLICATION NOTE Figure. STA0A Section V PWMB V TP PWMB C4 C C4 PWDN V V V SCL C C6 C BICKI SPDIF JP6 JUMPER SOLDER C A PWR PLL PWR PLL C0 SDA C40 00p RESET C C7 DATA SPDIF EAPD NUOVO C6 A XTI SPDIF C TP PWMA U STA MVO TEST_M ODE SDI_7 SDI_6 SDI_4 SDI_ LRCKI BICKI RESET PLL_BYPASS SA SDA SCL XTI FILTER_PLL A A CKOUT OUTB OUTA OUT7B OUT7A OUT6B OUT6A OUTB OUTA OUT4B OUT4A OUTB OUTA OUTB OUTA OUTB OUTA EAPD BICKO LRCKO SDO_ SDO_4 SDO_6 SDO _7 PWDN C7 PWMA LRCKI SPDIF C C C4 n C R.K V V

8 AN0 APPLICATION NOTE / Figure. STA0 Section Figure 0. Output Filter Section TH_W PWMB OUTB_ FT00 PWMA OUTA C6 u PWMA C6 D4 N44 D N44 C0 TH_W00 OUTA_ U6 STA Sub OUTB OUTB VccB B A VccA OUTA OUTA OUTB OUTB VccB B A VccA OUTA OUTA NC Clean Reg Ibias CONFIG PWRDN TRISTATE FAULT TH_WARN INA INB INA INB Vss Vss VccSig VccSig R6 0k OUTA_ TP OUTB OUTB C4 Vcc C PWMB TH_W00 OUTA C44 C4 C u + C46 000u 0V C4 TP4 C64 EAPD00 C u EAPD 00 C60 C6 FT00 C C4 EAPD U7 STA Sub OUTB OUTB VccB B A VccA OUTA OUTA OUTB OUTB VccB B A VccA OUTA OUTA NC Clean Reg Ibias CONFIG PWRDN TRISTATE FAULT TH_WARN INA INB INA INB Vss Vss VccSig VccSig + C7 000u 0V C6 Vcc R 0K C47 u OUTB_ C C4 L u C66 0p C6 C7 J6 CON C6 uf 6V C7 R 0 OUTA OUTB_ R 6. OUTA 0 OUTA 0 L u OUTA_ C6 L u OUTB 0 R7 6. C 0p R4 0 OUTB C7 n OUTB 0 C70 nf 6V C67 n L0 u

9 AN0 APPLICATION NOTE. Layout Figure. Component Layer Figure. Solder Layer /

10 AN0 APPLICATION NOTE Figure. Serigraphy 0/

11 AN0 APPLICATION NOTE Table. Revision History Date Revision Description of Changes July 00 First Issue /

12 AN0 APPLICATION NOTE The present note which is for guidance only, aims at providing customers with information regarding their products in order for them to save time. As a result, STMicroelectronics shall not be held liable for any direct, indirect or consequential damages with respect to any claims arising from the content of such a note and/or the use made by customers of the information contained herein in connection with their products. Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners 00 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America /