DIGITAL SYSTEM FUNDAMENTALS (ECE421) DIGITAL ELECTRONICS FUNDAMENTAL (ECE422) LATCHES and FLIP-FLOPS

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1 COURSE / CODE DIGITAL SYSTEM FUNDAMENTALS (ECE421) DIGITAL ELECTRONICS FUNDAMENTAL (ECE422) LATCHES and FLIP-FLOPS In the same way that logic gates are the building blocks of combinatorial circuits, latches and flip-flops are the building blocks of sequential circuits. While gates had to be built directly from transistors, latches can be built from gates, and flip-flops can be built from latches. This fact will make it somewhat easier to understand latches and flip-flops. Both latches and flip-flops are circuit elements whose output depends not only on the current inputs, but also on previous inputs and outputs. The difference between a latch and a flip-flop is that a latch does not have a clock signal, whereas a flip-flop always does. Latches How can a circuit that is made out of logic gates that is not combinatorial? The answer is feed-back, which means that there are feedback loops in the circuit so that output values depend, indirectly, on themselves. If such feed-back is positive then the circuit tends to have stable states, and if it is negative the circuit will tend to oscillate. A latch has positive feedback. Here is an example of a simple latch. This latch is called SR-latch, which stands for set and reset. Figure below shows the SR latch is made from NAND gates. Flip-Flop Latches are asynchronous, which means that the output changes very soon after the input changes. Most computers today, on the other hand, are synchronous, which means that the outputs of all the sequential circuits change simultaneously to the rhythm of a global clock signal. A flip-flop is a synchronous version of the latch. To complicate the situation even more, there are several fundamental types of flip-flops. But here, only a type called master-slave flip-flop is considered. Also, in addition to the fundamental types of flip-flops, there are minor variations depending on the number of inputs and how they control the state of the flip-flop. Latches and flip-flops are the basic elements for storing information. One latch or flip-flop can store one bit of information. There are basically four main types of latches and flip-flops: SR, D, JK and T. The major differences in these flip-flop types are the number of inputs they have and how they change state. For each type, there are also different variations that enhance their operations. Mohd Uzir Kamaluddin / Aug 2016 page 1

2 Sequential Logic Circuits Sequential logic is a type of logic circuit whose output depends not only on the present input but also on the history of the input. This is in contrast to combinational logic, whose output is a function of, and only of, the present input. In other words, sequential logic has storage (memory) while combinational logic does not. Sequential logic is therefore used to construct some types of computer memory, other types of delay and storage elements, and finite state machines. Most practical computer circuits are a mixture of combinational and sequential logic. Nearly all sequential logic today is 'clocked' or 'synchronous logic' logic: there is a 'clock' signal, and all internal memory (the 'internal state') changes only on a clock edge. The basic storage element in sequential logic is the flip-flop. The main advantage of synchronous logic is its simplicity. Every operation in the circuit must be completed inside a fixed interval of time between two clock pulses, called a 'clock cycle'. As long as this condition is met (ignoring certain other details), the circuit is guaranteed to be reliable. Synchronous logic also has two main disadvantages, as follows. 1. The clock signal must be distributed to every flip-flop in the circuit. As the clock is usually a highfrequency signal, this distribution consumes a relatively large amount of power and dissipates much heat. Even the flip-flops that are doing nothing consume a small amount of power, thereby generating waste heat in the chip. 2. The maximum possible clock rate is determined by the slowest logic path in the circuit, otherwise known as the critical path. This means that every logical calculation, from the simplest to the most complex, must complete in one clock cycle. One way around this limitation is to split complex operations into several simple operations, a technique known as 'pipelining'. This technique is prominent within microprocessor design, and helps to improve the clock rate of modern processors. In digital electronics, a clocked sequential system is a system whose output depends only on the current state, whose state changes only when a global clock signal changes, and whose next-state depends only on the current state and the inputs. Nearly all digital electronic devices (microprocessors, digital clocks, mobile phones, cordless telephones, electronic calculators, etc.) are designed as clocked sequential systems. Notable exceptions include digital asynchronous logic systems. In particular, nearly all computers are designed as clocked sequential systems. Notable exceptions include analog computers and clock-less CPUs. Typically, each bit of the "state" is contained in its own flip-flop. Combinational logic decodes the state into the output signals. More combinational logic encodes the current state and the inputs into the next-state signals. The next-state signals are latched into the flip-flops under the control of the global clock signal (a wire connected to every flip-flop). JK flip-flop A flip-flop is a device very like a latch in that it is a bi-stable multi-vibrator, having two states and a feedback path that allows it to store a bit of information. The difference between a latch and a flip-flop is that a latch is asynchronous, and the outputs can change as soon as the inputs do (or at least after a Mohd Uzir Kamaluddin / Aug 2016 page 2

3 small propagation delay). A flip-flop, on the other hand, is edge-triggered and only changes state when a control signal goes from high to low or low to high. This distinction is relatively recent and is not formal, with many authorities still referring to flip-flops as latches and vice versa, but it is a helpful distinction to make for the sake of clarity. The JK flip-flop augments the behavior of the SR flip-flop (J=Set, K=Reset) by interpreting the S = R = 1 condition as a "flip" or toggle command. Specifically, the combination J = 1, K = 0 is a command to set the flip-flop; the combination J = 0, K = 1 is a command to reset the flip-flop; and the combination J = K = 1 is a command to toggle the flip-flop, i.e., change its output to the logical complement of its current value. The JK flip-flop is a universal flip-flop, because it can be configured to work as an SR flip-flop, a D flip-flop, or a T flip-flop. A circuit symbol for a JK flip-flop, where > is the clock input, J and K are data inputs, Q is the stored data output, and Q' is the inverse of Q. The characteristic equation of the JK flip-flop is: corresponding truth table is: CHARACTERISTIC TABLE J K Qn+1 Comment 0 0 Qn No change Reset (Clear) Set 1 1 Qn Toggle (Invert) and the D Flip Flop The D Flip Flop is by far the most important of the clocked flip-flops. The D flip-flop tracks the input, making transitions with match those of the input D. The D stands for "data"; this flip-flop stores the value that is on the data line. It can be thought of as a basic memory cell. A D flip-flop can be made from a Set/Reset flip-flop (SR flip-flop) by tying the set to the reset through an inverter. T Flip Flop The T or "toggle" flip-flop changes its output on each clock edge, giving an output which is half the frequency of the signal to the T input. It is useful for constructing binary counters, frequency dividers, and general binary addition devices. It can be made from a J-K flip-flop by tying both of its inputs high. Mohd Uzir Kamaluddin / Aug 2016 page 3

4 Summary of Flip Flops Conversion of flip-flop from one type to another. 1. Implementing a D flip-flop using JK flip-flop. 2. Implementing a T flip-flop using a JK flip flop. 3. Implementing a JK flip flop using a D flip flop. Using the excitation table for both the JK and T flip flops, the conversion table is created as follows. Mohd Uzir Kamaluddin / Aug 2016 page 4

5 To determine the input excitation of the T flip flop, a K map is used and the expression is obtained. 4. By the same method, a JK flip flop can be implemented using a D flip flop. 5. A T flip flop from a D flip flop. Exercise: Implement a D flip flop from a T flip flop. Mohd Uzir Kamaluddin / Aug 2016 page 5