Digital Audio Design Validation and Debugging Using PGY-I2C

Size: px
Start display at page:

Download "Digital Audio Design Validation and Debugging Using PGY-I2C"

Transcription

1 Digital Audio Design Validation and Debugging Using PGY-I2C Debug the toughest I 2 S challenges, from Protocol Layer to PHY Layer to Audio Content Introduction Today s digital systems from the Digital TV in the living room to the complex switching elements in an IPTV network are driving convergence on many fronts. Quality of Experience is taking centre-stage. Audio requirements in Computers, Mobile Handsets and Home Automation products have changed dramatically. Audio content to and from the processors is increasingly becoming digital data. Engineers validating hardware and firmware for I 2 S, often need to cross-examine the protocol layer, the PHY layer and the audio content. These design scenarios have intensified the need for one tool that spans across from Protocol layer to the PHY layer to Audio Analysis. This application note discusses a versatile tool that enables design and validation engineers to efficiently, and effectively, debug the toughest I 2 S challenges using the PGY-I2S application software. The software runs on Tektronix windows-based high-bandwidth oscilloscope used in the validation of high-speed Serial Data technologies. About I 2 S Standard The digital audio signals in most systems are processed by a number of devices, such as ADCs, DACs, DSPs, Digital I/O interfaces and many more. In order to enhance the flexibility and interoperability, it is critical to have standardized communication structures, for both the equipment and the silicon developers. Inter-IC Sound (I 2 S) bus a serial link, is developed specially for digital audio. The bus handles only audio data through a simple, 3-line serial bus consisting of: Continuous Serial Clock (SCK) Word Select (WS) Serial Data (SD) The Clock The transmitter and receiver have the same clock signal for data transmission. Typically, the transmitter acts as the master, and generates the bit clock, word-select signal and data. The slave derives its internal clock signal from an external clock input. In complex systems having several transmitters and receivers, a system master controls digital audio data-flow between various ICs.

2 For data and word-select inputs, the external to internal clock delay is of minor consequence because it only lengthens the effective set-up time. The major part of the time margin is set to accommodate the difference between the propagation delay of the transmitter, and the time required to set up the receiver. All timing requirements are specified relative to the clock period or to the minimum allowed clock period of a device. Thus, higher data rates can be used in the future. Word Select The Word Select(WS) line indicates the channel being transmitted: WS = 0; channel 1 (left). WS = 1; channel 2 (right). In the slave, this signal is latched on to the leading edge of the clock signal. The WS line changes one clock period before the MSB is transmitted. This allows the slave transmitter to derive synchronous timing of the serial data that will be set up for the transmission. Moreover, it enables the receiver to store the previous word and clear the input for the next word. Serial Data I 2 S offers a very high degree of flexibility. The transmitter and receiver may have different word lengths. Also, it is not necessary for the transmitter to know how many bits the receiver can handle, nor does the receiver need to know how many bits are being transmitted. To enable this, the Serial Data is transmitted in two s complement with the MSB first. The MSB has a fixed position, whereas the position of the LSB depends on the word length. When the system word length is greater than the transmitter word length, the word is truncated (LSB set to 0 ) for data transmission. If the receiver gets more bits than its word length, the bits after the LSB are ignored. In case the receiver gets fewer bits than its word length, the missing bits are set to zero internally. The Challenges Key performance of current generation digital Audio is measured based on the quality of output audio, battery life, and portability. To achieve these performance factors, industry converts the analog audio signal into digital to reduce affect of SNR and also to employ multiple digital signal processing algorithms to create a compelling audio experience. To enhance the battery life, designer s pursuing VLSI/LSI designs based on power aware technology. This technology changes the state of the different blocks within an IC to on/off These design practices throw up the following challenges to the designers. Debugging the content of the Audio Serial buses. Ensuring physical layer timing and compliance to standard.

3 Ensuring high level signal fidelity during the signal transformation from Analog to Digital and vice versa. Reducing the noise components generated due to mixed signal design and new generation power-aware ICs. Interoperability of different vendors Audio subsystems Maximizing the design margins with low power and voltage. Traditionally, engineers use multiple instruments such as Audio analyser for dealing with the audio domain related challenges, logic analyser for dealing with the link layer challenges and Oscilloscopes for dealing the signal integrity and timing challenges. Involving multiple instruments adds additional complexity in the test setup. Now a single tool has arrived to address all of the above challenges in the I2S design. PGY- DAA I2S Digital Audio Analysis software along with the Tektronix Oscilloscope is a single tool to cross-examine the protocol layer and the PHY layer while verifying the audio performance and helps to address all the discussed challenges. This application note further explains the features of the PGY DAA I2S Digital Audio Analysis Software Tools for methodical debugging Debugging starts from setting up the Oscilloscope Every step in setting up the Oscilloscope is important in the debugging process because it affects the reliability and accuracy of measurements and decoded information. The circuit design and the bench validation engineers spend considerable time in setting up the Oscilloscope before they start characterizing their circuit Setting up the Oscilloscope includes adjusting the sampling rate, horizontal scale, horizontal trigger position, vertical scale and vertical position etc. Oscilloscope sampling rate plays an important role in the measurement and decoding the analog signal. Theoretically to re-construct the waveform sampling rate should be at least twice the frequency of the signal, but in digital domain the rise time of the signal plays a major role in choosing the oscilloscope s sampling rate. Similarly oscilloscope s vertical scale and its dynamic range play a major role in making reliable measurements. Oscilloscope works with 8bit A/D converter. If the vertical oscilloscope settings are not adjusted properly the oscilloscope s full scale vertical dynamic range will not be used. Thus higher quantization error results in poor measurement reliability. To make the engineers productive and reduce the errors in their debug process the I2S Digital Audio Analysis solution provides oscilloscope setup assistance. Engineer needs to provide the audio sample rate and the duration of the audio waveform which may be of

4 interest. The application sets the Oscilloscope s vertical and horizontal parameters automatically which helps the engineers to make a reliable measurement. Physical layer and protocol triggering for efficient debug Any circuit debug need a powerful triggering capability to detect the problem. Physical layer designers often look for symptoms of timing violations on the I2S bus. I2S Digital audio analysis software provides an efficient way of setting up the set-up and hold timings between the data, clock and WS signals. It offers a comprehensive set of triggers to test and debug the specified limits. Digital designers debug the circuit based on the protocol data. This can be based on the violation of the protocol or based on the value. I2S Digital audio analysis application provides a facility to trigger the data based on the protocol value. To ensure the interoperability between the different I2S transmitter and receiver it is essential to meet all the standard requirements of the I2S specification, I2S Digital Audio Analysis Solution helps the engineers to detect the problem in their circuit by offering a comprehensive triggering support. Penta Monitor for cross debug physical, protocol and Audio layer problems Engineers designing hardware and firmware for I 2 S are constantly seeking ways to differentiate their designs. Often times, they need one tool to cross-examine the protocol layer and the PHY layer while verifying the audio performance. The I2S Audio/Protocol Decode/PHY Layer Test Software offers industry first and best Penta Monitor is the unprecedented cross-layer analysis tools and automation to improve quality and productivity while managing your schedules. PGY-I2S Penta Monitor consists of Spectrogram Monitor, Audio Monitor, Signal Monitor, Protocol Monitor and Eye diagram monitor. Each monitor brings in a unique way of looking the same I2S signal. Audio signals are not stationary it consists of multiple frequency component at any given point in time. Spectrogram Monitor provides a three dimensional view of the frequency components in the signal. Audio Monitor provides a insight into the transmitted audio signal in time domain, Signal Monitor offers the physical layer signal along with the overlaid decoded data along with the bus diagram. Protocol Monitor provides the protocol listing along with the time with respect to the trigger position, and the Eye diagram monitor provides a clear identification of overall system health and channel imperfections.

5 Further this app note discuss about how to use the Penta Monitor to debug various the I2S Digital audio design problems. Debugging the Physical layer timing problems Interoperability is an important aspect of any standard. Interoperability means different in each layer of the design. Since the I2S bus is serial in nature it is important to comply with the setup and hold timings. The I2S standard defines the Clock to data, Clock to Word select, and word select to data setup and hold time which are very vital for interoperability. PGY-I2S offers an elegant single click to measure all the standard defined timing measurements for each I2S data frame and provides the compliance results based on the standard. PGY-I2S analyzes each I2S data frame and compare with the standard there are very minimal chances that the devices fail in the interoperability. The real challenge of debug starts when one or more I2S physical layer signals fails to comply to standard. In such cases, PGY-I2S offers a search capability to find the timing violation frames. Based on the timing measurement search along with the and eye diagram designers can effectively debug the timing violations. Debugging the content of the digital audio PGY-I2S Software Penta monitor offers multiple cross examine tools to debug the digital audio content. Protocol monitor is the first place to look at the digital audio content which is transmitted. Protocol monitor lists all the available I2S data with respect to the trigger position. Since the I2S content is in 2 s complement format it will be difficult to interpret the data in the anlog data using 1s and 0s. While debugging the digital audio it is essential to know the list of I2S audio data transferred in the I2S channel, PGY- I2S offers a Protocol Monitor which lists the I2S data along with the time stamp with respect to trigger position. The protocol monitor also supports multiple data format such as decimal, hexadecimal, octal and 2s complement format. Time stamp helps to identify the position of the data with respect to trigger. While debugging, if any mismatch in the data it needs to be root caused to the physical layer, so any row selection in the protocol view automatically synchronize the data in the Signal Monitor, Audio monitor and Spectrogram monitor as shown in the figure. The corresponding portion of the signal is also zoomed in the Oscilloscope screen.

6 The comprehensive search provides an ability to search the data in the protocol listing, the list search attribute includes equal to, less than, greater than within a range and out of range. The protocol listing and search capabilities provided in the Penta Monitor helps to identify the I2S audio content problem quickly and effectively. Debugging the Audio problems An important audio performance indicator in portable audio devices is the occurrence of the strange, transient noises called Click and Pop heard when the unit is in operation. In general digital circuits are designed in multiple functional blocks. To reduce power consumption and extend the battery life often functional blocks are turned off or on depending on the need. This functional design requirement magnifies the potential for the Click and Pop. An ideal audio component would exhibit no Click and Pop. In practice, however, all audio amplifiers exhibit this to some degree due to turning on and off the digital circuits. To identify the strange and transient noise such as Click and Pop, PGY-I2S offers spectrum monitor search capability. Since the click and Pop are sudden change in frequency for a short period of time it will be difficult to find them in the time domain. But PGY-I2S spectrogram monitor search helps to quickly find the strange transient noises effectively. The click and pop can be identified using the sudden change in a particular high frequency component and duration of the change. The identified click and Pop portion will be displayed and highlighted in the spectrogram monitor and Audio monitor. After finding the transient noise it is important to identify the source of the noise. PGY-I2S offers the 4 th Channel to feed the suspicious noise source such as shutdown or enable signals to the Penta monitor s Signal Monitor to validate the Pop an Click with the source. This process may need multiple iterations to identify the correct source of the transient noise. Similarly, PGY-I2S offers several audio search functionalities such as Glitch, silence, mute, clip and bottom clip etc. Transient-free audio performance is an important performance differentiator and a crucial selling point for portable audio devices. I2S Digital audio analyzer s spectrum monitor search capabilities can help the audio circuit designer to identify the root cause the transient noises such as Click and Pop and several other problems.

7 Testing and validating the I2S subsystem with industry s standard patterns Often times engineers test the I2S subsystem using few known patterns such as walking 1s, walking 0s, content tone, constant values etc to validate the designs well before sending the digital audio content. It is not easy to run thru the each data value and identify the failures of these patterns. The pattern failure may not be clearly visible in the audio waveform or in the eye diagram. PGY-I2S pattern search offers a unique pattern search technique which helps to identify the patterns and search for failures. It also highlights the failures in the protocol monitor and signal monitors. PGY-I2S pattern search capability is a handy tool which helps the designers to use the standard patterns to validate their design. Summary PGY-I2S Electrical, Protocol and Audio Testing software answers to the need of a single versatile tool to cross-examine the physical layer, Protocol layer and Audio Analysis. Industry best and first Penta monitor helps the engineers to debug and root cause the complex I2S design problems such as Pop, click and signal integrity challenges. PGY-I2S I2S Audio / Protocol Decode / Electrical Test Software along with the Tektronix DPO7000, DPO/MSO70000/B series oscilloscope offers comprehensive set of tools which enables design and validation engineers efficiently, and effectively, debug toughest I 2 S challenges.

Quick Reference Manual

Quick Reference Manual Quick Reference Manual V1.0 1 Contents 1.0 PRODUCT INTRODUCTION...3 2.0 SYSTEM REQUIREMENTS...5 3.0 INSTALLING PDF-D FLEXRAY PROTOCOL ANALYSIS SOFTWARE...5 4.0 CONNECTING TO AN OSCILLOSCOPE...6 5.0 CONFIGURE

More information

Analyzing 8b/10b Encoded Signals with a Real-time Oscilloscope Real-time triggering up to 6.25 Gb/s on 8b/10b encoded data streams

Analyzing 8b/10b Encoded Signals with a Real-time Oscilloscope Real-time triggering up to 6.25 Gb/s on 8b/10b encoded data streams Presented by TestEquity - www.testequity.com Analyzing 8b/10b Encoded Signals with a Real-time Oscilloscope Real-time triggering up to 6.25 Gb/s on 8b/10b encoded data streams Application Note Application

More information

Meeting Embedded Design Challenges with Mixed Signal Oscilloscopes

Meeting Embedded Design Challenges with Mixed Signal Oscilloscopes Meeting Embedded Design Challenges with Mixed Signal Oscilloscopes Introduction Embedded design and especially design work utilizing low speed serial signaling is one of the fastest growing areas of digital

More information

BUSES IN COMPUTER ARCHITECTURE

BUSES IN COMPUTER ARCHITECTURE BUSES IN COMPUTER ARCHITECTURE The processor, main memory, and I/O devices can be interconnected by means of a common bus whose primary function is to provide a communication path for the transfer of data.

More information

Logic Analyzer Triggering Techniques to Capture Elusive Problems

Logic Analyzer Triggering Techniques to Capture Elusive Problems Logic Analyzer Triggering Techniques to Capture Elusive Problems Efficient Solutions to Elusive Problems For digital designers who need to verify and debug their product designs, logic analyzers provide

More information

Decade Counters Mod-5 counter: Decade Counter:

Decade Counters Mod-5 counter: Decade Counter: Decade Counters We can design a decade counter using cascade of mod-5 and mod-2 counters. Mod-2 counter is just a single flip-flop with the two stable states as 0 and 1. Mod-5 counter: A typical mod-5

More information

The XYZs of Logic Analyzers

The XYZs of Logic Analyzers L o g i c A n a l y z e r s ii The XYZs of Logic Analyzers Contents Introduction 1 Where It All Began 1 The Digital Oscilloscope 1 The Logic Analyzer 3 Logic Analyzer Architecture and Operation 5 Probe

More information

Debugging Memory Interfaces using Visual Trigger on Tektronix Oscilloscopes

Debugging Memory Interfaces using Visual Trigger on Tektronix Oscilloscopes Debugging Memory Interfaces using Visual Trigger on Tektronix Oscilloscopes Application Note What you will learn: This document focuses on how Visual Triggering, Pinpoint Triggering, and Advanced Search

More information

What to look for when choosing an oscilloscope

What to look for when choosing an oscilloscope What to look for when choosing an oscilloscope Alan Tong (Pico Technology Ltd.) Introduction For many engineers, choosing a new oscilloscope can be daunting there are hundreds of different models to choose

More information

Troubleshooting Analog to Digital Converter Offset using a Mixed Signal Oscilloscope APPLICATION NOTE

Troubleshooting Analog to Digital Converter Offset using a Mixed Signal Oscilloscope APPLICATION NOTE Troubleshooting Analog to Digital Converter Offset using a Mixed Signal Oscilloscope Introduction In a traditional acquisition system, an analog signal input goes through some form of signal conditioning

More information

Low-speed serial buses are used in wide variety of electronics products. Various low-speed buses exist in different

Low-speed serial buses are used in wide variety of electronics products. Various low-speed buses exist in different Low speed serial buses are widely used today in mixed-signal embedded designs for chip-to-chip communication. Their ease of implementation, low cost, and ties with legacy design blocks make them ideal

More information

Debugging a Mixed Signal Design with a Tektronix Mixed Signal Oscilloscope

Debugging a Mixed Signal Design with a Tektronix Mixed Signal Oscilloscope Debugging a Mixed Signal Design with a Tektronix Mixed Signal Oscilloscope Introduction Today s embedded design engineer is faced with the challenge of ever-increasing system complexity. A typical embedded

More information

ASYNCHRONOUS COUNTER CIRCUITS

ASYNCHRONOUS COUNTER CIRCUITS ASYNCHRONOUS COUNTER CIRCUITS Asynchronous counters do not have a common clock that controls all the Hipflop stages. The control clock is input into the first stage, or the LSB stage of the counter. The

More information

Choosing an Oscilloscope

Choosing an Oscilloscope Choosing an Oscilloscope By Alan Lowne CEO Saelig Company (www.saelig.com) Post comments on this article at www.nutsvolts.com/ magazine/article/october2016_choosing-oscilloscopes. All sorts of questions

More information

Introduction to Data Conversion and Processing

Introduction to Data Conversion and Processing Introduction to Data Conversion and Processing The proliferation of digital computing and signal processing in electronic systems is often described as "the world is becoming more digital every day." Compared

More information

MultiView Zoom Simplifies Navigation of Long Records to Speed Debugging and Analysis

MultiView Zoom Simplifies Navigation of Long Records to Speed Debugging and Analysis MultiView Zoom Simplifies Navigation of Long Records to Speed Debugging and Analysis Certain design applications depend on the ability to examine and compare long records of information. Efficiently navigating

More information

Quick Signal Integrity Troubleshooting with Integrated Logic Analyzers & Oscilloscopes

Quick Signal Integrity Troubleshooting with Integrated Logic Analyzers & Oscilloscopes Application Overview Quick Signal Integrity Troubleshooting with Integrated Logic Analyzers & Oscilloscopes Meeting Fast Edge Signal Integrity Challenges Fast product development requires fast and efficient

More information

Troubleshooting EMI in Embedded Designs White Paper

Troubleshooting EMI in Embedded Designs White Paper Troubleshooting EMI in Embedded Designs White Paper Abstract Today, engineers need reliable information fast, and to ensure compliance with regulations for electromagnetic compatibility in the most economical

More information

INDIAN INSTITUTE OF TECHNOLOGY KHARAGPUR NPTEL ONLINE CERTIFICATION COURSE. On Industrial Automation and Control

INDIAN INSTITUTE OF TECHNOLOGY KHARAGPUR NPTEL ONLINE CERTIFICATION COURSE. On Industrial Automation and Control INDIAN INSTITUTE OF TECHNOLOGY KHARAGPUR NPTEL ONLINE CERTIFICATION COURSE On Industrial Automation and Control By Prof. S. Mukhopadhyay Department of Electrical Engineering IIT Kharagpur Topic Lecture

More information

Clock Jitter Cancelation in Coherent Data Converter Testing

Clock Jitter Cancelation in Coherent Data Converter Testing Clock Jitter Cancelation in Coherent Data Converter Testing Kars Schaapman, Applicos Introduction The constantly increasing sample rate and resolution of modern data converters makes the test and characterization

More information

WINTER 15 EXAMINATION Model Answer

WINTER 15 EXAMINATION Model Answer Important Instructions to examiners: 1) The answers should be examined by key words and not as word-to-word as given in the model answer scheme. 2) The model answer and the answer written by candidate

More information

Exercise 1-2. Digital Trunk Interface EXERCISE OBJECTIVE

Exercise 1-2. Digital Trunk Interface EXERCISE OBJECTIVE Exercise 1-2 Digital Trunk Interface EXERCISE OBJECTIVE When you have completed this exercise, you will be able to explain the role of the digital trunk interface in a central office. You will be familiar

More information

혼합도메인오실로스코프와 USB 스팩트럼분석기를 이용한광대역노이즈최신측정기술소개

혼합도메인오실로스코프와 USB 스팩트럼분석기를 이용한광대역노이즈최신측정기술소개 혼합도메인오실로스코프와 USB 스팩트럼분석기를 이용한광대역노이즈최신측정기술소개 - RSA306 (USB Spectrum Analyzer), MDO Series (Mixed Domain Oscilloscope)- 텍트로닉스차경묵대리 AGENDA 1. Full compliance test vs Pre compliance test. 2. EMI Debugging

More information

Oscilloscopes, logic analyzers ScopeLogicDAQ

Oscilloscopes, logic analyzers ScopeLogicDAQ Oscilloscopes, logic analyzers ScopeLogicDAQ ScopeLogicDAQ 2.0 is a comprehensive measurement system used for data acquisition. The device includes a twochannel digital oscilloscope and a logic analyser

More information

Zeroplus Logic Analyzer Multi-LA Stack and LA-Oscilloscope Stack

Zeroplus Logic Analyzer Multi-LA Stack and LA-Oscilloscope Stack Zeroplus Logic Analyzer Multi-LA Stack and LA-Oscilloscope Stack Preface As digital technology develops, new 3C products continuously come into the market. To help engineers to release their products earlier,

More information

data and is used in digital networks and storage devices. CRC s are easy to implement in binary

data and is used in digital networks and storage devices. CRC s are easy to implement in binary Introduction Cyclic redundancy check (CRC) is an error detecting code designed to detect changes in transmitted data and is used in digital networks and storage devices. CRC s are easy to implement in

More information

EMI/EMC diagnostic and debugging

EMI/EMC diagnostic and debugging EMI/EMC diagnostic and debugging 1 Introduction to EMI The impact of Electromagnetism Even on a simple PCB circuit, Magnetic & Electric Field are generated as long as current passes through the conducting

More information

Boosting Performance Oscilloscope Versatility, Scalability

Boosting Performance Oscilloscope Versatility, Scalability Boosting Performance Oscilloscope Versatility, Scalability Rising data communication rates are driving the need for very high-bandwidth real-time oscilloscopes in the range of 60-70 GHz. These instruments

More information

Serial Decode I2C TEN MINUTE TUTORIAL. December 21, 2011

Serial Decode I2C TEN MINUTE TUTORIAL. December 21, 2011 Serial Decode I2C TEN MINUTE TUTORIAL December 21, 2011 Summary LeCroy oscilloscopes have the ability to trigger on and decode multiple serial data protocols. The decode in binary, hex, or ASCII format,

More information

AC103/AT103 ANALOG & DIGITAL ELECTRONICS JUN 2015

AC103/AT103 ANALOG & DIGITAL ELECTRONICS JUN 2015 Q.2 a. Draw and explain the V-I characteristics (forward and reverse biasing) of a pn junction. (8) Please refer Page No 14-17 I.J.Nagrath Electronic Devices and Circuits 5th Edition. b. Draw and explain

More information

Mixed Analog and Digital Signal Debug and Analysis Using a Mixed-Signal Oscilloscope Wireless LAN Example Application

Mixed Analog and Digital Signal Debug and Analysis Using a Mixed-Signal Oscilloscope Wireless LAN Example Application Mixed Analog and Digital Signal Debug and Analysis Using a Mixed-Signal Oscilloscope Wireless LAN Example Application Application Note 1418 Table of Contents Introduction......................1 Debugging

More information

Agilent E4430B 1 GHz, E4431B 2 GHz, E4432B 3 GHz, E4433B 4 GHz Measuring Bit Error Rate Using the ESG-D Series RF Signal Generators, Option UN7

Agilent E4430B 1 GHz, E4431B 2 GHz, E4432B 3 GHz, E4433B 4 GHz Measuring Bit Error Rate Using the ESG-D Series RF Signal Generators, Option UN7 Agilent E4430B 1 GHz, E4431B 2 GHz, E4432B 3 GHz, E4433B 4 GHz Measuring Bit Error Rate Using the ESG-D Series RF Signal Generators, Option UN7 Product Note Introduction Bit-error-rate analysis As digital

More information

AN-822 APPLICATION NOTE

AN-822 APPLICATION NOTE APPLICATION NOTE One Technology Way P.O. Box 9106 Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 Fax: 781.461.3113 www.analog.com Synchronization of Multiple AD9779 Txs by Steve Reine and Gina Colangelo

More information

Flip-Flops. Because of this the state of the latch may keep changing in circuits with feedback as long as the clock pulse remains active.

Flip-Flops. Because of this the state of the latch may keep changing in circuits with feedback as long as the clock pulse remains active. Flip-Flops Objectives The objectives of this lesson are to study: 1. Latches versus Flip-Flops 2. Master-Slave Flip-Flops 3. Timing Analysis of Master-Slave Flip-Flops 4. Different Types of Master-Slave

More information

Solutions to Embedded System Design Challenges Part II

Solutions to Embedded System Design Challenges Part II Solutions to Embedded System Design Challenges Part II Time-Saving Tips to Improve Productivity In Embedded System Design, Validation and Debug Hi, my name is Mike Juliana. Welcome to today s elearning.

More information

Equivalence Checking using Assertion based Technique

Equivalence Checking using Assertion based Technique Equivalence Checking using Assertion based Technique Shailesh Kumar NIT Bhopal Sameer Arvikar DAVV Indore Saurabh Jha STMicroelectronics, Greater Noida Tarun K. Gupta, PhD Asst. Professor NIT Bhopal ABSTRACT

More information

Interfacing Analog to Digital Data Converters. A/D D/A Converter 1

Interfacing Analog to Digital Data Converters. A/D D/A Converter 1 Interfacing Analog to Digital Data Converters A/D D/A Converter 1 In most of the cases, the PPI 8255 is used for interfacing the analog to digital converters with microprocessor. The analog to digital

More information

Logic Analysis Basics

Logic Analysis Basics Logic Analysis Basics September 27, 2006 presented by: Alex Dickson Copyright 2003 Agilent Technologies, Inc. Introduction If you have ever asked yourself these questions: What is a logic analyzer? What

More information

Logic Analysis Basics

Logic Analysis Basics Logic Analysis Basics September 27, 2006 presented by: Alex Dickson Copyright 2003 Agilent Technologies, Inc. Introduction If you have ever asked yourself these questions: What is a logic analyzer? What

More information

What's the SPO technology?

What's the SPO technology? What's the SPO technology? SDS2000 Series digital storage oscilloscope, with bandwidth up to 300 MHz, maximum sampling rate 2GSa/s, a deep memory of 28Mpts, high capture rate of 110,000wfs/s, multi-level

More information

Benefits of the R&S RTO Oscilloscope's Digital Trigger. <Application Note> Products: R&S RTO Digital Oscilloscope

Benefits of the R&S RTO Oscilloscope's Digital Trigger. <Application Note> Products: R&S RTO Digital Oscilloscope Benefits of the R&S RTO Oscilloscope's Digital Trigger Application Note Products: R&S RTO Digital Oscilloscope The trigger is a key element of an oscilloscope. It captures specific signal events for detailed

More information

Real-time spectrum analyzer. Gianfranco Miele, Ph.D

Real-time spectrum analyzer. Gianfranco Miele, Ph.D Real-time spectrum analyzer Gianfranco Miele, Ph.D www.eng.docente.unicas.it/gianfranco_miele g.miele@unicas.it The evolution of RF signals Nowadays we can assist to the increasingly widespread success

More information

DSA-1. The Prism Sound DSA-1 is a hand-held AES/EBU Signal Analyzer and Generator.

DSA-1. The Prism Sound DSA-1 is a hand-held AES/EBU Signal Analyzer and Generator. DSA-1 The Prism Sound DSA-1 is a hand-held AES/EBU Signal Analyzer and Generator. The DSA-1 is an invaluable trouble-shooting tool for digital audio equipment and installations. It is unique as a handportable,

More information

Oscilloscopes for debugging automotive Ethernet networks

Oscilloscopes for debugging automotive Ethernet networks Application Brochure Version 01.00 Oscilloscopes for debugging automotive Ethernet networks Oscilloscopes_for_app-bro_en_3607-2484-92_v0100.indd 1 30.07.2018 12:10:02 Comprehensive analysis allows faster

More information

Troubleshooting Your Design with Tektronix MSO and DPO Series Oscilloscopes

Troubleshooting Your Design with Tektronix MSO and DPO Series Oscilloscopes Troubleshooting Your Design with Tektronix MSO and DPO Series Oscilloscopes Our thanks to Tektronix for allowing us to reprint the following article. Today s engineers and technicians face increasingly

More information

HAMEG. Oscilloscopes. Innovation right from the start. Oscilloscopes

HAMEG. Oscilloscopes. Innovation right from the start. Oscilloscopes HAMEG Oscilloscopes Innovation right from the start Without doubt, the oscilloscope is the most important measuring instrument for the characterization of signals in the time domain. HAMEG Instruments

More information

Agilent MSO and CEBus PL Communications Testing Application Note 1352

Agilent MSO and CEBus PL Communications Testing Application Note 1352 546D Agilent MSO and CEBus PL Communications Testing Application Note 135 Introduction The Application Zooming In on the Signals Conclusion Agilent Sales Office Listing Introduction The P300 encapsulates

More information

6.111 Project Proposal IMPLEMENTATION. Lyne Petse Szu-Po Wang Wenting Zheng

6.111 Project Proposal IMPLEMENTATION. Lyne Petse Szu-Po Wang Wenting Zheng 6.111 Project Proposal Lyne Petse Szu-Po Wang Wenting Zheng Overview: Technology in the biomedical field has been advancing rapidly in the recent years, giving rise to a great deal of efficient, personalized

More information

Identifying Setup and Hold Violations with a Mixed Signal Oscilloscope APPLICATION NOTE

Identifying Setup and Hold Violations with a Mixed Signal Oscilloscope APPLICATION NOTE Identifying Setup and Hold Violations with a Mixed Signal Oscilloscope Introduction Timing relationships between signals are critical to reliable operation of digital designs. With synchronous designs,

More information

Lab 1 Introduction to the Software Development Environment and Signal Sampling

Lab 1 Introduction to the Software Development Environment and Signal Sampling ECEn 487 Digital Signal Processing Laboratory Lab 1 Introduction to the Software Development Environment and Signal Sampling Due Dates This is a three week lab. All TA check off must be completed before

More information

Physics 217A LAB 4 Spring 2016 Shift Registers Tri-State Bus. Part I

Physics 217A LAB 4 Spring 2016 Shift Registers Tri-State Bus. Part I Physics 217A LAB 4 Spring 2016 Shift Registers Tri-State Bus Part I 0. In this part of the lab you investigate the 164 a serial-in, 8-bit-parallel-out, shift register. 1. Press in (near the LEDs) a 164.

More information

Chapter 5 Flip-Flops and Related Devices

Chapter 5 Flip-Flops and Related Devices Chapter 5 Flip-Flops and Related Devices Chapter 5 Objectives Selected areas covered in this chapter: Constructing/analyzing operation of latch flip-flops made from NAND or NOR gates. Differences of synchronous/asynchronous

More information

MIPI DigRF 3G and v4 Decode

MIPI DigRF 3G and v4 Decode MIPI DigRF 3G and v4 Decode Key Features DigRF v4 Decodes Low-speed (26 Mb/s) Medium-speed (1248 Mb/s) High-speed (1456 Mb/s) View an entire DigRF 3G burst using intuitive decoding and table display. Click

More information

Status of readout electronic design in MOST1

Status of readout electronic design in MOST1 Status of readout electronic design in MOST1 Na WANG, Ke WANG, Zhenan LIU, Jia TAO On behalf of the Trigger Group (IHEP) Mini-workshop for CEPC MOST silicon project,23 November,2017,Beijing Outline Introduction

More information

Chapter 9 MSI Logic Circuits

Chapter 9 MSI Logic Circuits Chapter 9 MSI Logic Circuits Chapter 9 Objectives Selected areas covered in this chapter: Analyzing/using decoders & encoders in circuits. Advantages and disadvantages of LEDs and LCDs. Observation/analysis

More information

C8000. switch over & ducking

C8000. switch over & ducking features Automatic or manual Switch Over or Fail Over in case of input level loss. Ducking of a main stereo or surround sound signal by a line level microphone or by a pre recorded announcement / ad input.

More information

Since the early 80's, a step towards digital audio has been set by the introduction of the Compact Disc player.

Since the early 80's, a step towards digital audio has been set by the introduction of the Compact Disc player. S/PDIF www.ec66.com S/PDIF = Sony/Philips Digital Interface Format (a.k.a SPDIF) An interface for digital audio. Contents History 1 History 2 Characteristics 3 The interface 3.1 Phono 3.2 TOSLINK 3.3 TTL

More information

Using Manchester and NRZ Configurable Protocol Decoders

Using Manchester and NRZ Configurable Protocol Decoders Using Manchester and NRZ Configurable Protocol Decoders TECHNICAL BRIEF March 14, 2013 Summary Manchester and NRZ encoding schemes serve as building blocks for industrystandard and custom protocols. Here

More information

UCR 2008, Change 3, Section 5.3.7, Video Distribution System Requirements

UCR 2008, Change 3, Section 5.3.7, Video Distribution System Requirements DoD UCR 2008, Change 3 Errata Sheet UCR 2008, Change 3, Section 5.3.7, Video Distribution System Requirements SECTION 5.3.7.2.2 CORRECTION IPv6 Profile requirements were changed to a conditional clause

More information

Evaluating Oscilloscopes to Debug Mixed-Signal Designs

Evaluating Oscilloscopes to Debug Mixed-Signal Designs Introduction Evaluating Oscilloscopes to Debug Mixed-Signal Designs Our thanks to Agilent for allowing us to reprint the following article. Today s embedded designs based on microcontrollers (MCUs) and

More information

Keysight Technologies Mixed Analog and Digital Signal Debug and Analysis Using a Mixed-Signal Oscilloscope

Keysight Technologies Mixed Analog and Digital Signal Debug and Analysis Using a Mixed-Signal Oscilloscope Keysight Technologies Mixed Analog and Digital Signal Debug and Analysis Using a Mixed-Signal Oscilloscope Wireless LAN Example Application Application Note Introduction Many of today s designs include

More information

Troubleshooting Your Design with the TDS3000C Series Oscilloscopes

Troubleshooting Your Design with the TDS3000C Series Oscilloscopes Troubleshooting Your Design with the 2 Table of Contents Getting Started........................................................... 4 Debug Digital Timing Problems...............................................

More information

Laboratory 1 - Introduction to Digital Electronics and Lab Equipment (Logic Analyzers, Digital Oscilloscope, and FPGA-based Labkit)

Laboratory 1 - Introduction to Digital Electronics and Lab Equipment (Logic Analyzers, Digital Oscilloscope, and FPGA-based Labkit) Massachusetts Institute of Technology Department of Electrical Engineering and Computer Science 6. - Introductory Digital Systems Laboratory (Spring 006) Laboratory - Introduction to Digital Electronics

More information

Logic Analysis Fundamentals

Logic Analysis Fundamentals Logic Analysis Fundamentals Synchronous and asynchronous capture, combined with the right triggering, is the key to efficient digital system debug Application Note Introduction Today, a wide range of end

More information

Timesaving Tips for Digital Debugging with a Logic Analyzer

Timesaving Tips for Digital Debugging with a Logic Analyzer Timesaving Tips for Digital Debugging with a Logic Analyzer Application Note New Designs, New Headaches New digital devices have become progressively more powerful by incorporating faster microprocessors

More information

More Digital Circuits

More Digital Circuits More Digital Circuits 1 Signals and Waveforms: Showing Time & Grouping 2 Signals and Waveforms: Circuit Delay 2 3 4 5 3 10 0 1 5 13 4 6 3 Sample Debugging Waveform 4 Type of Circuits Synchronous Digital

More information

MS-32. Oscilloscope Mixed Signal Option. Add 32 Digital Channels to a 4 Channel Oscilloscope

MS-32. Oscilloscope Mixed Signal Option. Add 32 Digital Channels to a 4 Channel Oscilloscope MS-32 Oscilloscope Mixed Signal Option Add 32 Digital Channels to a 4 Channel Oscilloscope 4 Analog + 32 Digital Channel Capability LeCroy introduces the first oscilloscope solution to combine 4 analog

More information

CS8803: Advanced Digital Design for Embedded Hardware

CS8803: Advanced Digital Design for Embedded Hardware CS883: Advanced Digital Design for Embedded Hardware Lecture 4: Latches, Flip-Flops, and Sequential Circuits Instructor: Sung Kyu Lim (limsk@ece.gatech.edu) Website: http://users.ece.gatech.edu/limsk/course/cs883

More information

SignalTap Plus System Analyzer

SignalTap Plus System Analyzer SignalTap Plus System Analyzer June 2000, ver. 1 Data Sheet Features Simultaneous internal programmable logic device (PLD) and external (board-level) logic analysis 32-channel external logic analyzer 166

More information

Oscilloscope Measurement Tools to Help Debug Automotive Serial Buses Faster

Oscilloscope Measurement Tools to Help Debug Automotive Serial Buses Faster Oscilloscope Measurement Tools to Help Debug Automotive Serial Buses Faster Application Note Introduction The primary reason engineers use oscilloscopes to debug and characterize automotive serial buses,

More information

Designing for the Internet of Things with Cadence PSpice A/D Technology

Designing for the Internet of Things with Cadence PSpice A/D Technology Designing for the Internet of Things with Cadence PSpice A/D Technology By Alok Tripathi, Software Architect, Cadence The Cadence PSpice A/D release 17.2-2016 offers a comprehensive feature set to address

More information

1. Convert the decimal number to binary, octal, and hexadecimal.

1. Convert the decimal number to binary, octal, and hexadecimal. 1. Convert the decimal number 435.64 to binary, octal, and hexadecimal. 2. Part A. Convert the circuit below into NAND gates. Insert or remove inverters as necessary. Part B. What is the propagation delay

More information

RF4432 wireless transceiver module

RF4432 wireless transceiver module RF4432 wireless transceiver module 1. Description RF4432 adopts Silicon Lab Si4432 RF chip, which is a highly integrated wireless ISM band transceiver. The features of high sensitivity (-121 dbm), +20

More information

CS 61C: Great Ideas in Computer Architecture

CS 61C: Great Ideas in Computer Architecture CS 6C: Great Ideas in Computer Architecture Combinational and Sequential Logic, Boolean Algebra Instructor: Alan Christopher 7/23/24 Summer 24 -- Lecture #8 Review of Last Lecture OpenMP as simple parallel

More information

BLOCK CODING & DECODING

BLOCK CODING & DECODING BLOCK CODING & DECODING PREPARATION... 60 block coding... 60 PCM encoded data format...60 block code format...61 block code select...62 typical usage... 63 block decoding... 63 EXPERIMENT... 64 encoding...

More information

1. Abstract. Mixed Signal Oscilloscope Ideal For Debugging Embedded Systems DLM2000 Series

1. Abstract. Mixed Signal Oscilloscope Ideal For Debugging Embedded Systems DLM2000 Series Yokogawa Electric Corporation High Frequency Measurement Development Dept. C&M Business HQ. Motoaki Sugimoto 1. Abstract From digital home electronics to automobiles, a boom has recently occurred in various

More information

Review of digital electronics. Storage units Sequential circuits Counters Shifters

Review of digital electronics. Storage units Sequential circuits Counters Shifters Review of digital electronics Storage units Sequential circuits ounters Shifters ounting in Binary A counter can form the same pattern of 0 s and 1 s with logic levels. The first stage in the counter represents

More information

MSO-28 Oscilloscope, Logic Analyzer, Spectrum Analyzer

MSO-28 Oscilloscope, Logic Analyzer, Spectrum Analyzer Link Instruments Innovative Test & Measurement solutions since 1986 Store Support Oscilloscopes Logic Analyzers Pattern Generators Accessories MSO-28 Oscilloscope, Logic Analyzer, Spectrum Analyzer $ The

More information

Reference. TDS7000 Series Digital Phosphor Oscilloscopes

Reference. TDS7000 Series Digital Phosphor Oscilloscopes Reference TDS7000 Series Digital Phosphor Oscilloscopes 07-070-00 0707000 To Use the Front Panel You can use the dedicated, front-panel knobs and buttons to do the most common operations. Turn INTENSITY

More information

Hello, and welcome to this presentation of the STM32 Serial Audio Interface. I will present the features of this interface, which is used to connect

Hello, and welcome to this presentation of the STM32 Serial Audio Interface. I will present the features of this interface, which is used to connect Hello, and welcome to this presentation of the STM32 Serial Audio Interface. I will present the features of this interface, which is used to connect external audio devices 1 The Serial Audio Interface

More information

Manchester and NRZ Configurable Protocol Decode

Manchester and NRZ Configurable Protocol Decode Manchester and NRZ Configurable Protocol Decode Key Features User definable protocol decoding of Manchester and NRZ encoded buses Flexible decoding of buses with bit rates up to 60 Gb/s Configurable word

More information

Powerful Software Tools and Methods to Accelerate Test Program Development A Test Systems Strategies, Inc. (TSSI) White Paper.

Powerful Software Tools and Methods to Accelerate Test Program Development A Test Systems Strategies, Inc. (TSSI) White Paper. Powerful Software Tools and Methods to Accelerate Test Program Development A Test Systems Strategies, Inc. (TSSI) White Paper Abstract Test costs have now risen to as much as 50 percent of the total manufacturing

More information

980 Protocol Analyzer General Presentation. Quantum Data Inc Big Timber Road Elgin, IL USA Phone: (847)

980 Protocol Analyzer General Presentation. Quantum Data Inc Big Timber Road Elgin, IL USA Phone: (847) 980 Protocol Analyzer General Presentation 980 Protocol Analyzer For HDMI 1.4a & MHL Sources Key Features and Benefits Two 980 products offered: Gen 2 provides full visibility into HDMI protocol, timing,

More information

RF4432F27 wireless transceiver module

RF4432F27 wireless transceiver module RF4432F27 wireless transceiver module 1. Description RF4432F27 is 500mW RF module embedded with amplifier and LNA circuit. High quality of component, tightened inspection and long term test make this module

More information

PCIe: EYE DIAGRAM ANALYSIS IN HYPERLYNX

PCIe: EYE DIAGRAM ANALYSIS IN HYPERLYNX PCIe: EYE DIAGRAM ANALYSIS IN HYPERLYNX w w w. m e n t o r. c o m PCIe: Eye Diagram Analysis in HyperLynx PCI Express Tutorial This PCI Express tutorial will walk you through time-domain eye diagram analysis

More information

CAN, LIN and FlexRay Protocol Triggering and Decode for Infiniium 9000A and 9000 H-Series Oscilloscopes

CAN, LIN and FlexRay Protocol Triggering and Decode for Infiniium 9000A and 9000 H-Series Oscilloscopes CAN, LIN and FlexRay Protocol Triggering and Decode for Infiniium 9000A and 9000 H-Series Oscilloscopes Data sheet This application is available in the following license variations. Order N8803B for a

More information

EXPERIMENT #6 DIGITAL BASICS

EXPERIMENT #6 DIGITAL BASICS EXPERIMENT #6 DIGITL SICS Digital electronics is based on the binary number system. Instead of having signals which can vary continuously as in analog circuits, digital signals are characterized by only

More information

Technical Article MS-2714

Technical Article MS-2714 . MS-2714 Understanding s in the JESD204B Specification A High Speed ADC Perspective by Jonathan Harris, applications engineer, Analog Devices, Inc. INTRODUCTION As high speed ADCs move into the GSPS range,

More information

Agilent I 2 C Debugging

Agilent I 2 C Debugging 546D Agilent I C Debugging Application Note1351 With embedded systems shrinking, I C (Inter-integrated Circuit) protocol is being utilized as the communication channel of choice because it only needs two

More information

More on Flip-Flops Digital Design and Computer Architecture: ARM Edition 2015 Chapter 3 <98> 98

More on Flip-Flops Digital Design and Computer Architecture: ARM Edition 2015 Chapter 3 <98> 98 More on Flip-Flops Digital Design and Computer Architecture: ARM Edition 2015 Chapter 3 98 Review: Bit Storage SR latch S (set) Q R (reset) Level-sensitive SR latch S S1 C R R1 Q D C S R D latch Q

More information

Pivoting Object Tracking System

Pivoting Object Tracking System Pivoting Object Tracking System [CSEE 4840 Project Design - March 2009] Damian Ancukiewicz Applied Physics and Applied Mathematics Department da2260@columbia.edu Jinglin Shen Electrical Engineering Department

More information

Mixing in the Box A detailed look at some of the myths and legends surrounding Pro Tools' mix bus.

Mixing in the Box A detailed look at some of the myths and legends surrounding Pro Tools' mix bus. From the DigiZine online magazine at www.digidesign.com Tech Talk 4.1.2003 Mixing in the Box A detailed look at some of the myths and legends surrounding Pro Tools' mix bus. By Stan Cotey Introduction

More information

Logic Design. Flip Flops, Registers and Counters

Logic Design. Flip Flops, Registers and Counters Logic Design Flip Flops, Registers and Counters Introduction Combinational circuits: value of each output depends only on the values of inputs Sequential Circuits: values of outputs depend on inputs and

More information

RF (Wireless) Fundamentals 1- Day Seminar

RF (Wireless) Fundamentals 1- Day Seminar RF (Wireless) Fundamentals 1- Day Seminar In addition to testing Digital, Mixed Signal, and Memory circuitry many Test and Product Engineers are now faced with additional challenges: RF, Microwave and

More information

Full Disclosure Monitoring

Full Disclosure Monitoring Full Disclosure Monitoring Power Quality Application Note Full Disclosure monitoring is the ability to measure all aspects of power quality, on every voltage cycle, and record them in appropriate detail

More information

Broadcast Television Measurements

Broadcast Television Measurements Broadcast Television Measurements Data Sheet Broadcast Transmitter Testing with the Agilent 85724A and 8590E-Series Spectrum Analyzers RF and Video Measurements... at the Touch of a Button Installing,

More information

Logic Devices for Interfacing, The 8085 MPU Lecture 4

Logic Devices for Interfacing, The 8085 MPU Lecture 4 Logic Devices for Interfacing, The 8085 MPU Lecture 4 1 Logic Devices for Interfacing Tri-State devices Buffer Bidirectional Buffer Decoder Encoder D Flip Flop :Latch and Clocked 2 Tri-state Logic Outputs

More information

Exercise 2-1. External Call Answering and Termination EXERCISE OBJECTIVE

Exercise 2-1. External Call Answering and Termination EXERCISE OBJECTIVE Exercise 2-1 External Call Answering and Termination EXERCISE OBJECTIVE When you have completed this exercise, you will be able to describe and explain the complete sequence of events that occurs in the

More information

Keysight Technologies CAN/LIN Measurements (Option AMS) for InfiniiVision Series Oscilloscopes

Keysight Technologies CAN/LIN Measurements (Option AMS) for InfiniiVision Series Oscilloscopes Ihr Spezialist für Mess- und Prüfgeräte Keysight Technologies CAN/LIN Measurements (Option AMS) for InfiniiVision Series Oscilloscopes Data Sheet Introduction Debug the signal integrity of your CAN and

More information

Project 6: Latches and flip-flops

Project 6: Latches and flip-flops Project 6: Latches and flip-flops Yuan Ze University epartment of Computer Engineering and Science Copyright by Rung-Bin Lin, 1999 All rights reserved ate out: 06/5/2003 ate due: 06/25/2003 Purpose: This

More information