Layers of Innovation: How Signal Chain Innovations are Creating Analog Opportunities in a Digital World

Similar documents
Sharif University of Technology. SoC: Introduction

System Quality Indicators

«Trends in high speed, low power Analog to Digital converters»

SoC IC Basics. COE838: Systems on Chip Design

RFSOI and FDSOI enabling smarter and IoT applications. Kirk Ouellette Digital Products Group STMicroelectronics

24. Scaling, Economics, SOI Technology

25.5 A Zero-Crossing Based 8b, 200MS/s Pipelined ADC

PICOSECOND TIMING USING FAST ANALOG SAMPLING

DT9857E. Key Features: Dynamic Signal Analyzer for Sound and Vibration Analysis Expandable to 64 Channels

EECS150 - Digital Design Lecture 2 - CMOS

High Performance TFT LCD Driver ICs for Large-Size Displays

Techniques for Extending Real-Time Oscilloscope Bandwidth

nmos transistor Basics of VLSI Design and Test Solution: CMOS pmos transistor CMOS Inverter First-Order DC Analysis CMOS Inverter: Transient Response

Performance Modeling and Noise Reduction in VLSI Packaging

RFI MITIGATING RECEIVER BACK-END FOR RADIOMETERS

S op o e p C on o t n rol o s L arni n n i g n g O bj b e j ctiv i e v s

Data Converter Overview: DACs and ADCs. Dr. Paul Hasler and Dr. Philip Allen

DESIGN OF EFFICIENT SHIFT REGISTERS USING PULSED LATCHES

Future of Analog Design and Upcoming Challenges in Nanometer CMOS

Digital Integrated Circuits EECS 312. Review. Remember the ENIAC? IC ENIAC. Trend for one company. First microprocessor

Digital Integrated Circuits EECS 312

Introduction to Data Conversion and Processing

ADC Peripheral in Microcontrollers. Petr Cesak, Jan Fischer, Jaroslav Roztocil

Solid State Modulators for X-Band Accelerators

Adding Analog and Mixed Signal Concerns to a Digital VLSI Course

Semiconductor Devices. Microwave Application Products. Microwave Tubes and Radar Components

VLSI Design: 3) Explain the various MOSFET Capacitances & their significance. 4) Draw a CMOS Inverter. Explain its transfer characteristics

SEMICONDUCTOR TECHNOLOGY -CMOS-

Semiconductors Displays Semiconductor Manufacturing and Inspection Equipment Scientific Instruments

GHz Sampling Design Challenge

Instrumentation Grade RF & Microwave Subsystems

EE262: Integrated Analog Circuit Design

MMI: A General Narrow Interface for Memory Devices

Digital Fundamentals. Introduction to Digital Signal Processing

SEMICONDUCTOR TECHNOLOGY -CMOS-

ThinkRF D GHz RF Downconverter

100Gb/s Single-lane SERDES Discussion. Phil Sun, Credo Semiconductor IEEE New Ethernet Applications Ad Hoc May 24, 2017

DT8837. High Performance Ethernet Instrument Module for Sound & Vibration. Overview. Key Features

3D-CHIP TECHNOLOGY AND APPLICATIONS OF MINIATURIZATION

Modifying the Scan Chains in Sequential Circuit to Reduce Leakage Current

Leakage Current Reduction in Sequential Circuits by Modifying the Scan Chains

Dac3 White Paper. These Dac3 goals where to be achieved through the application and use of optimum solutions for:

Integrated Circuit Design ELCT 701 (Winter 2017) Lecture 1: Introduction

A MISSILE INSTRUMENTATION ENCODER

A FOUR GAIN READOUT INTEGRATED CIRCUIT : FRIC 96_1

Innovations in PON Cost Reduction

Vision Standards Bring Sharper View to Medical Imaging

data and is used in digital networks and storage devices. CRC s are easy to implement in binary

Smart. Connected. Energy-Friendly.

VGA & Stereo Audio CAT5 Extender With Chainable Output ITEM NO.: VE10DAL, VE02ALR, VE02DALS

Future of TV. Features and Benefits

ECE 4/517 MIXED SIGNAL IC DESIGN LECTURE 1 SLIDES. Vishal Saxena (vsaxena AT uidaho DOT edu) AMPIC Laboratory University of Idaho

EMI/EMC diagnostic and debugging

Considerations for Specifying, Installing and Interfacing Rotary Incremental Optical Encoders

VLSI Chip Design Project TSEK06

Practical considerations of accelerometer noise. Endevco technical paper 324

Brief Description of Circuit Functions

MAX11503 BUFFER. Σ +6dB BUFFER GND *REMOVE AND SHORT FOR DC-COUPLED OPERATION

Designing for the Internet of Things with Cadence PSpice A/D Technology

4x1 HDTV Switcher. Operation Manual. Y YPb Model: YPbPrSW-4P

Digital Representation

Advanced Techniques for Spurious Measurements with R&S FSW-K50 White Paper

Innovative Fast Timing Design

UNIIQA+ NBASE-T Monochrome CMOS LINE SCAN CAMERA

SIDC-6005 MICROWAVE WIDEBAND DOWNCONVERTER / TUNER UP TO

LOW POWER DIGITAL EQUALIZATION FOR HIGH SPEED SERDES. Masum Hossain University of Alberta

An Introduction to VLSI (Very Large Scale Integrated) Circuit Design

Combining Dual-Supply, Dual-Threshold and Transistor Sizing for Power Reduction

Samsung VTU11A0 Timing Controller

How advances in digitizer technologies improve measurement accuracy

De-embedding Techniques For Passive Components Implemented on a 0.25 µm Digital CMOS Process

In support of 3.5 db Extinction Ratio for 200GBASE-DR4 and 400GBASE-DR4

Digital Strobe Tuner. w/ On stage Display

A pixel chip for tracking in ALICE and particle identification in LHCb

Design Brief - I35 and I35 DAC Stereo Integrated Amplifier

OV µm Pixel Size Back Side Illuminated (BSI) 5 Megapixel CMOS Image Sensor

Comparing Ethernet and SerDes in ADAS Applications

January 24, Dr. Lakshman One School of Engineering Science Simon Fraser University Burnaby, BC, V5A 1S6

006 Dual Divider. Two clock/frequency dividers with reset

4x1 HDTV Switcher. Operation Manual CHDD-41AR

Trigger synchronization and phase coherent in high speed multi-channels data acquisition system

Overview of All Pixel Circuits for Active Matrix Organic Light Emitting Diode (AMOLED)

Through Silicon Via Testing Known Good Die (KGD) or Probably Good Die (PGD) Doug Lefever Advantest

Designing VeSFET-based ICs with CMOS-oriented EDA Infrastructure

SingMai Electronics SM06. Advanced Composite Video Interface: HD-SDI to acvi converter module. User Manual. Revision 0.

12-bit Wallace Tree Multiplier CMPEN 411 Final Report Matthew Poremba 5/1/2009

EE C247B ME C218 Introduction to MEMS Design Spring 2017

INTERNATIONAL JOURNAL OF PURE AND APPLIED RESEARCH IN ENGINEERING AND TECHNOLOGY

Critical Benefits of Cooled DFB Lasers for RF over Fiber Optics Transmission Provided by OPTICAL ZONU CORPORATION

Area Efficient Pulsed Clock Generator Using Pulsed Latch Shift Register

RX40_V1_0 Measurement Report F.Faccio

ECE Circuits Curriculum

Analog, Mixed-Signal, and Radio-Frequency (RF) Electronic Design Laboratory. Electrical and Computer Engineering Department UNC Charlotte

Layout Analysis Analog Block

J R Sky, Inc. Cross-Modulation Distortion Analyzer

Politecnico di Torino HIGH SPEED AND HIGH PRECISION ANALOG TO DIGITAL CONVERTER. Professor : Del Corso Mahshid Hooshmand ID Student Number:

Enabling Analog Integration. Paul Kempf

Why Use the Cypress PSoC?

Microwave Laboratory

DT9837 Series. High Performance, USB Powered Modules for Sound & Vibration Analysis. Key Features:

Transcription:

The World Leader in High Performance Signal Processing Solutions Layers of Innovation: How Signal Chain Innovations are Creating Analog Opportunities in a Digital World Dave Robertson-- VP of Analog Technology

Moore s Law and Technology Progression The OVERSIMPLIFIED Story: A steady advance in lithography that drives exponentially greater density, lower cost, lower power, higher speeds, and higher levels of integration. 2

Moore s Law and Technology Progression The OVERSIMPLIFIED Story: A steady advance in lithography that drives exponentially greater density, lower cost, lower power, higher speeds, and higher levels of integration. The REAL Story: Evolutionary and Revolutionary innovation across many dimensions that has pushed, pulled, and bounced our industry forward. 3

Layers of Innovation in the Semiconductor Industry 4

Application/Necessity Driven Innovation PULL 5

Technology/Capability Driven Innovation PULL PUSH 6

The Evolution of Signal Processing Functions Unobserved Sensed/Observed Measured Analyzed Controlled Mechanical Electrical (analog) Electronic (solid state analog) Electronic (fixed function digital) Software 7

Innovation Drives an Expanding Universe 8

New Sensor/Actuator Technologies Drive Entirely New Signal Chains Application Signal Chain New Sensor Architecture Circuit Wafer Fabrication/Device Examples: Accelerometers, Gyros, Gas Sensors, Optics 9 New Application drives new signal chains, architectures, circuits

A Shift in Signal Processing Emphasis? The First 150 years: The primary challenge is to extract the signal from the background noise. The New Era: Increasingly, the challenge is to extract the signal from dense traffic of other signals, or interferers. 10

Advances In Signal Processing: Enlarging Shannon s Box Largest Captureable Signal The Ceiling Useable Signal Bandwidth Effective Dynamic Range The Walls Smallest Detectable Signal The Floor 11

Signal Chain Requirements call for Higher Performance Innovations in Circuits and Architecture enable entirely new Signal Chains 12

Application Requirements for Dynamic Range and Bandwidth Speed 10000 10GHz 1000 1GHz 100 100MHz 10 10MHz 1 1MHz 0.1 100kHz 0.01 10kHz 0 001 Precision in Parts per Unit 100 1,000 10,000 100,000 1,000,000 10M SONET Flat Panel Digital Oscilloscope DVC DVD Video Radar Distance/ Level Monitor & Control Cable TV Ultrasound Auto Radar Spectrum Analyzer Digital Camera DSL Motor Control Defense/Aero Comms Building Automation Wireless Infrastructure Digital X-Ray Industrial Automation DVD Audio Precision Optics Bio Instruments Process Control Precision PLC/DCS Measurement 1kHz 6 8 10 12 14 16 18 20 22 24 Bits of Resolution MRI CT Patient Monitoring Water Analysis Weigh Scale 13

Architectures: Dynamic Range and Bandwidth (Data Converter Example) 10000 10GHz 1000 1GHz 100 100MHz Precision in Parts per Unit 1,000 10,000 100,000 1,000,000 10M Up to 40 GHz Flash / Folding Interleaved Pipeline Speed 10 10MHz 1 1MHz 0.1 100kHz SAR Sigma Delta 0.01 10kHz 0001 1kHz 6 8 10 12 14 16 18 20 22 24 Bits of Resolution 14

15 Reflecting on Some Trends...

Analog gets cheaper over time 16

Analog gets cheaper over time but digital gets cheaper faster! 17

Signal Chain Trend: Move Converter Closer to the Source As converter moves towards the antenna, analog signal processing is replaced by digital LO #1 (TUNED) LO #2 FIXED DETECT BROADBAND NARROWBAND But the remaining analog/mixed signal processing gets significantly more challenging 18

Wireless Infrastructure Example: Converting More Spectrum and More Channels 13-Bits 270 KSPS Performance 1990 2000 2010 19

Converting More Spectrum and More Channels 14-Bits 125 MSPS Performance 1990 2000 2010 20

Converting More Spectrum and More Channels 14-Bits 16-Bits 125 250 MSPS Performance 1990 2000 2010 21

Audio Recording, Mastering, Playback, Distribution, Sales from Analog to Digital 22

Going Digital Replacement Technology drives Entirely New Applications/Business Models Ultimately: Creating whole new applications Initially: Replace Analog with Digital 23

Going Digital Replacement Technology drives Entirely New Applications/Business Models Initially: Replace Analog with Digital There is more Analog in the Digital world than there was in the old Analog World Ultimately: Creating whole new applications 24

25 Moore s Law...

Process Innovation as a Driving Force PUSH 26

ITRS Roadmap Overview 27 2007 ITRS

Deep Submicron Challenges for Analog (Moore s Law is Not Universal... ) Reduced Supply Voltages (and signal swings)* Reduced Gain of the transistors ** Leakage Currents in OFF devices Gate Leakage currents Increased 1/f noise In most cases, the analog circuits do not scale as aggressively as digital: cost per function may actually go up. In SNR limited circuits, Capacitance must scale with signal voltage SQUARED, so reduced signal swings may actually lead to an INCREASE in power consumption. 28 2007 Nikkei Electronics Seminar

The Constraints of Deep Submicron Technology Drive Innovation at the Circuit, Architecture and Signal Chain Levels... Parallelism Digitally Assisted Analog Oversampling CT Sigma Delta Interleaving Differential Symmetric Low Headroom Amps Sub-threshold Design 29

30 Integration...

Benefits of Integration REWARD Smaller Size Save Package Pins (money) Save Interface Overhead: Area Save Interface Overhead: Power Save Interface Overhead: Speed Allows System Optimization Has become one of the most compelling (perhaps irresistible?) forces in our industry...

But These Benefits May Come at a Price... REWARD Smaller Size Save Package Pins (money) Save Interface Overhead: Area Save Interface Overhead: Power Save Interface Overhead: Speed Allows System Optimization Penalty Can no longer independently optimize process selection Greater potential for interference between blocks Increases IC complexity: power supplies Increases IC complexity: schedule Increases IC complexity: risk Increase Verification/Test Complexity May encounter power density issues A thoughtful approach is necessary certain functions may be cheaper/better when not integrated: DRAM, POWER AMP...

Key Issues for Optimum Integration Process Technology: which functions can be realized on which technology Interfaces: analog vs. digital, CMOS vs. LVDS vs. SERDES (bandwidth and dynamic range) Package and Board Technology: SoC vs SIP Power: Supply voltages Power Dissipation Risk: Time to Market Market Dynamics: Market size and Life Cycle

Summary There are MANY Driving Forces of Innovation in the Semiconductor Industry Innovation in the Different Levels, or Layers is Often Interconnected: a Dance of Push and Pull Forces As Signal Chains Go Digital, the Mixed Signal Functions Become More Challenging Moore s Law and Integration Remain Very Important Drivers in Our Industry, But SOC Integration is Not the Right Answer to All Problems 34