STEVAL-ILL0V Digital constant-current controller for LED driving based on the STM8S08x Data brief Features DC input voltage: 48 V Buck stage adapts output voltage to drive LEDs with selected current Four DC-DC buck converters allow driving of 4 LED strings, managing up to 0 W Employs W LEDs to obtain 0 W-per-string (0 LEDs in series in each string) Low voltage-sensing circuitry Logic level MOSFETs driven by the microcontroller without gate driver (ground referred) High efficiency (up to 98%) RoHS compliant STEVAL-ILL0V Description The purpose of the STEVAL-ILL0V demonstration board is to present a new digital approach to performing real average current control on an LED streetlighting platform. This LED streetlight platform is developed on a DC-DC inverse buck converter, taking advantage of power switch control and conditioning signal circuitry for current sensing. Benefits of this design include low energy consumption, low maintenance, and reduced size and weight. The solution is customized for streetlighting applications, but can be extended to many other segments. November 00 Doc ID 77 Rev /6 For further information contact your local STMicroelectronics sales office. www.st.com 6
Schematic diagrams STEVAL-ILL0V Schematic diagrams Figure. Control stage schematic ( of ) C8 00nF C 00nF C4 0pF J9 4 Comm Connector 4MHz C6 0pF X PA4 UART_RX PA5 UART_TX M R4 R5 68R TIM_CH C5 80pF RESET# OSC IN OSC OUT TIM_CH J0 CON4A 4 Enable_ Enable_ JOY_LEFT JOY_RIGHT JOY_UP JOY_DOWN PWM-FirstString PWM-SecondString PWM-ThirdString PWM4-FourthString 4k7 R8 R6 0 R7 0 470nF PWM-PC PWM-PC PWM-PC PWM4-PC4 C7 PB4_JOYSTICK_LEFT PB5_JOYSTICK_RIGHT PB6_JOYSTICK_UP PB7_JOYSTICK_DOWN PC6_MOSI SPI_MOSI_LCD 4 R RESET# 0 J PD_Swim PD/TIM_CH/[TIM_CH] Swim Connector JOY_SEL PD7_JOYSTICK_SEL L5 _VDDA VDDA BEAD C0 0uF C 0nF R 0K 9 0 6 0 9 8 7 6 5 4 4 5 6 7 8 4 4 57 58 59 60 6 6 6 64 40 9 0 9 8 7 5 4 SW reset U NRST PA/OSCIN PA/OSCOUT PA/TIM_CH/[TIM_CH] PA4/UART_RX PA5/UART_TX PA6/UART_CK VCAP PB0/AIN0/[TIM_CHN] PB/AIN/[TIM_CHN] PB/AIN/[TIM_CHN] PB/AIN/[TIM_ETR] PB4/AIN4/[I C_SCL] PB5/AIN5/[I C_SDA] PB6/AIN6 PB7/AIN7 PC/TIM_CH PC/TIM_CH PC/TIM_CH PC4/TIM_CH4 PC5/SPI_SCK PC6/SPI_MOSI PC7/SPI_MISO PD0/TIM_CH/[TIM_BKIN]/[ CLK_CCO] PD/SWIM PD/TIM_CH/[ADC_ETR] PD4/TIM_CH/[BEEP] PD5/UART_TX PD6/UART_RX PD7/TLI/[TIM_CH4] VDDIO_ VDDIO_ VDD VDDA VSS VSSA VSSIO_ VSSIO_ STM8S08RB PE0/CLK_CCO PE(T)/IC_SCL PE(T)/IC_SDA PE/TIM_BKIN PE4 PE5/SPI_NSS PE6/AIN9 PE7/AIN8 56 55 54 5 5 PF0/AIN0 PF/AIN PF4/AIN PF5/AIN PF6/AIN4 PF7/AIN5 7 6 5 4 PG0/CAN_TX 4 PG/CAN_RX 44 PG PG PG4 PG5 PG6 PG7 45 46 47 49 50 5 PI0 48 8 Vref + Vref - PE6-Ch9-SecondString PE7-Ch8-FirstString Sensing-SecondString Sensing-First String PF0-Ch0-ThirdString PF-Ch-FourthString PF4-Ch-Dimming 4k7 R0 4k7 R 4k7 R Sensing-ThirdString Sensing-FourthString Dimming R9 0R C9 uf PG0_LCD_CS Enable FirstString Enable SecondString Enable ThirdString Enable FourthString LCD_CS PG PG PG R4k R5k R7k R6k _VDDA Vref + R9 0R R0 0R D5 D6 D7 D8 R8 k P 0k GND /6 Doc ID 77 Rev
STEVAL-ILL0V Schematic diagrams Figure. Control stage schematic ( of ) Doc ID 77 Rev /6
Schematic diagrams STEVAL-ILL0V Figure. Power stage schematic 4/6 Doc ID 77 Rev
STEVAL-ILL0V Revision history Revision history Table. Document revision history Date Revision Changes -Apr-00 Initial release. -Nov-00 Changed board photo on coverpage Divided control stage schematic diagram into two figures (Figure and Figure ) to improve readability Added Figure : Power stage schematic Doc ID 77 Rev 5/6
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