Is Now Part of To learn more about ON Semiconductor, please visit our website at www.onsemi.com ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor omponents Industries, LL dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. listing of ON Semiconductor s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent-marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. uyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. Typical parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. ll operating parameters, including Typicals must be validated for each customer application by customer s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FD lass medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should uyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, uyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/ffirmative ction Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
74UPG97 TinyLogic Low Power Universal onfigurable Two-Input Logic Gate Features 0.8 to. Supply Operation. Over-oltage Tolerant I/Os at from 0.8 to. High Speed tpd -.ns: Typical at. Power-Off High-Impedance Inputs and Outputs Low Static Power onsumption - I =0.9µ Maximum Low Dynamic Power onsumption - PD=.pF Typical at. Ultra-Small MicroPak Packages Ordering Information Description October 00 The 74UPG97 is a universal configurable -input logic gate that provides a high performance and low power solution ideal for battery-powered portable applications. This product is designed for a wide low voltage operating range (0.8 to.) and guarantees very low static and dynamic power consumption across the entire voltage range. ll inputs are implemented with hysteresis to allow for slower transition input signals and better switching noise immunity. The 74UPG97 provides for multiple functions as determined by various configurations of the three inputs. The potential logic functions provided are MUX, ND, OR, NND, and NOR, inverter and buffer. Refer to Figures to 9. Part Number Top Mark Package Packing Method 74UPG97LX D -Lead MicroPak,.0mm Wide 74UPG97FHX D -Lead, MicroPak, xmm ody,.mm Pitch 000 Units on Tape & Reel 000 Units on Tape & Reel 74UPG97 TinyLogic Low Power Universal onfigurable Two-Input Logic Gate 008 Fairchild Semiconductor orporation www.fairchildsemi.com 74UPG97.0.
Logic Diagram Pin onfigurations Pin Definitions 4 Figure. Logic Diagram (Positive Logic) 4 Figure. MicroPak (Top Through iew) Pin # Name Description Data Input Ground Data Input 4 Output Supply oltage Data Input 74UPG97 TinyLogic Low Power Universal onfigurable Two-Input Logic Gate 008 Fairchild Semiconductor orporation www.fairchildsemi.com 74UPG97.0.
Function Table Inputs 74UPG97 =Output L L L L L L H L L H L H L H H H H L L L H L H H H H L L H H H H H = HIGH Logic Level L = LOW Logic Level Function Selection Table -Input Logic Function onnection onfiguration -to- MUX Figure -Input ND Gate Figure 4 -Input OR Gate with One Inverted Input Figure -Input NND Gate with One Inverted Input Figure -Input ND Gate with One Inverted Input Figure -Input NOR Gate with One Inverted Input Figure -Input OR Gate Figure 7 Inverter Figure 8 uffer Figure 9 74UPG97 TinyLogic Low Power Universal onfigurable Two-Input Logic Gate 008 Fairchild Semiconductor orporation www.fairchildsemi.com 74UPG97.0.
74UPG97 Logic onfigurations Figure through Figure 9 show the logical functions that can be implemented using the 74UPG97. The diagrams show the DeMorgan s equivalent logic duals for a given two-input function. The logical Note:. When is L, =.. When is H, =. 4 implementation is next to the board-level physical implementation of how the pins of the function should be connected. Figure. -to- MUX Figure 4. -Input ND Gate 4 Figure. Input OR Gate with One Inverted Input -Input NND Gate with One Inverted Input 4 Figure. 4 4 -Input ND Gate with One Inverted Input -Input NOR Gate with One Inverted Input 4 74UPG97 TinyLogic Low Power Universal onfigurable Two-Input Logic Gate Figure 7. -Input OR Gate Figure 8. Inverter 4 Figure 9. uffer 008 Fairchild Semiconductor orporation www.fairchildsemi.com 74UPG97.0. 4
bsolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter Min. Max. Unit Supply oltage -0. 4. IN D Input oltage -0. 4. OUT D Output oltage HIGH or LOW State () -0. + 0. =0-0. 4. I IK D Input Diode urrent IN < 0-0 m I OK D Output Diode urrent OUT < 0-0 OUT > +0 I OH / I OL D Output Source / Sink urrent ±0 m I O ontinuous Output urrent ±0 m I or I D or Ground urrent per Supply Pin ±0 m T STG Storage Temperature Range - +0 T J Junction Temperature Under ias +0 T L Junction Lead Temperature, Soldering 0s +0 P D ESD Power Dissipation at +8 MicroPak- 0 MicroPak- 0 Human ody Model, JEDE:JESD-4 000+ harged Device Model, JEDE:JESD-0 00 Note:. I O absolute maximum rating must be observed. Recommended Operating onditions (4) The Recommended Operating onditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to bsolute Maximum Ratings. Symbol Parameter onditions Min. Max. Unit Supply oltage 0.8. IN Input oltage 0. OUT I OH/I OL Output oltage Output urrent =0 0. HIGH or LOW State 0 =.0 to. ±4.0 =. to.7 ±. =. to.9 ±.9 =.4 to. ±.7 =. to. ±. m mw =0.8 ±0.0 µ T Operating Temperature, Free ir -40 +8 θ J Thermal Resistance MicroPak- 00 MicroPak- 0 Note: 4. Unused inputs must be held HIGH or LOW. They may not float. m /W 74UPG97 TinyLogic Low Power Universal onfigurable Two-Input Logic Gate 008 Fairchild Semiconductor orporation www.fairchildsemi.com 74UPG97.0.
D Electrical haracteristics Symbol Parameter onditions P N H OH OL I IN I OFF ΔI OFF I ΔI Positive Threshold oltage Negative Threshold oltage Hysteresis oltage HIGH Level Output oltage LOW Level Output oltage Input Leakage urrent Power Off Leakage urrent dditional Power Off Leakage urrent Quiescent Supply urrent Increase in I per Input T =+ T =-40 to +8 Min. Max. Min. Max. 0.80 0.0 0.0 0.0 0.0.0 0. 0.90 0. 0.90.40 0.74. 0.74.. 0.9.9 0.9.9.0.7.77.7.77.00.88.9.88.9 0.80 0.0 0.0 0.0 0.0.0 0. 0. 0. 0..40 0.9 0.7 0.9 0.7. 0.47 0.84 0.47 0.84.0 0.9.04 0.9.04.00 0.88.4 0.88.4 0.80 0.07 0.0 0.07 0.0.0 0.08 0.4 0.08 0.4.40 0.8 0. 0.8 0.. 0.7 0. 0.7 0..0 0. 0.9 0. 0.9.00 0.79. 0.79. 0.80.0 I OH=-0µ -0. -0..0.0 I OH=-.m 0.7 x 0.70 x.40.0 I OH=-.7m..0..9 I OH=-.9m..0.0.70.00.0 I OH=-.m.0.97 I OH=-.m.90.8 I OH=-.7m.7.7 I OH=-4.0m.0. 0.80.0 I OL=0µ 0.0 0.0.0.0 I OL=.m 0.0 x 0.0 x.40.0 I OL=.7m 0. 0.7..9 I OL=.9m 0. 0..0.70.70.0 I OL=.m 0. 0. I OL=.m 0.44 0.4 I OL=.7m 0. 0. I OL=4.0m 0.44 0.4 Units 0 to. 0 IN. ±0. ±0. µ 0 0 ( IN, O). 0. 0. µ 0 to 0. 0.8 to. IN or O = 0 to. IN - or 0. 0. µ 0. 0.9 IN. ±0.9. IN = -0. 40.0 0.0 µ µ 74UPG97 TinyLogic Low Power Universal onfigurable Two-Input Logic Gate 008 Fairchild Semiconductor orporation www.fairchildsemi.com 74UPG97.0.
Electrical haracteristics Symbol Parameter onditions t PHL, t PLH IN OUT PD Propagation Delay Input apacitance Output apacitance Power Dissipation apacitance 0.80 T =+ Min. Typ. Max Min Max..0.0.8 8....0.40.0.. 7.. 8. L=pF, R L=MΩ..9. 4...0.8.0.70.9. 4.8.7..00.0...9. 4. 0.80 9.4.0.0. 9.4 4..9 4.9.40.0 L=0pF,.. 8.7.8 9.4..9 R L=MΩ. 4.9 7.0. 7.8.0.70.0 4....9.00.0.9. 4..7 4.9 0.80..0.0. 9..0..7.40.0 L=pF,.9. 9.. 0.4..9 R L=MΩ.4.4 7.8. 8.7.0.70. 4.7.8...00.0.0 4.0..8. 0.80..0.0.4 9. 8..4 9.0.40.0 L=0pF, R L=MΩ..9 0...0..9.8 4.8 8.7.8 9..0.70.7.7..7 7..00.0..... T =-40 to +8 Units Figure 0. pf 0,0 pf 0.80.7.0.0.8.40.0 IN=0 or,.8..9 f=0mhz.84.0.70..00.0. ns pf Figure 0 Figure 74UPG97 TinyLogic Low Power Universal onfigurable Two-Input Logic Gate 008 Fairchild Semiconductor orporation www.fairchildsemi.com 74UPG97.0. 7
Loadings and Waveforms Symbol Figure 0. Test ircuit Figure. Waveforms. ± 0.. ± 0..8 ± 0.. ± 0.0. ± 0.0 0.8 mi / / / / / / mo / / / / / / 74UPG97 TinyLogic Low Power Universal onfigurable Two-Input Logic Gate 008 Fairchild Semiconductor orporation www.fairchildsemi.com 74UPG97.0. 8
Physical Dimensions X Notes: 0.0 PIN IDENTIFIER 0.0 DETIL (0.0) X 0.MX.4 (0.4) TOP IEW.0 0. OTTOM IEW X 0.0.00 0.0 0.00 0. 0.. ONFORMS TO JEDE STNDRD M0- RITION UD. DIMENSIONS RE IN MILLIMETERS. DRWING ONFORMS TO SME 4.M-994 4. FILENME ND REISION: M0RE4. PIN ONE IDENTIFIER IS X LENGTH OF N OTHER LINE IN THE MRK ODE LOUT. Figure. -Lead, MicroPak,.0mm Wide X 0. 0. 0.40 0.0 0.0 (0.49) X (0.) X PIN 0.0 0.0 X X (0.) 4X 0.07 X 4 HMFER () (0.0) X REOMMENED LND PTTERN 0.0 0.00 X 0.40 0.0 (0.7) 0.4 0. DETIL PIN TERMINL Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. 74UPG97 TinyLogic Low Power Universal onfigurable Two-Input Logic Gate lways visit Fairchild Semiconductor s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. Tape and Reel Specifications Please visit Fairchild Semiconductor s online packaging area for the most recent tape and reel specifications: http://www.fairchildsemi.com/products/logic/pdf/micropak_tr.pdf. Package Designator Tape Section avity Number avity Status over Type Status LX Leader (Start End) (Typical) Empty Sealed arrier 000 Filled Sealed Trailer (Hub End) 7 (Typical) Empty Sealed 008 Fairchild Semiconductor orporation www.fairchildsemi.com 74UPG97.0. 9
Physical Dimensions X NOTES: 0.0 PIN MIN 0uM X 0. 0. (0.08) 4X DETIL 0..00 TOP IEW SIDE IEW 4 OTTOM IEW.00. OMPLIES TO JEDE MO- STNDRD. DIMENSIONS RE IN MILLIMETERS.. DIMENSIONS ND TOLERNES PER SME 4.M, 994 D. LNDPTTERN REOMMENDTION IS SED ON FS DESIGN. E. DRWING FILENME ND REISION: MGF0RE Figure. 0.MX 0.0 0.09 0.9 (0.08) 4X X 0.0 X 0.0 0.0.0 X 0.40 X 0.4 X 0. X 0.7 0.07X4 HMFER (0.0) X 0.89 0. X 0.9 0.0 X 0. REOMMENDED LND PTTERN FOR SPE ONSTRINED P 0.90 0. 0.7 LTERNTIE LND PTTERN FOR UNIERSL PPLITION 0.40 0.0 DETIL PIN LED SLE: X -Lead, MicroPak, xmm ody,.mm Pitch Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. 74UPG97 TinyLogic Low Power Universal onfigurable Two-Input Logic Gate lways visit Fairchild Semiconductor s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. Tape and Reel Specifications Please visit Fairchild Semiconductor s online packaging area for the most recent tape and reel specifications: http://www.fairchildsemi.com/packaging/micropk_l_tr.pdf. Package Designator Tape Section avity Number avity Status over Type Status FHX Leader (Start End) (Typical) Empty Sealed arrier 000 Filled Sealed Trailer (Hub End) 7 (Typical) Empty Sealed 008 Fairchild Semiconductor orporation www.fairchildsemi.com 74UPG97.0. 0
008 Fairchild Semiconductor orporation www.fairchildsemi.com 74UPG97.0. 74UPG97 TinyLogic Low Power Universal onfigurable Two-Input Logic Gate
ON Semiconductor and are trademarks of Semiconductor omponents Industries, LL dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. listing of ON Semiconductor s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. uyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. Typical parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. ll operating parameters, including Typicals must be validated for each customer application by customer s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FD lass medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should uyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, uyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/ffirmative ction Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PULITION ORDERING INFORMTION LITERTURE FULFILLMENT: Literature Distribution enter for ON Semiconductor 9 E. nd Pkwy, urora, olorado 800 US Phone: 0 7 7 or 800 44 80 Toll Free US/anada Fax: 0 7 7 or 800 44 87 Toll Free US/anada Email: orderlit@onsemi.com Semiconductor omponents Industries, LL N. merican Technical Support: 800 8 98 Toll Free US/anada Europe, Middle East and frica Technical Support: Phone: 4 790 90 Japan ustomer Focus enter Phone: 8 87 00 www.onsemi.com ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative www.onsemi.com
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