Analog to Digital Conversion

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Analog to Digital Conversion What the heck is analog to digital conversion? Why do we care?

Analog to Digital Conversion What the heck is analog to digital conversion? Why do we care? A means to convert an analog signal (i.e., sound, voltage, current, etc.) to a discrete representation Embedded systems work with discrete signals They have no idea the world is continuous!

Analog to Digital Conversion What's available on our device??

Analog to Digital Conversion What's available on our device?? A single ADC with 10-bit resolution

Analog to Digital Conversion What's available on our device?? A single ADC with 10-bit resolution 8 multiplexed channels We can't convert all 8 channels at once!

Analog to Digital Conversion What's available on our device?? A single ADC with 10-bit resolution 8 multiplexed channels We can't convert all 8 channels at once! Optional left adjustment results

Analog to Digital Conversion What's available on our device?? A single ADC with 10-bit resolution 8 multiplexed channels We can't convert all 8 channels at once! Optional left adjustment results Reference voltage: 0 Vcc (single input) Selectable 1.1V

Analog to Digital Conversion What modes and functional units are available??

Analog to Digital Conversion What modes and functional units are available?? Free running mode

Analog to Digital Conversion What modes and functional units are available?? Free running mode Single conversion mode

Analog to Digital Conversion What modes and functional units are available?? Free running mode Single conversion mode Interrupt on conversion complete

Analog to Digital Conversion What modes and functional units are available?? Free running mode Single conversion mode Interrupt on conversion complete Sleep mode noise cancellation

So what is all this ADC stuff about? Recall from your signals, DSP, or digital controls course! The world is analog (so are some of your sensors) Our computers are digital We need to convert the analog value to a digital representation How??? Lets look at an example using Matlab!

ADC Basic Principles! Ideal versus actuality In an ideal world, we would have infinite precision and could EXACTLY represent our analog input Ideally we have a straight line with slope 1

We don't live in a perfect world! We have a finite number of representations for each analog value Referred to as bins Assume we have 8 possibilities 3-bit resolution We see that the actual value intercepts the steps in the middle! Ideally we get +1/2 LSB res.

We don't live in a perfect world! LSB: Input voltage difference corresponding to a change in the Least Significant Bit of the output value This type of error is referred to as quantization error Present in ALL ADCs We can't fix it like we can other sources of error!

What other sources of error are there??? We will discuss several briefly! Offset error Gain error Differential nonlinearities Integral nonlinearities

Offset error Deviation of the actual ADC readings from the ideal input voltage (straight line approximation) An ADC value transition from 0 to 1 does NOT occur at the standard input value of ½ LSB Can compensate by subtracting out the offset!

Gain error Deviation of the last ADC output step's midpoint form the ideal straight line (AFTER compensating for offset error) Can compensate by scaling input values!

Nonlinearities Both differential and integral nonlinearities may exist MUCH more difficult to compensate for Usually polynomial fit or LUT

A note about errors! We can calibrate our ADC if we think it needs it Bottom line: When using single input mode (more later) Usually no calibration is needed as errors are typically around 1-2 LSB

What is this digital representation numerically? How exactly do we compute the digital value we need? This is a function of the reference voltage and resolution of the ADC Single ended conversions: ADC_val = Vin/Vref * 2^n 1 n = resolution (in bits) of the ADC

Lets look at these Issues in a numerical setting What issues persist when doing these conversions? Finite resolution! We can only differentiate between a predetermined change in voltage V_resolution = Vref/(2^n 1) For 5V and 10-bits: V_resolution = 5V/1023 = 4.88mV

Lets look at these Issues in a numerical setting What issues persist when doing these conversions? Finite resolution! We can only differentiate between a predetermined change in voltage V_resolution = Vref/(2^n 1) For 5V and 10-bits: V_resolution = 5V/1023 = 4.88mV You can NEVER make a more accurate measurement than 4.88mV

Lets look at these Issues in a numerical setting What issues persist when doing these conversions? Quantization: Recall: ADC_val = Vin/Vref * 2^n 1 Suppose: Vin = 2V, Vref = 5V, and n = 10-bits ADC_val = 2/5 * 1023 = 409.2

Lets look at these Issues in a numerical setting What issues persist when doing these conversions? Quantization: Recall: ADC_val = Vin/Vref * 2^n 1 Suppose: Vin = 2V, Vref = 5V, and n = 10-bits ADC_val = 2/5 * 1023 = 409.2 How do we represent 409.2 with a 10-bit number?

Lets look at these Issues in a numerical setting What issues persist when doing these conversions? Quantization: Recall: ADC_val = Vin/Vref * 2^n 1 Suppose: Vin = 2V, Vref = 5V, and n = 10-bits ADC_val = 2/5 * 1023 = 409.2 How do we represent 409.2 with a 10-bit number? We DON'T! The value gets rounded to the next LSB (recall the BEST we can do is +1/2 LSB accuracy)

So how exactly does the ADC work??? There is always some sort of sample and hold circuitry Can be a zero order, first order (or higher order) hold The circuitry involved can be as simple as a switch (transistor) and capacitor holding the input voltage (relatively) stable Although it is typically MUCH more complicated than this Regardless: The hold circuitry holds the input stable until a valid sample can be acquired!

How does the conversion happen? Once the input has been sampled: The AVR uses successive approximation This is equivalent to a binary search (draw diagram):

How does the conversion happen? Once the input has been sampled: The AVR uses successive approximation This is equivalent to a binary search (draw diagram): Sample and hold acquires the input sample An internal successive approximation register (SAR) is loaded such that its MSB is a digital 1 An internal DAC is then used to convert the SAR value to its analog equivalent This analog value is fed into a comparator along with the input voltage If the SAR voltage exceeds vin, the comparator resets the MSB in the SAR otherwise it remains set The next bit in the SAR is then set and the process is repeated!

Enough background! How do we use the ADC on the AVR? Recall: The ADC is (by default) 10-bits Zero represents GND Max represents the voltage on AREF 1LSB We can connect (Note: AREF is not connected by default - sch.): AVCC to AREF An internal 1.1V reference to AREF We MUST set which channel we want to convert We have 6-channels (single input)

Starting a conversion We have several choices to make about how we want the ADC to run! Single conversion mode A single conversion can be started by setting the ADSC bit (ADC Start Conversion) ADCSRA This bit remains high while the conversion is in progress and cleared by hardware when the conversion is complete Note: If a conversion is in progress while a channel change is selected, the conversion will complete and then change to the selected channel

Starting a conversion We can also trigger a conversion! Can start conversions at fixed intervals Note: The interrupt flag is set even when interrupts are NOT enabled! The INT flag MUST be cleared before starting a new conversion

Starting a conversion What about free running mode? We can use the ADC interrupt flag as the external trigger This will start a new conversion EVERY time a conversion is complete Hence free running mode Note: We MUST start the first conversion Conversions will persist even if the ADC interrupt flag is not cleared! We can also trigger a conversion by setting the start conversion bit (ADSC) even in auto trigger mode We can also use this bit to check the conversion status (always 1 during a conversion)

The ADC prescaler The SA circuitry requires a clock frequency between 50 khz and 200 khz This is for 10-bit resolution If we can deal with lower resolution we can sample up to 1MHz Lower resolution implies???

The ADC prescaler The SA circuitry requires a clock frequency between 50 khz and 200 khz This is for 10-bit resolution If we can deal with lower resolution we can sample up to 1MHz Lower resolution implies??? Less accuracy! How do we set the ADC clock frequency??? Similar to the timers! Use a prescaler to divide the input clock! (more later)

ADC Timing Normal conversion time is 13 ADC clock cycles When the ADC is switched in (enabled) The first conversion takes 25 ADC clock cycles The sample and hold: 1.5 ADC cycles after the start of a normal conversion 13.5 ADC cycles after the start of the first conversion The timing rules change a bit when using differential mode! Check the data sheet if needed!

Conversion channel and Reference selection Changed in the ADMUX register (MUXn and REFS 1:0) Use a temporary (single buffered) register CPU has access to this register This ensures that the values are ONLY changed during safe states Not during a conversion

Conversion channel and Reference selection What about free running mode??? How do we tell what channel is being converted during free running mode if I change the channels selection bits? Is the current data valid for this channel or the previous channel??? Safe times to update ADMUX When ADATE or ADEN is cleared During a conversion (one cycle after the trigger event) After a conversion (before the interrupt flag is cleared)

Noisy signals! How do we deal with noise on the line??? Will this cause any issues??

Noisy signals! How do we deal with noise on the line??? Will this cause any issues?? Absolutely! Our digital value will be bouncing all over the place! What can be done about it? Filter the input signal (low-pass: recall we are very band limited) We should also use a filter if we suspect there might be frequency content above 100kHz in our signal!!! Why???

Noisy signals! How do we deal with noise on the line??? Will this cause any issues?? Absolutely! Our digital value will be bouncing all over the place! What can be done about it? Filter the input signal (low-pass: recall we are very band limited) We should also use a filter if we suspect there might be frequency content above 100kHz in our signal!!! Why??? Nyquist!!!

Noise canceling! Some precautions to keep noise low on the ADCs Keep analog input paths short Wires are really just antennas in an embedded app. If using AVCC, connect it to Vcc via an LC network The ADC has built in noise canceling if required Severe drawbacks if trying to do other things during conversion! Do NOT switch digital output pins during conversions!!!

Registers! REFS 1:0: Reference selection bits We typically use AVCC with external cap

Registers! ALDAR: left vs. right adjust result MUX 3:0: Analog channel and gain selection

Registers! ADEN: ADC enable bit ADSC: Start conversion bit Set to start conversion Reads HIGH during conversion and LOW when complete ADATE: ADC auto trigger enable ADIF: ADC interrupt flag

Registers! ADIE: ADC Interrupt enable ADPS 2:0: Prescale selection

Registers! Where our data is stored (can use ADCW to get the entire result Left vs. right adjusted results

Registers! ACME: Analog comparator multiplexer enable MUX5: 5 th bit of the mux pins ADTS 2:0: Auto trigger source

Registers! Digital input disable register When set the digital input buffer is disabled Should be set to save power if not in use

Example!

Example!

Example!