-SQA-SCOTTISH QUALIFICATIONS AUTHORITY HIGHER NATIONAL UNIT SPECIFICATION GENERAL INFORMATION -Unit Number- 2451657 -Superclass- -Title- XL D/A AND A/D CONVERTERS ----------------------------------------- -DESCRIPTION- GENERAL COMPETENCE FOR UNIT: Explaining the operation of devices and circuits used in analogue to digital and digital to analogue interfacing. S 1. explain the operation of digital to analogue converters (DAC); 2. explain the operation of analogue to digital converters (ADC); 3. explain the operation of associated circuits used in interfacing; 4. test digital to analogue converters and analogue to digital converters and demonstrate the principle of aliasing. CREDIT VALUE: 1 HN Credit ACCESS STATEMENT: Access to this unit is at the discretion of the centre. However it would be beneficial if the candidate had an understanding of operational amplifiers. This may be evidenced by possession of HN Unit: 2451557 Operational Amplifiers. or similar qualifications or experience. ----------------------------------------- For further information contact: Committee and Administration Unit, SQA, Hanover House, 24 Douglas Street, Glasgow G2 7NQ. Additional copies of this unit may be purchased from SQA (Sales and Despatch section). At the time of publication, the cost is 1.50 (minimum order 5.00).
HIGHER NATIONAL UNIT SPECIFICATION STATEMENT OF STANDARDS UNIT NUMBER: 2451657 UNIT TITLE: D/A AND A/D CONVERTERS Acceptable performance in this unit will be the satisfactory achievement of the standards set out in this part of the specification. All sections of the statement of standards are mandatory and cannot be altered without reference to SQA. 1. EXPLAIN THE OPERATION OF DIGITAL TO ANALOGUE CONVERTERS (DAC) The performance parameters of a DAC are defined correctly. The resolution of a DAC for a pure Binary input and a BCD input code is calculated correctly. The explanation of the operation of a weighted resistor DAC and an R-2R ladder network DAC is correct. Parameters: accuracy; linearity; resolution; settling time. Written and graphical evidence of the candidate s knowledge and understanding of the operation of digital to analogue converters, as specified in performance criteria to. 2. EXPLAIN THE OPERATION OF ANALOGUE TO DIGITAL CONVERTERS (ADC) The performance parameters of an ADC are defined correctly. Explain the operation of the ADC correctly from the given diagrams. 2
Parameters: resolution; gain error; linearity; settling time; conversion time. ADCs: flash ADC; digital ramp ADC; tracking ADC; single slope and dual slope ADC; successive-approximation ADC. Written and graphical evidence of the candidate s knowledge and understanding of the operation of analogue to digital converters, as specified in performance criteria and. 3. EXPLAIN THE OPERATION OF ASSOCIATED CIRCUITS USED IN INTERFACING The performance parameters of sample and hold circuits are defined correctly. The application of an analogue multiplexer to an ADC and a DAC is explained correctly. The principal of a bipolar ADC and a bipolar DAC are explained correctly. Parameters: d.c. offset; acquisition time; aperture time; droop; feed through. Written and graphical evidence of the candidate s knowledge and understanding of the operation of associated circuits used in interfacing, as specified in performance criteria to. 3
4. TEST DIGITAL TO ANALOGUE CONVERTERS AND ANALOGUE TO DIGITAL CONVERTERS AND DEMONSTRATE THE PRINCIPLE OF ALIASING (d) Digital to analogue converter is tested correctly in accordance with current manufacturer s data sheets. Analogue to digital converter is tested correctly in accordance with current manufacturer s data sheets. Shannon s sampling theorem is stated correctly. The relationship between sampling frequency and aliasing is demonstrated correctly. D/A converter test: nonmonoticity; differential nonlinearity; low error; high gain error; offset error. A/D converter test: missing codes; incorrect codes; offset. Written and performance evidence of the candidate s knowledge and ability to test D/A and A/D converters and demonstrate aliasing as detailed in performance criteria - (d). MERIT To gain a pass in this unit, a candidate must meet the standards set out in the outcomes, performance criteria, range statements and evidence requirements. To achieve a merit in this unit, a candidate must demonstrate a superior or more sophisticated level of performance. This may be demonstrated by: (i) (ii) a more in-depth explanation of theories; research outwith the course materials. ----------------------------------------- 4
ASSESSMENT In order to achieve this unit, candidates are required to present sufficient evidence that they have met all the performance criteria for each outcome within the range specified. Details of these requirements are given for each outcome. The assessment instruments used should follow the general guidance offered by the SQA assessment model and an integrative approach to assessment is encouraged. (See references at the end of support notes). Accurate records should be made of the assessment instruments used showing how evidence is generated for each outcome and giving marking schemes and/or checklists, etc. Records of candidates achievements should be kept. These records will be available for external verification. SPECIAL NEEDS Proposals to modify outcomes, range statements or agreed assessment arrangements should be discussed in the first place with the external verifier. Copyright SQA 1997 Please note that this publication may be reproduced in whole or in part for educational purposes provided that: (i) (ii) no profit is derived from the reproduction; if reproduced in part, the source is acknowledged. 5
HIGHER NATIONAL UNIT SPECIFICATION SUPPORT NOTES UNIT NUMBER: 2451657 UNIT TITLE: D/A AND A/D CONVERTERS SUPPORT NOTES: This part of the unit specification is offered as guidance. None of the sections of the support notes is mandatory. NOTIONAL DESIGN LENGTH: SQA allocates a notional design length to a unit on the basis of time estimated for achievement of the stated standards by a candidate whose starting point is as described in the access statement. The notional design length for this unit is 40 hours. The use of notional design length for programme design and timetabling is advisory only. PURPOSE The purpose of this unit is to provide an introduction to the operation of analogue to digital and digital to analogue converters for applications which involve interfacing to microprocessor based systems. CONTENT/CONTEXT This unit is designed to develop competence in the operation of Analogue to Digital Convertor and Digital to Analogue Convertor and interfacing circuits. To provide underpinning knowledge to support HN units involving input/output interfacing. Corresponding to outcomes: Outcome 1 With BCD input each four bit group represents a decimal digit. For an eight bit convertor (two decimal digits) the BCD inputs can represent any decimal number from 0 to 99. Explanation of operation of R-2R ladder network may be based on the division of current in a circuit. Outcome 3 Bipolar input/output range may be obtained by the addition of an offset to the analogue input/output. Outcome 4 - A/D and D/A may be tested back to back. (d) Using a microcomputer and an analogue input/output program a sinusoidal signal of variable frequency may be continuously monitored and displayed. By increasing the input beyond that which produces two 6
samples per cycle a sinewave output may be displayed which is of a lower frequency than the input. APPROACHES TO GENERATING EVIDENCE This unit should be taught within a classroom and practical environment with access to a microprocessor based development systems. ASSESSMENT PROCEDURES Outcome 1 Structured questions are recommended for PC s, and. Outcome 2 A structured question is recommended for PC2. A structured question complete with the necessary diagrams is recommended for PC 2. Outcome 3 Structured questions are recommended for PC s 3, 3 and 3. Outcome 4 May be assessed by means of a report on practical circuit tests for PC s 4 and 4. PC 4 and 4(d) may be assessed by means of a report on a practical demonstration utilising supplied software. PROGRESSION This unit may lead on to the following HN unit 8521027 Engineering Programming: I Hardware Control. REFERENCES 1. Guide to unit writing. 2. For a fuller discussion on assessment issues, please refer to SQA s Guide to Assessment. 3. Information for centres on SQA s operating procedures is contained in SQA s Guide to Procedures. 4. For details of other SQA publications, please consult SQA s publications list. Copyright SQA 1997 Please note that this publication may be reproduced in whole or in part for educational purposes provided that: (i) (ii) no profit is derived from the reproduction; if reproduced in part, the source is acknowledged. 7