Summary of NRZ CDAUI proposals

Similar documents
Draft Baseline Proposal for CDAUI-8 Chipto-Module (C2M) Electrical Interface (NRZ)

CDAUI-8 Chip-to-Module (C2M) System Analysis #3. Ben Smith and Stephane Dallaire, Inphi Corporation IEEE 802.3bs, Bonita Springs, September 2015

CAUI-4 Chip to Chip and Chip to Module Applications

Need for FEC-protected chip-to-module CAUI-4 specification. Piers Dawe Mellanox Technologies

Further Investigation of Bit Multiplexing in 400GbE PMA

CDAUI-8 Chip-to-Module (C2M) System Analysis. Stephane Dallaire and Ben Smith, September 2, 2015

System Evolution with 100G Serial IO

Thoughts on 25G cable/host configurations. Mike Dudek QLogic. 11/18/14 Presented to 25GE architecture ad hoc 11/19/14.

The Case of the Closing Eyes: Is PAM the Answer? Is NRZ dead?

MR Interface Analysis including Chord Signaling Options

Open electrical issues. Piers Dawe Mellanox

CAUI-4 Chip to Chip Simulations

52Gb/s Chip to Module Channels using zqsfp+ Mike Dudek QLogic Barrett Bartell Qlogic Tom Palkert Molex Scott Sommers Molex 10/23/2014

50GbE and NG 100GbE Logic Baseline Proposal

Application Space of CAUI-4/ OIF-VSR and cppi-4

Ali Ghiasi. Jan 23, 2011 IEEE GNGOPTX Study Group Newport Beach

Ali Ghiasi. Nov 8, 2011 IEEE GNGOPTX Study Group Atlanta

Measurements and Simulation Results in Support of IEEE 802.3bj Objective

Practical Receiver Equalization Tradeoffs Applicable to Next- Generation 28 Gb/s Links with db Loss Channels

Architectural Consideration for 100 Gb/s/lane Systems

PAM-2 on a 1 Meter Backplane Channel

COM Study for db Channels of CAUI-4 Chip-to-Chip Link

Brian Holden Kandou Bus, S.A. IEEE GE Study Group September 2, 2013 York, United Kingdom

100G PSM4 & RS(528, 514, 7, 10) FEC. John Petrilla: Avago Technologies September 2012

100G EDR and QSFP+ Cable Test Solutions

Approach For Supporting Legacy Channels Per IEEE 802.3bj Objective

D1.2 Comments Discussion Document. Chris DiMinico MC Communications/ LEONI Cables & Systems

50 Gb/s per lane MMF baseline proposals. P802.3cd, Whistler, BC 21 st May 2016 Jonathan King, Finisar Jonathan Ingham, FIT

802.3bj FEC Overview and Status IEEE P802.3bm

CAUI-4 Application Requirements

DataCom: Practical PAM4 Test Methods for Electrical CDAUI8/VSR-PAM4, Optical 400G-BASE LR8/FR8/DR4

Further Clarification of FEC Performance over PAM4 links with Bit-multiplexing

Validation of VSR Module to Host link

IEEE P802.3bm D Gb/s and 100 Gb/s Fiber Optic Task Force 2nd Task Force review comments

Comparison of options for 40 Gb/s PMD for 10 km duplex SMF and recommendations

64G Fibre Channel strawman update. 6 th Dec 2016, rv1 Jonathan King, Finisar

100Gb/s Single-lane SERDES Discussion. Phil Sun, Credo Semiconductor IEEE New Ethernet Applications Ad Hoc May 24, 2017

Improved extinction ratio specifications. Piers Dawe Mellanox

A Way to Evaluate post-fec BER based on IBIS-AMI Model

Architectural Considera1on for 100 Gb/s/lane Systems

Electrical Interface Ad-hoc Meeting - Opening/Agenda - Observations on CRU Bandwidth - Open items for Ad Hoc

32 G/64 Gbaud Multi Channel PAM4 BERT

Transmitter Specifications and COM for 50GBASE-CR Mike Dudek Cavium Tao Hu Cavium cd Ad-hoc 1/10/18.

M809256PA OIF-CEI CEI-56G Pre-Compliance Receiver Test Application

Measurements Results of GBd VCSEL Over OM3 with and without Equalization

PAM8 Gearbox issues Andre Szczepanek. PAM8 gearbox issues 1

100 Gb/s per Lane for Electrical Interfaces and PHYs CFI Consensus Building. CFI Target: IEEE November 2017 Plenary

802.3bj FEC Overview and Status. 400GbE PCS Baseline Proposal DRAFT. IEEE P802.3bs 400 Gb/s Ethernet Task Force

PAM8 Baseline Proposal

500 m SMF Objective Baseline Proposal

XLAUI/CAUI Electrical Specifications

Thoughts about adaptive transmitter FFE for 802.3ck Chip-to-Module. Adee Ran, Intel Phil Sun, Credo Adam Healey, Broadcom

100GEL C2M Channel Reach Update

Presentation to IEEE P802.3ap Backplane Ethernet Task Force July 2004 Working Session

100G BASE-KP4 Interference tolerance ad hoc January 22 Mike Dudek Qlogic Charles Moore Avago

Comparison of NRZ, PR-2, and PR-4 signaling. Qasim Chaudry Adam Healey Greg Sheets

100G-FR and 100G-LR Technical Specifications

Product Specification 100m Multirate Parallel MMF 100/128G QSFP28 Optical Transceiver FTLC9551SEPM

400GbE AMs and PAM4 test pattern characteristics

100GBASE-FR2, -LR2 Baseline Proposal

Refining TDECQ. Piers Dawe Mellanox

SMF Ad Hoc report. Pete Anslow, Ciena, SMF Ad Hoc Chair. IEEE P802.3bm, Geneva, September 2012

VEC spec for 50GAUI-1 C2M and 100GAUI-2 C2M. Piers Dawe Mellanox

SECQ Test Method and Calibration Improvements

Maps of OMA, TDP and mean power. Piers Dawe Mellanox Technologies

Analysis of Link Budget for 3m Cable Objective

Proposal for 400GE Optical PMD for 2km SMF Objective based on 4 x 100G PAM4

Analysis of Link Budget for 3m Cable Objective

Component BW requirement of 56Gbaud Modulations for 400GbE 2 & 10km PMD

More Insights of IEEE 802.3ck Baseline Reference Receivers

Receiver Testing to Third Generation Standards. Jim Dunford, October 2011

PRE-QSFP-LR4L 100G QSFP 28 Dual Range Optical Transceiver, 10km. Product Features: General Product Description:

Product Specification 10km Multi-rate 100G QSFP28 Optical Transceiver Module FTLC1151SDPL

Optical transmission feasibility for 400GbE extended reach PMD. Yoshiaki Sone NTT IEEE802.3 Industry Connections NG-ECDC Ad hoc, Whistler, May 2016

Clause 74 FEC and MLD Interactions. Magesh Valliappan Broadcom Mark Gustlin - Cisco

400G-FR4 Technical Specification

In support of 3.5 db Extinction Ratio for 200GBASE-DR4 and 400GBASE-DR4

200GBASE-DR4: A Baseline Proposal for the 200G 500m Objective. Brian Welch (Luxtera)

Further work on S/N Budget Channel specification May 8

New Serial Link Simulation Process, 6 Gbps SAS Case Study

40GBASE-ER4 optical budget

Investigation of PAM-4/6/8 Signaling and FEC for 100 Gb/s Serial Transmission

PAM4 signals for 400 Gbps: acquisition for measurement and signal processing

10GBASE-LRM Interoperability & Technical Feasibility Report

100G CWDM Link Model for DM DFB Lasers. John Petrilla: Avago Technologies May 2013

FEC Applications for 25Gb/s Serial Link Systems

802.3bj FEC Overview and Status. PCS, FEC and PMA Sublayer Baseline Proposal DRAFT. IEEE P802.3ck

On Figure of Merit in PAM4 Optical Transmitter Evaluation, Particularly TDECQ

Comment #147, #169: Problems of high DFE coefficients

Combating Closed Eyes Design & Measurement of Pre-Emphasis and Equalization for Lossy Channels

Combating Closed Eyes Design & Measurement of Pre-Emphasis and Equalization for Lossy Channels

An Approach To 25GbE SMF 10km Specification IEEE Plenary (Macau) Kohichi Tamura

100G SR4 Link Model Update & TDP. John Petrilla: Avago Technologies January 2013

FEC IN 32GFC AND 128GFC. Scott Kipp, Anil Mehta June v0

Investigation of PAM-4/6/8 Signaling and FEC for 100 Gb/s Serial Transmission

50 Gb/s per lane MMF objectives. IEEE 50G & NGOATH Study Group January 2016, Atlanta, GA Jonathan King, Finisar

Baseline proposal update

CU4HDD Backplane Channel Analysis

Backplane NRZ FEC Baseline Proposal

Line Signaling and FEC Performance Comparison for 25Gb/s 100GbE IEEE Gb/s Backplane and Cable Task Force Chicago, September 2011

Transcription:

Summary of NRZ CDAUI proposals Piers Dawe Tom Palkert Jeff Twombly Haoli Qian Mellanox Technologies MoSys Credo Semiconductor Credo Semiconductor

Contributors Scott Irwin Mike Dudek Ali Ghiasi MoSys QLogic Ghiasi Quantum LLC 802.3bs Jan 2015 Atlanta Summary of NRZ CDAUI proposals 2

Introduction Builds on "50Gb/s Modulation Proposal", options 1 (and 2) http://ieee802.org/3/bs/public/14_11/goergen_3bs_03a_1114.pdf Addresses project objective "Support optional 400 Gb/s Attachment Unit Interfaces for chip-to-chip and chip-to-module applications" Chip-to-module CDAUI-8 Detailed baseline proposal in the style of an annex at http://ieee802.org/3/bs/public/adhoc/elect/14_1204/palkert_01a_1214_elect.pdf updated to http://ieee802.org/3/bs/public/15_01/palkert_3bs_01_0115.pdf at this meeting Chip-to-chip CDAUI-8 Detailed baseline proposal in the style of an annex at http://ieee802.org/3/bs/public/adhoc/elect/14_1218/palkert_02_1214_elect.pdf updated to http://ieee802.org/3/bs/public/15_01/palkert_3bs_02_0115.pdf at this meeting Both NRZ, both assume 100GBASE-KR4-strength FEC: Clause 91, RS(528,514) 802.3bs Jan 2015 Atlanta Summary of NRZ CDAUI proposals 3

Motivation At each new speed, we introduce something new: 10G lanes: 64B/66B coding, better connectors... 25G lanes: Equalizing reference receiver, better connectors... But we end up finding that PAM2 NRZ still works It's well understood It's simple Tolerant to ILD and crosstalk In our estimation, it's lower power than PAM4 for both host and module See http://ieee802.org/3/bs/public/15_01/qian_3bs_01_0115.pdf Lower power because it's simpler We expect the same will happen again: 50G lanes: End-to-end FEC, better connectors... Still PAM2 NRZ, as in associated baseline proposals 802.3bs Jan 2015 Atlanta Summary of NRZ CDAUI proposals 4

Chip-to-module CDAUI-8 8 differential lanes, 51.5625 GBd, AC coupled in the module Specification and test methodology similar to CEI-56G-VSR oif2014.277.02 in http://ieee802.org/3/bs/private/oif_cei_56g_1114.zip, CEI-28G-VSR http://www.oiforum.com/public/documents/oif_cei_03.1.pdf clause 13, C2M CAUI-4 (802.3bm, Annex 83E), and FC-PI-6 Compliance points are related to the module connector Compliance boards will have to be specified to higher frequencies And with reduced loss if feasible FC-PI-6 experience shows that the channel loss can be increased beyond C2M CAUI-4 when FEC is used Proposal includes 1-tap DFE in the reference receiver Trade off between power (DFE or not) and channel loss needs more study 802.3bs Jan 2015 Atlanta Summary of NRZ CDAUI proposals 5

Chip-to-module CDAUI-8 Max channel loss 15 to 18 (TBD) db C2M CAUI-4 and CEI-28G-VSR have 10 db, FC-PI-6 has 15.5 db Max host loss 12 to 15 db C2M CAUI-4 and CEI-28G-VSR have 7.3 db, FC-PI-6 has 12.8 db The higher losses are the same channel losses as for C2M CAUI-4, extended to higher frequencies Therefore will support the same distance with the same material Or for the same distance, power could be reduced with improved PCB material by removing DFE, using the lower loss limit (~15 db) Spec BER 1e-6 before FEC Very low BER after FEC correction (~1e-25 for random errors) 802.3bs Jan 2015 Atlanta Summary of NRZ CDAUI proposals 6

Host and module outputs The output eye is measured using a reference receiver with a continuous time linear equalizer (CTLE)... Similar methodology to C2M CAUI-4 etc., but no need to extrapolate the bathtub curves And for host output, possibly a DFE in addition For channels above 15 db? CTLE for host output has 12 steps instead of 9 CTLE for module output has 3 steps instead of 2, no DFE Host output eye height 60 mv at 1e-6 Compare C2M CAUI-4 with 95, 80 mv at 1e-15 Compare FC-PI-6 with 50 mv at 1e-6 802.3bs Jan 2015 Atlanta Summary of NRZ CDAUI proposals 7

Host and module inputs Module and host input specs follow host and module output specs similarly to C2M CAUI-4 Host input can be tuned with knowledge of host channel loss or adaptively as host implementer chooses Just like C2M CAUI-4 etc. Module input can be tuned adaptively May be able to use a recommended CTLE peaking value (like C2M CAUI-4) as a starting point and/or sanity check NRZ likely to be more tolerant to mis-tuning than PAM4 802.3bs Jan 2015 Atlanta Summary of NRZ CDAUI proposals 8

Sddxx (db) Differential return loss -3-4 -5-6 -7-8 Meets equation constraints -9-10 0 10 20 30 40 Frequency (GHz) Dashed: C2M CAUI-4 Solid: Candidate for C2M CDAUI-8 (C2M CAUI-4 scaled for signalling rate) Will need adjustment when feasible connector, package and compliance board improvements can be quantified 802.3bs Jan 2015 Atlanta Summary of NRZ CDAUI proposals 9

Sdd21 (db) Channel differential insertion loss 0-5 -10-15 -20-25 Meets equation constraints -30-35 -40 0 10 20 30 40 Frequency (GHz) Blue: C2M CAUI-4 Solid: Candidate for C2M CDAUI-8 (reference receiver with DFE) Dashed: lower power non-dfe candidate for C2M CDAUI-8 802.3bs Jan 2015 Atlanta Summary of NRZ CDAUI proposals 10

Chip-to-chip CDAUI-8 8 differential lanes, 51.5625 GBd, AC coupled Specification and test methodology similar to C2C CAUI-4 (802.3bm, Annex 83D) These are the same channel loss as for C2C CAUI-4, extended to higher frequencies Therefore will support the same distance ("25 cm") Up to one connector Compliance points are related to the ICs Same 3-tap Tx emphasis setting method as C2C CAUI-4 Stronger post-cursor than C2C CAUI-4, similar to 100GBASE-KR4 Spec BER 1e-6 before FEC Very low BER after FEC correction Channel is defined by COM COM reference receiver has up to 12 db continuous time filter (like C2C CAUI-4 and 100GBASE-KR4) and 5-tap DFE (like C2C CAUI-4) 802.3bs Jan 2015 Atlanta Summary of NRZ CDAUI proposals 11

Chip-to-chip CDAUI-8 Receiver interference tolerance test insertion loss 31 to 32 db Compare C2C CAUI-4 with 19.5 to 20.5 db (without FEC, 5 DFE taps) Compare 100GBASE-KR4 with 35 db (with FEC, 14 DFE taps) COM parameters follow Tx specs Allow stronger Tx emphasis than C2C CAUI-4 CTLE is scaled for signalling rate Return loss specs are TBD Summary: very like C2C CAUI-4, use of FEC and stronger Tx emphasis allows more db of loss 802.3bs Jan 2015 Atlanta Summary of NRZ CDAUI proposals 12

Conclusion FEC and stronger equalization allows the methodologies of C2M and C2C CAUI-4 to be extended to double the signalling rate Preserves the electrical channel lengths of CAUI-4 and the well-known advantages of NRZ signalling 802.3bs Jan 2015 Atlanta Summary of NRZ CDAUI proposals 13