Application Note for PIEQX9 SATA ReDriver TM Family By Qun Song, Lingsan Quan Table of Contents.0 Introduction.0 How to Select PIEQX9 SATA ReDriver TM Family for Various Applications.0 Recommended Setting of PIEQX9 SATA ReDriver TM Family.0 Board Design and Layout Guidance for PIEQX9 SATA ReDriver TM Family.0 Appendix Application Reference Schematics and layout Page of AN0 0//0 Pericom Semiconductor Corp.
.0 Introduction PIEQX9 SATA ReDriver TM family was developed using Pericom cutting-edge technology to compensate the deterministic jitter and insertion loss caused by long traces and cables to achieve signal integrity at the end of the traces or cables, and have low power consumption. Figure, and are typical application. Figure Typical Application in Notebook and Desktop Figure. A Typical Application in Notebook Page of AN0 0//0 Pericom Semiconductor Corp.
Figure. A Typical Application in Notebook with Docking.0 How to select PIEQX9 SATA ReDriver Family for various applications Table. Choosing the Correct Product Applications Standards Recommended PIEQX9 devices and features Package Internal HDD Docking station Desktop,.~.9V ; SATAi (G-.g, G-.0g) SATAm (G-.g, G-.0g) SATAx (G-.g, G-.0g) PIEQX9SLZDE (flexible EQ and analog/digital pre-emphasis settings) PIEQX9SLAZDE (flexible EQ and analog/digital pre-emphasis settings, HDD auto detection) TQFN-0 NB esata Laptop docking Desktop, server, Cable Backplane, SAS.V ; SATAi (G-.g, G-.0g) SATAm (G-.g, G-.0g) SATAx (G-.g, G-.0g) SAS (G-.g, G-.0g) PIEQX9STZDE (flexible EQ, analog/digital pre-emphasis settings, AUTO- SLUMBER mode) PIEQX9STAZDE (flexible EQ and analog/digital pre-emphasis settings, HDD auto detection) PIEQX9BZDE (flexible EQ and analog/digital pre-emphasis settings) TQFN-0 TQFN-0 Table. Power Comparison for PIEQX9 SATA ReDriver Family Comparison of Feature (Part Number) Voltage (V) Power consumption Max. (mw) Standby (mw) Auto-Slumber Mode Y/N Power Consumption(mW) PIEQX9SLZDE PIEQX9SLAZDE PIEQX9STZDE PIEQX9STAZDE.~.9 0 0.0 0. 00 0. 0 PIEQX9BZDE. 00 X X Page of AN0 0//0 Pericom Semiconductor Corp.
.0 Recommended Settings of PIEQX9 SATA ReDriver TM Family Table. The Settings of PIEQX9 SATA ReDriver TM Family for Various Input Trace Lengths Input and output trace lengths For Standard&Enhanced Mode of PIEQX9SL/A, PIEQX9ST/A, PIEQX9B,.0gbs Input Output Pre-emphasis Equalization <8 < 0dB.dB >8 < 0dB.db Table. The Settings of PIEQX9 SATA ReDriver TM Family for Various Output Trace Lengths Input and output trace lengths For Standard Mode of PIEQX9SL/A, PIEQX9ST/A, PIEQX9B,.0gbs Input Output Pre-emphasis Equalization < <8 0dB.dB < >8.0dB.dB Table, the settings for PIEQX9 SATA ReDriver TM Family for various output trace lengths. For Enhanced Mode of PIEQX9SL/A, PIEQX9ST/A, Input and output trace lengths PIEQX9B,.0gbs Input Output Pre-emphasis Equalization < <8 0dB.dB < <.0dB.dB < <.db.db < <.0dB.dB Please note:. Trace lengths are suggested values based on Pericom lab measurements (taken with output pre-emphasis enabled on both Channels) to meet SATA loss and jitter specifications.. Actual trace length supported by PIEQX9 SATA ReDriver TM may be more or less than suggested values and depend on board layout, number of connectors used in the SATA signal path, and SATA host and esata connector design. Page of AN0 0//0 Pericom Semiconductor Corp.
.0 Board Design and Layout Guidance for PIEQX9 SATA ReDriver TM Family. The Trace Width and Clearance The trace length miss-matching shall be less than mils for the + and traces in the same pairs Match the length between the pairs less than inches Use wider trace width, with 00ohm differential impedance, to minimize the loss for long routes More pair-to-pair spacing for minimal crosstalk Target differential Zo of 00ohm ±0% Figure, the trace width and clearance. The PCB Layers Stackup No new PCB technology required. Use FR is fine. Using standard to 8 layers stack-up with 0.0 inch thick PCB. For micro strip lines, using ½ OZ Cu plated is ok. For strip line in plus players, using OZ Cu is better. Page of AN0 0//0 Pericom Semiconductor Corp.
Figure. The Stack-up. The Layout Guidance for the Trace Routings Figure. The Layout Guidance for the Trace Routings. The Topology and Layout Guidance for PIEQX9 SATA ReDriver TM Family Use de-coupling capacitors, 0.uf to 0.uf in size of 00, for all the Vdd pins of PIEQX9 family, as close to the Vdd pins as possible, within -mm if feasible. Use dedicated and GND planes for to minimize the jitters coupled between channel trough power sources. The differential traces shall be away from the strong EMI source and devices, such as the single-ended TTL traces and devices, with at least 0mil to 0mil space. No other components shall piggy ride on the differential traces. Locate the PIEQX9 family device as close to the SATA connector as possible, to traces between the the PIEQX9 family and the SATA connector is allowed, but with to is preferred. Page of AN0 0//0 Pericom Semiconductor Corp.
.0 Appendix Application Reference Schematics and Layout. PIEQX9STZDE (Standard Mode) +.V EC C C C C + APP Circuit for PIEQX9STZDE (Standard Mode) 0u_8 AI_P AI_N BO_P BO_N 0n_00 0n_00 0n_00 0n_00 C 0n_00 C 0n_00 C9 0n_00 C 0n_00 U AI+ HGND 0 GND NC PIEQX9STZDE@TQFN0 8 9 0 EN GND 9 B_EM A_EM GND 8 MODE NC AI- NC BO- BO+ AO+ AO- NC BI- BI+ Close to IC R C NP_00 C8 C0 C 0n_00 0n_00 0n_00 0n_00 AO_P AO_N BI_N BI_P JP CON_SATA_SMT A_EM R 0ohm_00 B_EM R 0ohm_00 PIN9: A_EM with internal 00k pull-up resistor R is unpopulated R is populated Channel A has.0db pre-emphasis output Channel A has 0dB pre-emphasis output PIN8: B_EM with internal 00k pull-up resistor R is unpopulated R is populated Channel B has.0db pre-emphasis output Channel B has 0dB pre-emphasis output PIN and could be connected to PIN and could be connected to GND APP Layout for PIEQX9STZDE (Standard Mode) Page of AN0 0//0 Pericom Semiconductor Corp.
. PIEQX9STZDE (Enhanced Mode) A_EM R NP +.V A_EQ R 0ohm_00 EC C C C C + 0u_8 0n_00 0n_00 0n_00 0n_00 U Close to IC C 0n_00 R C 0n_00 AI_P AI+ AO+ C 0n_00 NP_00 C8 0n_00 AI_N AI- AO- NC BO_P C9 0n_00 BO- HGND NC BI- C0 0n_00 C 0n_00 C 0n_00 BO_N BO+ BI+ 0 A_EM 9 GND NC EN B_EQ B_EM PIEQX9STZDE@TQFN0 AO_P AO_N BI_N BI_P 8 9 0 A_EQ 8 MODE NC APP Circuit for PIEQX9STZDE (Enhanced Mode) JP CON_SATA_SMT B_EM R B_EQ R NP 0ohm_00 PIN8: A_EQ with internal 00k pull-up resistor R is unpopulated Channel A has.db equalization PIN8: B_EQ with internal 00k pull-up resistor R is unpopulated Channel B has.db equalization R is populated Channel A has.db equalization R is populated Channel B has.db equalization PIN9: A_EM can be adjusted by analog resistor R Value Pre-emphasis Output for Channel A OPEN 0dB.98k +.0dB.k +.0dB.0k +.db.90k +.0dB.0k +.db.9k +.0dB.9k +.db.k +.0dB.9k +.db.9k +.0dB PIN9: B_EM can be adjusted by analog resistor R Value OPEN.98k.k.0k.90k.0k.9k.9k.k.9k.9k Pre-emphasis Output for Channel B 0dB +.0dB +.0dB +.db +.0dB +.db +.0dB +.db +.0dB +.db +.0dB PIN and could be connected to PIN and could be connected to GND Page 8 of AN0 0//0 Pericom Semiconductor Corp.
APP Layout for PIEQX9STZDE (Enhanced Mode). PIEQX9SLZDE (Standard Mode) +.V EC + C C C C APP Circuit for PIEQX9SLZDE (Standard Mode) 0u_8 AI_P AI_N BO_P BO_N 0n_00 0n_00 0n_00 0n_00 C 0n_00 C 0n_00 C9 0n_00 C 0n_00 U AI+ HGND 0 GND 9 GND 8 MODE GND AI- NC BO- BO+ AO+ AO- NC BI- BI+ Close to IC EN PIEQX9SLZDE@TQFN0 B_EM A_EM 8 9 0 R C NP_00 C8 C0 C 0n_00 0n_00 0n_00 0n_00 AO_P AO_N BI_N BI_P JP CON_SATA_SMT A_EM R 0ohm_00 B_EM R 0ohm_00 PIN9: A_EM with internal 00k pull-up resistor R is unpopulated R is populated Channel A has.0db pre-emphasis output Channel A has 0dB pre-emphasis output PIN8: B_EM with internal 00k pull-up resistor R is unpopulated R is populated Channel B has.0db pre-emphasis output Channel B has 0dB pre-emphasis output PIN and could be connected to GND Page 9 of AN0 0//0 Pericom Semiconductor Corp.
APP Layout for PIEQX9SLZDE (Standard Mode). PIEQX9SLZDE (Enhanced Mode) APP Circuit for PIEQX9SLZDE (Enhanced Mode) Page 0 of AN0 0//0 Pericom Semiconductor Corp.
+.V A_EM R A_EQ R NP 0ohm_00 EC + C C C C 0u_8 AI_P AI_N BO_P BO_N 0n_00 0n_00 0n_00 0n_00 U C 0n_00 GND C 0n_00 AI- AO- C9 0n_00 BO- BI- AI+ HGND NC 0 A_EM 9 A_EQ 8 MODE Close to IC R C 0n_00 AO+ NC NP_00 C8 0n_00 C0 0n_00 C 0n_00 C 0n_00 BO+ BI+ AO_P AO_N BI_N BI_P JP CON_SATA_SMT EN PIEQX9SLZDE@TQFN0 B_EQ 8 9 B_EM 0 B_EM R B_EQ R NP 0ohm_00 PIN8: A_EQ with internal 00k pull-up resistor R is unpopulated Channel A has.db equalization PIN8: B_EQ with internal 00k pull-up resistor R is unpopulated Channel B has.db equalization R is populated Channel A has.db equalization R is populated Channel B has.db equalization PIN9: A_EM can be adjusted by analog resistor R Value Pre-emphasis Output for Channel A OPEN 0dB.k to k db to 0dB PIN9: B_EM can be adjusted by analog resistor R Value OPEN.k to k Pre-emphasis Output for Channel B 0dB db to 0dB PIN and could be connected to GND APP Layout for PIEQX9SLZDE (Enhanced Mode) Page of AN0 0//0 Pericom Semiconductor Corp.
. PIEQX9BZDE (Standard Mode) +.V EC + C C C C APP Circuit for PIEQX9BZDE (Standard Mode) 0u_8 AI_P AI_N BO_P BO_N 0n_00 0n_00 0n_00 0n_00 C 0n_00 C 0n_00 C9 0n_00 C 0n_00 U AI+ HGND 0 GND 9 GND 8 MODE(GND) GND AI- GND BO- BO+ AO+ AO- GND BI- BI+ R C NP_00 C8 PIEQX9BZDE@TQFN0 EN B_EM 8 A_EM 9 0 Close to IC C0 C 0n_00 0n_00 0n_00 0n_00 AO_P AO_N BI_N BI_P JP CON_SATA_SMT A_EM R 0ohm_00 B_EM R 0ohm_00 PIN9: A_EM with internal 00k pull-up resistor R is unpopulated R is populated Channel A has.0db pre-emphasis output Channel A has 0dB pre-emphasis output PIN8: B_EM with internal 00k pull-up resistor R is unpopulated R is populated Channel B has.0db pre-emphasis output Channel B has 0dB pre-emphasis output APP Layout for PIEQX9BZDE (Standard Mode) Page of AN0 0//0 Pericom Semiconductor Corp.
. PIEQX9BZDE (Enhanced Mode) AI_P AI_N BO_P BO_N EC 0u_8 +.V + C C C C 0n_00 0n_00 0n_00 0n_00 U HGND 0 A_EM R A_EQ R C 0n_00 AI+ AO+ R C 0n_00 C 0n_00 AI- AO- NP_00 C8 0n_00 A_EN# GND B_EN# C9 0n_00 BO- BI- C0 0n_00 C 0n_00 BO+ BI+ C 0n_00 A_EM 9 EN A_EQ 8 B_EQ B_EM NP 0ohm_00 PIEQX9BZDE@TQFN0 AO_P AO_N BI_N BI_P 8 9 0 MODE() Close to IC APP Circuit for PIEQX9BZDE (Enhanced Mode) JP CON_SATA_SMT B_EM R B_EQ R NP 0ohm_00 PIN8: A_EQ with internal 00k pull-up resistor R is unpopulated Channel A has.db equalization PIN8: B_EQ with internal 00k pull-up resistor R is unpopulated Channel B has.db equalization R is populated Channel A has.db equalization R is populated Channel B has.db equalization PIN9: A_EM can be adjusted by analog resistor R Value Pre-emphasis Output for Channel A OPEN 0dB.98k +.0dB.k +.0dB.0k +.db.90k +.0dB.0k +.db.9k +.0dB.9k +.db.k +.0dB.9k +.db.9k +.0dB PIN9: B_EM can be adjusted by analog resistor R Value OPEN.98k.k.0k.90k.0k.9k.9k.k.9k.9k Pre-emphasis Output for Channel B 0dB +.0dB +.0dB +.db +.0dB +.db +.0dB +.db +.0dB +.db +.0dB Page of AN0 0//0 Pericom Semiconductor Corp.
APP Layout for PIEQX9BZDE (Enhanced Mode) Page of AN0 0//0 Pericom Semiconductor Corp.