FUSE Application Experiment Multiswitch for Satellite and TV Receiver. Abstract description

FUSE Application Experiment 25956 Multiswitch for Satellite and TV Receiver Abstract description Hirschmann employs 2,700 personnel world-wide, and has manufacturing facilities in Germany, Austria and Hungary. There are 6 product divisions within Hirschmann Germany, one of which is the Interactive Broadband Network (IBN), employing 140 staff at Neckartenzlingen site, and involved in this Application Experiment (AE). Of the 140, 20 are electronic engineers involved in R & D. This product division designs and manufactures system solutions especially for receiving satellite-tv and FM signals, and distributes these on networks of any size. The new generation of 4 x 4 multiswitches, which is the focus of this AE, comprises receivers for 4 different digital and analogue satellite signals plus a terrestrial channel and their subsequent broadcasting to 4 subscribers. The original multiswitch was built on a multilayer printed circuit board (PCB) and included over 400 active and passive surface mount components. In this AE most of the surface mount components were integrated in to an 'Application Specific Integrated Circuit' (ASIC). Since this combined both digital and RF analogue functions, a mixed signal ASIC was required. The result was one low cost ASIC to replace 260 discreet components, and a 2 layer PCB to replace a 4 layer PCB, with an overall cost saving of 30%, compared to the original product. The market for this multiswitch unit is estimated to be 0.5 to 1 million pieces/year in Europe alone. There is one main European competitor with 25-30% of the market share, and the rest of the market is shared by around 100 European companies, including Hirschmann. The AE cost Hirschmann 100 K ECU, and took 8 months. The subsequent product development took a further 8 months and cost an additional 100 K ECU. This included a design iteration to improve the isolation between channels, which was marginal over the required frequency range, 900 to 2,400 MHz with the first design. The new product is due to go on the market in 1999. Estimated figures for the following 3 years for the new product show an immediate increase in sales over the existing product, based on the fact that the new product will sell at 60% of the 1995 price (80% of their 1998 price). This still results in a significant profit, since the internal cost has also dropped to 55% of the 1995 value. Using these figures the payback period will be within the first year of sales, or within 2.5 years of starting the AE. This takes into account the total cost of the project being 200K ECU. The ROI, assuming a 3 year life for the product, will be around 700%. The AE has been considered as a success to Hirschmann, since the target price and performance has been realised. In addition the company has acquired additional skills in dealing with ASIC designers and foundries. Two major lessons which they learnt were that isolation between high frequency analogue signals is difficult to model, and it is often not advisable to try and include all functions in to an ASIC. 1

1. Company name and address: R. Hirschmann GmbH &Co. Interaktive Breitband-Netze Stuttgarterstrasse 45-51 D-72654 Neckartenzlingen Germany 2. Company size Hirschmann employs 2,700 personnel world-wide, and has manufacturing facilities in Germany, Austria and Hungary. Recently the company was acquired by Rheinmetall AG, which employs 29,000 world-wide. There are 6 product divisions within Hirschmann Germany, one of which is the Interactive Broadband Network (IBN), employing 140 staff at Neckartenzlingen site, and involved in this Application Experiment. Of the 140, 20 are electronic engineers involved in R & D. There are also electronic engineers in production, sales and marketing. 3. Company Business Description Hirschmann is part of the corporate sector Rheinmetall Elektronik AG, which is involved in the four business areas: Automotive Electronics Communications and Data Systems Automation and Measurement Technologies Security Systems The 6 product divisions within Hirschmann cover a world-wide turnover of 262 Mill. Euro in 1997, and the IBN Broadband Networks Division accounts for approximately 20% of this. The IBN product division serves 5 product groups: Active and passive equipment including terrestrial aerials, amplifiers, splitters, filters and antenna sockets Satellite distribution equipment including multi-switches for multiple users DTH satellite equipment ( dishes, LNB, receivers,..) Headend equipment for SMATV and CATV networks Optical transmission systems and equipment for interactive services The product group satellite distribution equipment for which the AE was carried out, contributes around 18.6 % of the overall turnover of IBN product division. The group designs, manufactures, assembles, tests, and services all their own equipment. The product which is the focus of this AE is the multiswitch for multiple users. 2

4. Company markets and competitive position at the start of the AE As stated, Hirschmann are involved in the design and manufacture of all types of communication equipment. The company has subsidiaries in Europe, USA and Singapore, and distributors in Southeast Asia. They sell in to OEMs, Wholesalers, system integrators and cable network operators, with the majority of their sales in Germany. The market for the multiswitch unit is estimated to be 0.5 to 1 million pieces/year in Europe alone, with a corresponding value of around 30M ECU. There is one main European competitor with 25-30% of the market share, and the rest of the market is shared by around 100 European companies, including Hirschmann. The multiswitch is an integral part of their complete product range, and therefore essential from a sales perspective. However, their existing product is approximately 10% more expensive for the same specification than the competitors and hence they have a limited share of the European market of around 1%. Around 80% of this is in Germany and the rest in Europe. In order to increase their market share in Germany initially, Hirschmann must reduce the product price by around 30%, whilst maintaining or increasing the performance. Without this Hirschmann are likely to lose other business where the customer purchases complete system solutions, including the multiswitch. With a cost saving Hirschmann intend to increase their German market share to 20% and then capture more of the European market, before embarking on the world market. 5. Product to be improved and its industrial sectors The multiswitch currently available enables up to 4 users to simultaneously choose from any one of 4 satellites plus a terrestrial input. It comprises therefore 4 satellite inputs (950-2400MHz) which may be analogue or digital; one terrestrial input (40-860MHz) and 4 outputs. A photo showing one of the units is shown below, in Figure 1. Figure 1 3

The block diagram given in Figure 2 shows all the functions currently incorporated on a single PCB. This is a 4 layer PCB with approximately 400 surface mount components (SMD) mounted on both sides. The overall size of the PCB is 84 x 140 mm. This board is then mounted in to a metal cast box with the connectors. This enclosure provides the protection necessary for the operating environment, which includes EMC. Block Diagram Multiswitch 950..2400 MHz 13 V 950..2400 MHz 18 V 47..862 MHz 950..2400 MHz 13 V 950..2400 MHz 18 V LNB 1 LNB 2 TER LNB 3 LNB 4 ca. 100 parts on 2 layer PCB ASIC ca. 300 parts integrated U Ref. 5 V_ 1% 18 V_ D D D D 47..862 MHz + 950..2400 MHz 13 / 18 V 0 / 22 khz REC 1 REC 3 47..862 MHz + 950..2400 MHz 13 / 18 V 0 / 22 khz 47..862 MHz + 950..2400 MHz 13 / 18 V 0 / 22 khz REC 2 REC 4 47..862 MHz + 950..2400 MHz 13 / 18 V 0 / 22 khz Overview Amplifier Powersplitter D Detektor Low Pass Filter Switch High Pass Filter Figure 2 The system operates satisfactorily to the required performance, but due to the number of components and the need for the PCB to be multilayer, the overall cost is high. Furthermore it is not possible to increase the number of output channels since the PCB is fully populated. Whilst the most common requirement (around 50% of all multiswitches) is for 4 output channels, 20% are for 8 outputs and the further 30% are for 12 or more channels. The only way that Hirschmann could satisfy this market was to supply a number of 4-output units. Thus, in order to compete in the multiswitch market, Hirschmann had to reduce the cost of their unit and also consider ways in which the number of users per unit could be increased. 6. Choices and rationale for the selected technologies, tools and methodologies The choice of technology was based on the economic and technical performance requirements. The proposed solution had to offer a significant cost reduction over the existing multilayer PCB with 400 SMD components. It also had to meet the performance requirements detailed in the specification. 4

The possible choices in technology were an FPGA or an ASIC. The FPGA was discounted because this technology is not suitable for use above 1 GHz, whilst the circuit needs to operate up to 2.4 GHz. An ASIC could be designed to meet the performance specification, and with the anticipated quantities could also meet the cost requirements. Since both analogue and digital functions need to be included in to the ASIC, a mixed signal ASIC was required. With respect to the development of the mixed signal ASIC, three options were available; dedicated chip, a semicustom design or a standard gate array. The difference between the three is primarily in the development rather than the manufacturing cost, where the highest cost is for a dedicated ASIC. For this design only standard components were required, and therefore the simplest design i.e. using a standard gate array supplied by the foundry was chosen. The main advantage here was that the manufacture time was short at 3 months because a dedicated mask was not required for the components. For example, in this project the total time to design and manufacture the prototype ASIC was 6 months. A silicon wafer with the standard components implanted is wired up in order to produce the complete circuit, and hence only a mask for the wiring layout needed to be produced. The main difficulty seen with moving to an ASIC was achieving the necessary isolation between channels over the required frequency range. Hirschmann decided to use a design house, skilled in producing RF circuits for ASICs. This design house would work from the specification laid down by Hirschmann, and produce a layout for the foundry to use to produce the ASIC. In addition, the design house would produce a test specification for the foundry in order that the functionality of each production ASIC was proven before assembly on to a PCB. The design methodologies used by the design house, Hisys, were chosen to enable the complete system to be modelled before mask production, and produce a seamless interface between the design house and the foundry. The design process was performed according to a top-down design flow using state-of-the-art software tools (derivatives from SPICE) for system and circuit-level simulation and optimisation. Also, because of the very high operating frequencies, appropriate package models were included in simulations. Circuit layout was netlist driven, which guaranteed consistency and avoided layout faults. The resulting layout was checked for design and electrical rule violations (DRC and ERC) and an extracted netlist compared to the netlist generated from the schematics (LVS). Finally, extracted parasitic components from the layout were included in back-annotation simulations to verify the correct function of the chip. The software used was also supported by the silicon foundry MAXIM. One further area which had to be addressed was the interconnection between the ASIC and the PCB. At RF with maximum isolation between channels required, these connections are critical. Hirschmann used a local University to model, design and test these interface connections. 7. Description of the technical product improvements Figure 2 defines the functional block diagram of the assembled PCB. In this the dotted line defines these functions which were to be replaced with the new electronics developed within this AE. It was agreed that the internal reference voltage and the filters would not be included in the upgrade. The reason for excluding the reference voltage was the required 5

tolerance of 1% could not be achieved (the ASIC foundry quote 10% for this device). The filters also represented a potential problem in terms of achieving the required specification, and since these devices are both small and inexpensive it was decided that rather than compromise the ASIC design, the filters would also remain outside the ASIC. The new component chosen to replace the SMD was an ASIC. The outline specification for this device is given below: General Supply voltage 5 ± 5 %V Number of gates 1000 Power dissipation < 700 mw Die size 75 x 70µm I/O Pins 24 GND Pins 18 Package TQFP48 Input pins separated Inputs A, B, C, D Frequency range 900 2400 MHz Signal type analogue, FM Impedance (unbalanced) 75Ω Number of input carriers 40 Input level per carrier 75 85 dbµv Input T (VHF, UHF TV signals) Frequency range Input level per carrier 47 862 MHz 65 85 dbµv Outputs U, V, W, X Frequency range Impedance (absolute value) 47 2400 MHz 75Ω Output level for 2 nd order intermodulation 35 db> 85dBµV Isolation between any terminal up to 2.4 GHz> 30dB Switch control signal characteristics (Input SWVOLT) Frequency Carrier amplitude 15-30 khz 0.6 ± 0.2V pp It must be noted that the bipolar process technology used to produce the components on to the Silicon was chosen because of its suitability over the required frequency range of operation, 900 to 2400-MHz. The minimum feature size was 0.8µm. 6

Replacing the components with a single ASIC resulted in a 30% reduction in the overall cost of the unit. This saving was as a result of simplifying the PCB to a 2 sided board, reducing the number, and hence cost of components, and also reducing the assembly and test time by around 20%. Figure 3 shows the final PCB plus ASIC. Figure 3 PCB with ASIC A further benefit with reducing the component count was that a single PCB could be produced with 2 ASICs and the necessary filters for 8 output channels. Thus, a future development of the 4-output channel unit could be an 8-output unit. The potential cost benefit for an 8-output unit would be around 60% compared to two 4-output units. 8. Expertise and experience in microelectronics of the company and the staff allocated to the project Personnel within the research and development department in the IBN group have expertise in analogue RF signal processing, amplification, demodulation and modulation. They hold a 7

leading position in passive RF components for signal distribution. Recently their experience has extended to the handling of digital TV signals in QPSK and QAM format. Specific experience has also been gained in analogue optical transmission systems. On the project management side, the R & D department have experience with project planning, executing development projects and working with sub contractors including design houses. The technical expertise that they lacked in relation to this project initially related to choosing the right type of ASIC technology for the application. Then it was exactly how an ASIC design had to be specified to a foundry, and how ASICs are manufactured and tested. From a management perspective Hirschmann did not know how long it would take to design, manufacture and test an ASIC, nor the likely chance of success. In addition, costing a project like this was not possible with their existing knowledge or expertise of this technology. 9. Workplan and rationale The Workplan proposed at the outset of the project comprised 10 tasks with a duration of 5 months and a cost of 100 K ECU. No design optimisation iteration was allowed for in this programme. A breakdown of the work carried out by Hirschmann, the design house Hisys, and the foundry Maxim under each of the tasks, is given below. Task 1 Project Management This was undertaken by Hirschmann and 10 person days allocated for monthly meetings and final reports. Task 2 Feasibility and design tradeoffs The design house, Hisys, first undertook a feasibility study to determine whether an ASIC could meet the outline specification produced by Hirschmann. Hisys performed a full simulation of the system at this stage, and from this it was determined that the filters and reference voltage functions should not be included in to the ASIC. 5 days of Hisys and 10 days of Hirschmann were allocated to this task. Task 3 Specification Having established which aspects of the design could be manufactured on an ASIC; Hirschmann produced a detailed specification which was supplied to Hisys. 10 days were allocated to this task. Task 4 Test specification In order to test the ASIC a test specification had to be prepared. Hirschmann had to be able to define the functionality of the ASIC in order that the foundry could develop suitable test design and subsequently test fixtures. Hisys and Hirschmann were jointly responsible for this activity, with 4 and 2 days allowed respectively. 8

Task 5 Test Design The foundry, Maxim were tasked with producing a test design for the ASIC, based on the specification produced from Task 4. Originally 5 days were allocated to this task, but due to the complexity of the test requirements 16 days were actually required. Task 6 Design and layout The detailed design and layout were produced by Hisys based on the decision to use a standard gate array available from Maxim. 80 days to produce the layout tape were assigned to this task. Task 7 Masks and processing of samples Maxim were tasked with producing the masks for the ASIC and then processing samples. 15 days were allocated to this task, but due to the complexity generally regarding the routing of the RF signals, 45 days were actually required. Task 8 Test fixtures and software Maxim were then required to produce the test fixture defined from task 5, including the necessary test software. 10 days were allocated to this task, but 14 days were required. Task 9 EMC field simulation of package & PCB In order to interface the ASIC to the PCB, the University of Stuttgart assisted Hirschmann with simulating the RF signals at the connection point. 5 days for both partners were allocated, whereas 12 days were actually required from the University. Task 10 Test PCB and ASIC ID Hirschmann were allocated 30 days to test the ASIC on the PCB. Note that the PCB comprised only of the ASIC and not the filters. This task slightly over-ran with 37 days required. January February March April May June July August Septem 30 06 13 20 27 03 10 17 24 03 10 17 24 31 07 14 21 28 05 12 19 26 02 09 16 23 30 07 14 21 28 04 11 18 25 01 08 Project Plan Actual (top line) and planned timescales 9

The overall cost was higher than predicted by 36 K ECU (36%), but the original timescales were achieved. The results from the first ASIC samples demonstrated that the design could be produced using this technique. Unfortunately, the isolation between the channels was marginal for the 4 channel output unit and therefore Hirschmann decided to undertake a design iteration in order to improve this parameter. This iteration took a further 8 months and cost around 40 K ECU. Most of this additional cost went to the foundry, and the rest to the design house Hisys. Summary of planned and actual costs Planned (K ECU) Actual (K ECU) Hirschmann 20 22 Hisys 58 60 Maxim 20 49 University of Stuttgart 2 5 Total 100 136 The additional work undertaken in the design iteration was divided up as follows: Hirschmann 5% Hisys 10% Maxim 85% The design iteration was run in parallel with developing the production system for the ASIC devices, and also designing and manufacturing the PCB layout for the final product. Therefore the overall timescale to production of 16 months was not any longer than if a design iteration had not taken place. 10. Sub Contractor information Hirschmann decided at the start of the project that they would not develop design expertise in-house to enable them to carry out a detailed design of an ASIC. Their aim was to be able to give a functional specification for an ASIC, which thus meant that they would use a design house to prepare the detailed design of the ASIC and liase with the foundry. There were therefore two sub contractors for the ASIC work. As with all specialist design and manufacturing projects where the First User does not possess, nor wish to acquire detailed knowledge of the work being outsourced, it is essential that the sub contractors are capable of carrying out the tasks assigned to them, and can work effectively with the First User. In this project, Hirschmann discussed with their local TTN potential design houses and foundries, which included Maxim and Hisys. Hirschmann then contacted the foundry, Maxim, and asked them to recommend a suitable design house for their application. Maxim advised that Hisys were a small design house located near to Hirschmann, who were used to dealing with 10

high frequency design applications, similar to that required for this project. Based on these recommendations, a meeting between the TTN, Hirschmann and Hisys was arranged, and from this it was agreed that Hisys would act as the design sub contractor, with Maxim as the manufacturer. Hirschmann only had a contract with Hisys, who in turn had a separate contract with MAXIM to manufacture the devices. Hirschmann had an initial contract with Hisys to cover the feasibility study, and then a separate contract to cover the development and sub contract manufacture. It was stated in this contract that if the circuit did not work exactly to specification, then Hirschmann would have to pay for a design iteration. HiSys was contracted to develop and optimise the circuit according to the specification given by Hirschmann. As results, all required circuit and layout information (schematics) was delivered in written form (plots) to Hirschmann and MAXIM and additionally in electronically readable form to MAXIM. The simulation results were delivered as plots and tables to Hirschmann. A written test specification for prototype evaluation as well as for the series test was delivered to Hirschmann and MAXIM. Hirschmann ensured that they maintained all Intellectual property Rights (IPR) regarding the overall design in the contract drawn up between themselves and Hisys. However, the masks and tapes are owned by MAXIM. The design can not simply be transferred to another manufacturer, because it is a complete analogue design, which depends on Maxim's process parameters. Details of the sub contractors chosen to assist Hirschmann are given below: - Sub contractor 1 Hisys Design House In this project, Hisys were responsible for producing the ASIC design to the specification agreed with Hirschmann, and then ensuring that samples were correctly manufactured and tested by Maxim, the foundry. The company was founded in 1996 and comprises 3 design engineers, with collectively 15 years design experience. The company develops monolithic integrated circuits exclusively designed for their customers. They have available to them the necessary state-of-the-art software tools for high frequency system and circuit design. The range of support covers all tasks from system definition, through design, to volume production. It includes specification development, circuit design, layout creation, prototype evaluation, and transfer to production. The personnel have specialised knowledge in high frequency integrated circuit design. Focused on high speed communication applications, Hisys covers all required medium independent system knowledge for high-speed transmission. Hisys have established strong links to dedicated silicon vendors, including Maxim, who offer silicon bipolar and BiCMOS processes, which are optimised for high-speed analogue or mixed signed circuit and system design. In this project Hisys developed the mixed signal ASIC design using bipolar processes offered by Maxim, to the specification supplied by Hirschmann. Hisys acted as the intermediary between Hirschmann and Maxim, and prepared all the necessary contracts and specifications for Maxim regarding the fabrication of the ASIC. Hisys were aware that the simulation of high frequency components and the isolation between them on silicon would be very difficult. Therefore the contract signed between Hisys and Hirschmann gave a target specification and clearly stated that if a design iteration was necessary, the cost would have to be met by Hirschmann. Hisys also had a similar agreement with Maxim. 11

Sub Contractor 2 Maxim In this project, Maxim were responsible for manufacturing the ASIC devices for Hirschmann, using the design information supplied by Hisys. In addition, they were tasked with designing and manufacturing a suitable test fixture, in order that each ASIC could be functionally tested before dispatch. The company was founded in 1983 in Sunnyvale, California to design, develop, manufacture and market a broad range of analogue and mixed signal integrated circuits for use in a variety of electronic products. Maxim now provides over 1000 different products to a customer base of 35,000 businesses world-wide. Around one third of Maxim's current $450 million annual sales are made in Europe and the company provides direct engineering support throughout Europe with a field applications team of more than 30 engineers speaking at least 10 European languages. In 1994 Maxim acquired the integrated Circuits Division of Tektronix, located in Germany, and it was this foundry which produced the ASICs for this project. In addition to increasing manufacturing capacity for Maxim's eight different analogue CMOS processes, this acquisition provided a portfolio of state of the art bipolar processes aimed at high frequency applications. These are supported by a design philosophy and unrivalled device modelling that have allowed the company to extend access to customer hardware engineers for the definition of ASICs for high performance, low power, RF applications. As software tools for logic simulation have advanced it has become commonplace for systems companies to design their own digital and even low frequency analogue and mixed signal circuits but the RF domain has, until recently, remained the preserve of semiconductor design specialists. By providing a stable well defined process, powerful analogue simulation tools and accurate component models Maxim is able to offer competent RF transistor level hardware design engineers the opportunity to realise their design directly in silicon. The Maxim GST2 process has a transistor f 1 of 27 GHz. This and high functional packing density now provides the possibility to integrate RF applications at frequencies up to 2.5 GHz. Pre-diffused, application oriented tile arrays have been developed to allow the sharing of a large part of the tooling and complex manufacturing process between a number of different designs. This reduces both the development costs and time to market of an ASIC design. Maxim were able to use, within this project, the pre-diffused, application orientation tile array. Their design support and model libraries fitted well with the Hisys modelling tools. Sub contractor 3 University of Stuttgart There are 15 engineers in this University with experience in electromagnetic field simulation for optimisation of mobile phone systems and waveguide design. One engineer qualified to PhD was involved in this project. The connection line structure and layout was modelled, simulated and optimised in order to try and maximise specific knowledge and simulation tools for RF design, and the fact that they were local to Hirschmann were two main reasons why they were chosen for this task. 11. Barriers perceived by the company in the first use of the AE technology 12

The main technical barrier to Hirschmann was their lack of knowledge regarding what circuitry could be produced using different technologies. This was particularly true for their application which comprised both digital and RF analogue functions. Having no previous experience of Silicon foundries or specialist electronic design houses, Hirschmann were unable to choose the most suitable technology for their application. Whilst Hirschmann were used to introducing new technologies in to their products these were based on technologies where they had some technical knowledge. The main concern with this project was they had no knowledge of the manufacturing processes used by Silicon foundries. Their lack of technical knowledge also meant that they were unable to carry out an economic assessment of any solution where a different technology was to replace their existing SMD/PCB product. 12. Steps taken to overcome barriers and arrive at an improved product Hirschmann first attended a FUSE meeting where they learnt about which micro-electronic technology may be suitable for their application. They then went through the process of determining which technology could be justified on both technical and economic grounds. This work was done with assistance from the TTN, and resulted in a feasibility study including the estimated costs, timescales and Return on Investment (ROI). Once it was established that an ASIC was the most suitable solution, Hirschmann contacted a reputed foundry, Maxim. They explained that they wished to develop an ASIC for their product but did not want to be involved in the detailed design. The foundry supplied them with the name of the specialist design house Hisys, who frequently designed ASICs for Maxim, and had considerable expertise in RF. Hirschmann also discussed the project with the University of Stuttgart, and they also recommended Hisys, both because of their expertise and location. Hirschmann contacted Hisys and felt that they would be able to carry out the necessary design work and liase between Hirschmann and Maxim. They were able, with assistance from Hisys and Maxim, to produce a detailed work plan, showing both costs and timescales for the complete development programme, and estimate the final cost of the project. This gave Hirschmann the ability to be able to calculate the payback period, and also understand the technical and economic risks. Hirschmann personnel were then able to plan the overall product development programme, which included the PCB redesign. The R & D group were able to present to the marketing department what the new product would be like, when it would be available, and how much it would cost to manufacture. This information meant that Hirschmann could develop their marketing strategy in parallel with the product development. 13. Knowledge and experience Hirschmann personnel acquired specific knowledge to enable them to understand what functions can be produced on an ASIC, how they are manufactured and tested, and what should be in the design and test specifications. For example, in this project, Hirschmann learnt that although theoretically all functions can be integrated in to an ASIC, there are 13

performance limitations associated with some devices. The result is that in terms of cost/ performance, it is better to leave some functions out of the ASIC. Hirschmann attained their knowledge by working closely with Hisys personnel throughout the project. Specifically they received on the job training during the development of the specification for the ASIC and the test specification. Also, being responsible for functional testing of the ASIC within the circuit, meant that Hirschmann personnel learnt how to design, and manufacture test fixtures, and also use specific test equipment. At the end of the AE, Hirschmann would claim to be proficient in: Determining whether an ASIC would be suitable for a particular product development Outlining a project plan, with costs and timescales, for the development project Estimating whether the project can be justified on economic grounds Preparing an outline specification for an ASIC, and specifying which functions should be kept out of the ASIC Liasing with a specialist design house for them to produce a detailed design for the foundry Prepare an outline test specification for the ASIC Test an ASIC within a circuit Carry out a risk assessment on the complete project 14. Lessons learnt Hirschmann were, prior to this AE, unsure of what circuit could be produced on an ASIC, the cost and timescales to develop an ASIC and where the technical risks were. From this AE, Hirschmann have learnt that theoretically their circuit requirements could be met, but with their particular high frequency application, isolation between the signals is difficult to model accurately, and very difficult to achieve in practice. The results from this AE suggest that the modelling tools are not sufficiently accurate to predict cross-talk between tracks when dealing in this high frequency range. From the first design it was clear that the isolation between channels was insufficient, which meant that a design iteration was necessary. The high frequencies set limits to the computer simulation. The common computer models are suitable for frequency response, amplification, return loss and noise. But simulation of distortion, level and decoupling are not sufficient. The development of an ASIC with an internal transit frequency of 26 GHz in on draft is not possible. Components with high energy caused problems. For the switching signal based on a voltage difference of 0.07 volts an internal reference was too vague. Also the decoupling and the low output level (IM 3) was a problem after the first design. In future, Hirschmann would allow for an iteration to optimise the design, and include the cost and time of this iteration in the overall project plan. This is something that Hirschmann have allowed for on previous product developments where the circuit has been produced using SMDs, and it is now clear that a similar iteration is required when producing designs for ASIC. The other main area where the original project plan was inaccurate was on the testing of the ASIC. Very little time and minimal cost had been allocated to designing and producing a test fixture to fully test the ASIC. Hirschmann personnel now understand what testing an ASIC entails and in future will allow more time and costs to this activity. 14

Interconnections from the ASIC to the PCB are also very difficult to model, as proven in this AE. Although a design iteration at the ASIC/PCB interface is less time consuming and costly than for the ASIC it should still be planned in to any new product development where an ASIC replaces certain circuitry. Hirschmann have also learnt that it may not be the most technically and economically sound solution to incorporate all functions in to the ASIC. In this example for instance, the terrestrial filters, the voltage feed with voltage divider and the reference source were all excluded from the ASIC. This reduced the risk of achieving the technical specification at the required production cost. 15. Resulting product, its industrialisation and internal replication The AE was completed in 8 months in accordance with the original plan. However, it then took a further 8 months to produce a suitable ASIC design in low volume production. This 8- month development programme also included the development of the complete PCB with the rest of the necessary circuitry, and cost a further 100 KECU. At the end of the 16-month project Hirschmann had a product which will be sold as a replacement for the existing SMD solution. Hirschmann adopt the practice of only selling new products when stocks of the existing product are depleted. In order to remain competitive however, Hirschmann have lowered the price of their existing product by 20%, in line with the sales price of the new product. The new product is expected to be on the market at the start of 1999. In addition to this product Hirschmann are developing the 8-output unit, with 2 ASICs on a single PCB. This will use the same ASIC, but obviously a new PCB layout. Hirschmann personnel are using their knowledge obtained from this AE regarding designing the interface between the ASIC and the PCB. The IBN group within Hirschmann also now intend to look at other products in their range in order to ascertain whether ASIC technology would be appropriate. They have already worked with Hisys on another development project since this AE, and intend to maintain this relationship. 16. Economic impact and improvement in competitive position The sales figures for the existing channel unit over the last 4 years have been given in the table below. In addition, relative costs and profits as a percentage of the 1995 figures have been quoted. It can be seen that the quantities peaked in 1997, but they were still very low in relation to the overall market size, estimated at around 500,000 per annum. Estimated figures for the following 3 years for the new product are also given. It is clear that a significant increase in sales is anticipated immediately, based on selling at 60% of the 1995 price. This still results in a significant profit, since the internal cost has also dropped to 55% of the 1995 value. The large increase in sales anticipates an increase in market share from 1 to 20%. The 20% figure is realistically based on the fact that for other Hirschmann products where they are competitive in terms of both cost and performance they do have a 20% market share. This is due to the extremely good reputation in Europe, particularly Germany. If a share in the world-wide market is also obtained, then the sales figures would increase further. 15

Using these figures the payback period will be within the first year of sales, or within 2.5 years of starting the AE. This takes into account the total cost of the project being 200K ECU. The ROI, assuming a 3 year life for the product, will be around 700%. Existing product Unit 1995 1996 1997 1998 1999 2000 2001 Volume (pieces) 2,000 4,000 5,000 4,000 3,000 Internal cost per piece Price ex works per piece % of 1995 price 100 82 82 73 73 % of 1995 price 100 80 67 53 47 Earnings per year % of 1995 price 100 160 167 107 70 Costs per year % of 1995 100 164 205 145 109 Profit per year % of 1995 100 150 63 0-38 New Multiswitch Volume (pieces) 15,000 60,000 60,000 Internal cost per piece Price ex works per piece % of 1995 price 55 55 45 % of 1995 price 60 53 47 Earnings per year % of 1995 450 1,600 1,400 Costs per year % of 1995 409 1,636 1,364 Profit per year % of 1995 563 1,500 1,500 Difference in profit Factor increase from 1995 5.3 15 15 Costs include the shared initial investment and manufacturing costs 17. Target audience for dissemination throughout Europe This AE describes the development of a mixed signal ASIC with RF signals over the frequency range 900 to 2,400 MHz. The solution was realised using a standard gate array, with 1,000 gates on the Silicon. The application for this particular ASIC solution was the switching of satellite and terrestrial analogue and digital signals. The company involved in this project was large, and skilled in both project management and dealing with sub contractors. Their lack of knowledge was related to dealing with silicon foundries, and understanding what functions could be realised in an ASIC. The technical benefit of this AE would be to other companies with potential application to move from a surface mount solution to an ASIC. The circuitry could include a number of RF channels, and of particular interest may be isolation between channels. 16

The managerial aspect, which would be of benefit to other companies, concerns the dealing with a silicon foundry. In this AE, the FU chose to work with a specialist design house, who dealt with the foundry directly. This approach was decided to be the most efficient since the specialists understand how foundries work and the format that they need the design information. In addition, the specialists can prepare suitable contracts for the foundry, which most First Users of this technology are unable to do. Target companies to fully benefit from this AE must however be conversant with project planning and be able to deal effectively with specialist sub contractors. They should also be skilled in analogue circuit design, and fully understand the technical specification for their existing product. It is proposed that medium or large companies and some specialist small companies involved in large volume production of electronic systems with RF analogue circuits would benefit from this AE. They may be in many different sectors, with the focus on communication systems. All companies, who require production volumes that can justify the application of ASIC technology, might be very interested in the experience of Hirschmann. The application of this AE could focus on companies involved in telecom networks and telecom equipment. 3002 Computers and other information processing equipment: Companies involved in the development of small series of special computer related equipment. 3220 Telegraph and Telephone Apparatus and Equipment and Radio and Electronic goods: Companies, which are interested in spin-off applications, such as CATV, audio/video networks. 17