AN39 9380 Carroll Park Drive San Diego, CA 92121, USA Tel: 858-731-9400 Fax: 858-731-9499 www.psemi.com Vector De-embedding of the PE42542 and PE42543 SP4T RF Switches Introduction Obtaining accurate measurement results for the PE42542 and PE42543 18 GHz SP4T switches can be a challenge. The test environment and de-embedding methodology all have an impact on the measurement accuracy. Using an RF probe station and well defined calibration standards provides the best results but requires this capability to be available. To simplify initial evaluation and test of the PE42542 and PE42543, evaluation sample kits are provided with a part soldered to a PCB having high performance SMA connectors. The primary challenge to this approach is properly de-embedding the parts performance due to the trace length and connector impact on insertion loss and return loss measurements. Summary Benefit of vector de-embedding Vector de-embedding concepts Implementing vector de-embedding Representative results Page 1 of 7
Evaluation Sample Kit The EVK provided for the PE42542 and PE42543 supports connecting to all five ports of the SP4T switch. A thru line is also provided with connectors to facilitate de-embedding the switch performance. A quick de-embedding can be done using a scalar correction of the measured results. The thru line loss is simply added back to the switch measurement for a more accurate value of the insertion loss. As yet, the impact of the varying impedances of each connector and thru line versus frequency is not captured. To improve the accuracy, it is recommended that a vector de-embedding technique be used and the following discusses one approach that can be readily implemented. Figure 1. Evaluation Board Layout Page 2 of 7 Document No. DOC-12215-1 UltraCMOS RFIC Solutions
Vector De-Embedding To perform vector de-embedding of the switch s true behavior, the impact of the interconnect lines and RF connectors needs to be removed from the measurement using matrix algebra. To achieve this, a common representation of the device under test defines the DUT as a central 2-port with cascaded fixture 2-ports on port 1 and port 2 of the DUT. If the fixture is designed to be symmetrical, then the fixture 2-ports can be assumed identical and a half fixture 2-port can be defined. This is shown in Figure 2. Figure 2. DUT with Identical Half Fixture Thru 2-ports Cascaded Representing Measured Data To de-embed the DUT s performance from the measured data, the inverse of the half fixture thru is cascaded with the measured data and the resulting matrix calculation equates to the DUT s performance. This is shown in Figure 3. Figure 3. Measured Data with the Inverse Half Fixture Thru Cascaded to Obtain the DUT s Deembedded Performance Page 3 of 7
+ AN39 Vector De-Embedding Method and Required Files To perform vector de-embedding of the PE42542 and PE42543, Peregrine has measured a representative thru line from the EVK PCB and generated a schematic model matched to the resulting data. The schematic model allows splitting the thru line in half and generating a 2-port S-parameter file for the resulting half fixture thru. This file is available for download from Peregrine Semiconductor s website under the PE42542 s and PE42543 s Technical Resources. To implement the de-embedding, the user must measure the PE42542 or PE42543 EVK and save the S-parameter data file. To assure commonality between the measurement file and de-embedding files, the following recommendations are given for the measurement frequency range, step size, and number of points: 10 MHz 20 GHz, 24.9875 MHz steps (801 pts) The user can then set up either a Matlab de-embedding script using the function deembedsparams (s_params,s1_params,s3_params) or utilize ADS or Cadence to work through the matrix calculations. The following describes de-embedding using ADS. Within ADS, a schematic is generated that has a central S2P component that is the measured data set. Two De_Embed2 2-port components are serially connected on either port of S2P, and then 50Ω termination resistors are added to each side. The final schematic is shown in Figure 4. Care must be taken to assure the port orientation on the right side fixture half (De- Embed9) is reversed so that the SMA designated port within the data set, Port 1, is connected to the 50Ω termination resistor. Figure 4. ADS Schematic Showing the S2P Measurement File With Half Fixtures Being De-embedded From Either Side S2P SNP1 File = PE42542_MeasData_SN01.s2p Term Term6 Num = 6 + 1 Ref 2 1 Ref 2 2 Ref 1 Term Term7 Num = 7 De-Embed2 De-Embed8 File = S_PE42542_543_Half_Fix_Thru.s2p PortMappingType = Standard De-Embed2 De-Embed9 File = S_PE42542_543_Half_Fix_Thru.s2p PortMappingType = Standard Page 4 of 7 Document No. DOC-12215-1 UltraCMOS RFIC Solutions
After de-embedding, the insertion loss will improve significantly while the RFC return loss changes as the loss and parasitic effects of the thru line are removed. A representative set of results is shown in Figure 6 and Figure 7. Figure 6. PE42542 Insertion Loss Results With and Without Vector De-embedding Measured MS21 (db) De-Embedded MS21 (db) 0.0-1.0 Insertion Loss (db) -2.0-3.0-4.0-5.0-6.0-7.0-8.0 0 2 4 6 8 10 12 14 16 18 20 Frequency (GHz) Figure 7. PE42542 Return Loss With and Without Vector De-embedding Measured MS11 (db) De-Embedded MS11 (db) 0.0-5.0-10.0 Return Loss (db) -15.0-20.0-25.0-30.0-35.0-40.0-45.0-50.0 0 2 4 6 8 10 12 14 16 18 20 Frequency (GHz) Page 5 of 7
Half Fixture Thru Model The user is encouraged to modify the half fixture thru model to more precisely model the thru line of the specific EVK being measured. The model used to derive the.s2p file on Peregrine s website is shown in Figure 8. To assure this represents the thru line measurements, two half fixture lumped element models are cascaded, back-to-back, and compared and optimized against the thru line measured results. It is expected that PCB manufacturing variations will cause some differences in the results for each distinct EVK. Automatic fixture removal (AFR) techniques can be applied directly as well using the provided thru line on the EVK s PCB. Figure 8. Half Fixture Thru Schematic Model P1 Num = 1 TLIN TL3 E = 20.7 F = 1 GHz L L1 L = 82 ph R = 0.105 C C3 C = 2.5 ff C C4 C = 2.5 ff TLINP TL1 L = 1.75*0.5 in K = 4.6 A = 2.86 F = 1 GHz TanD = 0.014193 Mur = 1 TanM = 0 Sigma = 0 P2 Num = 2 Page 6 of 7 Document No. DOC-12215-1 UltraCMOS RFIC Solutions
Conclusion This discussion of vector de-embedding has described how to achieve de-embedded measurements for the PE42542 and PE42543 high frequency SP4T evaluation sample kits. A typical half fixture thru set of S- parameters is available from the Peregrine Semiconductor website for use in de-embedding additional measurements. The methodology in this application note can readily be implemented within ADS, as described, or within other matrix handling environments such as Matlab. The information in this document is believed to be reliable. However, Peregrine assumes no liability for the use of this information. Use shall be entirely at the user s own risk. No patent rights or licenses to any circuits described in this datasheet are implied or granted to any third party. Peregrine s products are not designed or intended for use in devices or systems intended for surgical implant, or in other applications intended to support or sustain life, or in any application in which the failure of the Peregrine product could create a situation in which personal injury or death might occur. Peregrine assumes no liability for damages, including consequential or incidental damages, arising out of the use of its products in such applications. The Peregrine name, logo, UltraCMOS and UTSi are registered trademarks and HaRP, MultiSwitch and DuNE are trademarks of Peregrine Semiconductor Corp. All other trademarks mentioned herein are the property of their respective owners. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com. Page 7 of 7