PAM8 Baseline Proposal

Similar documents
Baseline proposal update

100GBASE-DR2: A Baseline Proposal for the 100G 500m Two Lane Objective. Brian Welch (Luxtera)

Investigation of PAM-4/6/8 Signaling and FEC for 100 Gb/s Serial Transmission

Investigation of PAM-4/6/8 Signaling and FEC for 100 Gb/s Serial Transmission

Proposal for 400GE Optical PMD for 2km SMF Objective based on 4 x 100G PAM4

100G CWDM Link Model for DM DFB Lasers. John Petrilla: Avago Technologies May 2013

10GBASE-LRM Interoperability & Technical Feasibility Report

100G MMF 20m & 100m Link Model Comparison. John Petrilla: Avago Technologies March 2013

100G PSM4 & RS(528, 514, 7, 10) FEC. John Petrilla: Avago Technologies September 2012

100GBASE-SR4 Extinction Ratio Requirement. John Petrilla: Avago Technologies September 2013

100GBASE-FR2, -LR2 Baseline Proposal

64G Fibre Channel strawman update. 6 th Dec 2016, rv1 Jonathan King, Finisar

200GBASE-DR4: A Baseline Proposal for the 200G 500m Objective. Brian Welch (Luxtera)

SMF Ad Hoc report. Pete Anslow, Ciena, SMF Ad Hoc Chair. IEEE P802.3bm, Geneva, September 2012

100G SR4 Link Model Update & TDP. John Petrilla: Avago Technologies January 2013

100G-FR and 100G-LR Technical Specifications

40GBASE-ER4 optical budget

400G-FR4 Technical Specification

500 m SMF Objective Baseline Proposal

FEC Codes for 400 Gbps 802.3bs. Sudeep Bhoja, Inphi Vasu Parthasarathy, Broadcom Zhongfeng Wang, Broadcom

Systematic Tx Eye Mask Definition. John Petrilla, Avago Technologies March 2009

40G SWDM4 MSA Technical Specifications Optical Specifications

40G SWDM4 MSA Technical Specifications Optical Specifications

Technical Feasibility of Single Wavelength 400GbE 2km &10km application

50 Gb/s per lane MMF baseline proposals. P802.3cd, Whistler, BC 21 st May 2016 Jonathan King, Finisar Jonathan Ingham, FIT

50 Gb/s per lane MMF objectives. IEEE 50G & NGOATH Study Group January 2016, Atlanta, GA Jonathan King, Finisar

TP2 and TP3 Parameter Measurement Test Readiness

Further information on PAM4 error performance and power budget considerations

Comparison of options for 40 Gb/s PMD for 10 km duplex SMF and recommendations

Recommended Changes to Optical PMD Proposal

Improved extinction ratio specifications. Piers Dawe Mellanox

Baseline Proposal for 200 Gb/s Ethernet 40 km SMF 200GBASE-ER4 in 802.3cn

Optical transmission feasibility for 400GbE extended reach PMD. Yoshiaki Sone NTT IEEE802.3 Industry Connections NG-ECDC Ad hoc, Whistler, May 2016

Ordering information. 40Gb/s QSFP+ ER4 Optical Transceiver Product Specification. Features

802.3bj FEC Overview and Status IEEE P802.3bm

Component BW requirement of 56Gbaud Modulations for 400GbE 2 & 10km PMD

PAM8 Gearbox issues Andre Szczepanek. PAM8 gearbox issues 1

Ali Ghiasi. Nov 8, 2011 IEEE GNGOPTX Study Group Atlanta

An Approach To 25GbE SMF 10km Specification IEEE Plenary (Macau) Kohichi Tamura

Further Investigation of Bit Multiplexing in 400GbE PMA

802.3bj FEC Overview and Status. 400GbE PCS Baseline Proposal DRAFT. IEEE P802.3bs 400 Gb/s Ethernet Task Force

40GBd QSFP+ SR4 Transceiver

100G QSFP28 SR4 Transceiver

10Gbps SFP+ Optical Transceiver, 10km Reach

Features: Compliance: Applications: Warranty: 49Y7928-GT QSFP+ 40G BASE-SR Transceiver IBM Compatible

Analysis on Feasibility to Support a 40km Objective in 50/200/400GbE. Xinyuan Wang, Yu Xu Huawei Technologies

De-correlating 100GBASE-KR4/CR4 training sequences between lanes

Impact of Clock Content on the CDR with Propose Resolution

Investigation on Technical Feasibility of Stronger RS FEC for 400GbE

Performance Results: High Gain FEC over DMT

EVLA Fiber Selection Critical Design Review

10GBASE-R Test Patterns

Measurements Results of GBd VCSEL Over OM3 with and without Equalization

100GEL C2M Channel Reach Update

Maps of OMA, TDP and mean power. Piers Dawe Mellanox Technologies

o-microgigacn Data Sheet Revision Channel Optical Transceiver Module Part Number: Module: FPD-010R008-0E Patch Cord: FOC-CC****

PRE-QSFP-LR4L 100G QSFP 28 Dual Range Optical Transceiver, 10km. Product Features: General Product Description:

FEC Architectural Considerations

Toward Baseline for 400GBASE-ZR Optical Specs

10Gbps 10km Range 1310nm SFP+ Optical Transceiver

100Gb/s Single-lane SERDES Discussion. Phil Sun, Credo Semiconductor IEEE New Ethernet Applications Ad Hoc May 24, 2017

The receiver section uses an integrated InGaAs detector preamplifier (IDP) mounted in an optical header and a limiting postamplifier

10Gb/s SFP+ ER 1550nm Cooled EML with TEC, PIN Receiver 40km transmission distance

SFP-10G-LR (10G BASE-LR SFP+) Datasheet

Transmitter Preemphasis: An Easier Path to 99% Coverage at 300m?

Proposed reference equalizer change in Clause 124 (TDECQ/SECQ. methodologies).

TP2 con-call comment resolution - actions from Austin - May 26 June 9 (3 calls) Tom Lindsay 802.3aq London, June 2005

Draft Baseline Proposal for CDAUI-8 Chipto-Module (C2M) Electrical Interface (NRZ)

Draft 100G SR4 TxVEC - TDP Update. John Petrilla: Avago Technologies February 2014

10Gbps 10km Range SFP+ Optical Transceiver

P802.3av interim, Shanghai, PRC

802.3bj FEC Overview and Status. PCS, FEC and PMA Sublayer Baseline Proposal DRAFT. IEEE P802.3ck

Product Specification 10km Multi-rate 100G QSFP28 Optical Transceiver Module FTLC1151SDPL

Product Specification 100m Multirate Parallel MMF 100/128G QSFP28 Optical Transceiver FTLC9551SEPM

Reducing input dynamic range of SOA-preamplifier for 100G-EPON upstream

FEC Options. IEEE P802.3bj January 2011 Newport Beach

100G EDR and QSFP+ Cable Test Solutions

The Case of the Closing Eyes: Is PAM the Answer? Is NRZ dead?

Backplane NRZ FEC Baseline Proposal

Improving the Performance of Advanced Modulation Scheme. Yoshiaki Sone NTT IEEE802.3bs 400 Gb/s Ethernet Task Force, San Antonio, Novenver 2014.

EMPOWERFIBER 10Gbps 2km SFP+ Optical Transceiver EPP C

Summary of NRZ CDAUI proposals

Next Generation Ultra-High speed standards measurements of Optical and Electrical signals

Ver.0.3 Sept NTC2-HFER-3SOH. 100Gbps CFP2 Transceiver 1/7. 100Gb/s CFP2 Optical Transceiver Module. Feature. Application

QSFP SV-QSFP-40G-PSR4

CFPQD010C10D CFP Dual Fibre 1310nm* / 10km / 100GBASE-LR4 & OTN OTU4

Features: Compliance: Applications: Warranty: QSFP-40G-LR4-GT 40GBASE-LR4 QSFP+ SMF Module Cisco Compatible

N4917BACA Optical Receiver Stress Test Solution 100 Gb/s Ethernet

32 G/64 Gbaud Multi Channel PAM4 BERT

CDAUI-8 Chip-to-Module (C2M) System Analysis #3. Ben Smith and Stephane Dallaire, Inphi Corporation IEEE 802.3bs, Bonita Springs, September 2015

CAUI-4 Chip to Chip and Chip to Module Applications

Product Specification 56Gbps 60/100m QSFP+ Optical Transceiver Module FTL414QB2C APPLICATIONS

802.3cd (comments #i-79-81).

Parameter Symbol Min. Typ. Max. Unit. Supply Voltage Vcc V. Input Voltage Vin -0.3 Vcc+0.3 V. Storage Temperature Tst C

Ali Ghiasi. Jan 23, 2011 IEEE GNGOPTX Study Group Newport Beach

CAUI-4 Chip to Chip Simulations

DataCom: Practical PAM4 Test Methods for Electrical CDAUI8/VSR-PAM4, Optical 400G-BASE LR8/FR8/DR4

SHF Communication Technologies AG

Performance comparison study for Rx vs Tx based equalization for C2M links

Update on FEC Proposal for 10GbE Backplane Ethernet. Andrey Belegolovy Andrey Ovchinnikov Ilango. Ganga Fulvio Spagna Luke Chang

Transcription:

PAM8 Baseline Proposal Authors: Chris Bergey Luxtera Vipul Bhatt Cisco Sudeep Bhoja Inphi Arash Farhood Cortina Ali Ghiasi Broadcom Gary Nicholl Cisco Andre Szczepanek -- InPhi Norm Swenson Clariphy Vivek Telang Broadcom Matt Traverso Cisco Zhongfeng Wang Broadcom Brian Welch Luxtera Presenter: Vipul Bhatt Cisco IEEE P802.3bm 40 Gb/s and 100 Gb/s Fiber Optic Task Force, Jan 2013

Supporters Dave Lewis, JDSU Beck Mason, JDSU Torben Nielsen, Acacia Dan Stevens, Fujitsu Semiconductor 2

Introduction One of P802.3bm adopted objectives : Define a 100 Gb/s PHY for operation up to at least 500m of SMF PAM PMD has been discussed as a cost-efficient solution in previous meetings. PAM8 PMD is proposed here Single laser, Externally Modulated Link budget up to 4 db Link reach 500 m Longer reach may be feasible. Link transmit and receive characteristics and illustrative link budget are presented 3

802.3 Architecture Options MAC/RS 100GBASE-R PCS PMA (20:10) CAUI PMA (10-20) RS-FEC (KR4) PMA (4:4) CAUI-4 PMA (4:4) PAM 8-FEC PAM 8-PMA PMD MAC/RS 100GBASE-R PCS PMA (20:4) CAUI-4 PMA (4:20) RS-FEC (KR4) PAM 8-FEC PAM 8-PMA PMD MDI Medium 100GBASE-FR MAC/RS 100GBASE-R PCS RS-FEC (KR4) PMA (4:4) CAUI-4 PMA (4:4) PAM 8-FEC PAM 8-PMA PMD MDI Medium 100GBASE-FR Medium MDI 100GBASE-FR = New Functionality PAM 8-FEC: PAM 8 FEC and Mapping PAM 8-PMA: PAM 8 Physical Media Attach (Serdes) 100GBASE-FR: 500m, SMF, Single Lambda 4

PAM-8 Block Diagram Showing segmented modulator and traditional MZM/EA CDR Gear box TIA CDR CDR CDR CDR FEC Encod er 40.4 Gs/s DAC Or Segmented MZM Driver MZM/EA PIN 40.4Gs/s ADC FEC Decod er CDR CDR CDR CAUI-4 CAUI-4 5

PAM8 Measurements 32 Gbaud, 8 PAM electrical eye, using DAC 28 GBaud 10 GBaud http://www.ieee802.org/3/bm/public/sep12/lewis_01_0912_optx.pdf http://www.ieee802.org/3/100gngoptx/public/jul12/schell_01_0712_optx.pdf PAM-8 measurements results have been presented at.bm EML is used as light source and external modulator 6

PAM-8 Link Budget 0 dbm Tx OMA ChIL: Cable, Connectors -4 dbm Penalties (RIN, MPI, Pcross/2) -6.35 dbm Stressed Rx Sensitivity, with equalization Residual ISI Penalty + (Pcross/2) -8.6 dbm Nominal Rx Sensitivity, with equalization Equalization: 2.25 db out of 4.50 db ISI Penalty PAM Penalty (10*log(7)) -17 dbm PAM-2 Nominal Rx Sensitivity, Q=2.87 (BER 2e-3), thermal noise (17 pa/sqrt(hz)), 22 GHz bandwidth, Responsiviity 0.85 A/W, shot noise was negligible. 7

Transmitter Characteristics Parameter Unit Electrical Baud Rate (per Lane) 25.78125 Optical Baud Rate (per Lane) 40.4296875 GBd Modulation PAM-8 Center Wavelength, min 1300 nm Center Wavelength, max 1320 nm OMA, min 0 dbm Extinction Ratio, min 6 db RIN -142 db/hz Transmitter reflectance -35 db 8

Transmitter Output Jitter Parameter Limit Test Pattern Condition Unit TWDP 1 2 PRBS15 dbo Qsq (linear) 32 68.6.7 NA DCD 0.035 Clock 8 ones/8 zeros Effective Random Jitter (1 s) 1, 2 0.015 PN15 PAM-2 UI UI Effective Deterministic Jitter (p-p) 1, 2 0.15 PN15 PAM-2 1. Waveforms and jitter are captured with reference CDR having loop BW of Fbaud/40430 2. Effective random jitter and deterministic jitter is the Dual-Dirac fitted parameters from Q=2 to Q=5 with minimum of 64 kbits of samples or equivalent edges UI 9

Transmitter Testing Use a modified version of the Transmitter Waveform and Dispersion Penalty method (Clause 68.6.6) Computes penalty for deterministic impairments Capture digitized transmitter output (for example, on scope) Average over several cycles of PRBS to remove noise Compute SNR for an ideal matched filter receiver with ideal rectangular PAM constellation (reference SNR) Process waveform through a channel model and reference receiver Compute semi-analytic BER assuming a given level of receiver noise Convert to equivalent SNR for ideal waveform and ideal receiver Penalty is difference between equivalent SNR and reference SNR Set a maximum limit on TWDP 10

Receiver Characteristics Parameter Unit Rate 40.4296875 Gs/s GBd Modulation PAM-8 Wavelength Range 1302 1322 nm Rx Avg. Power (max) 2 dbm Rx reflectance -35 db Parameter Limit Test Pattern Condition Unit Stressed Rx Sensitivity (OMA) -6.35 PN31 dbo Rx Sensitivity unstressed (OMA) 1-8.6 PN31, PAM-2 dbo Receiver CDR tracking unstressed (1, 75) PN31, PAM-2 (UI, khz) Receiver CDR tracking unstressed (0.2, 375) PN31, PAM-2 (UI, khz) 1. Tested with reference transmitter operating in PAM-2 mode with Q = 2.87, adjusted for PAM Penalty 11

SJ Tolerance Mask Receiver is tested unstressed with PAM-2 signal similar to 10Gbase- LRM assuming TX golden CDR having response as shown and slope of 5e4/f 1 UI @75 KHz (~ 1.5 the TX CDR would allow) 0.2 UI @375 KHz (~ 1.5x the TX CDR would allow) 5 UI 1UI @ 75 KHz SJ=5^4/f 0.2 UI @ 375 KHz 0.05 UI 10 KHz 1.0 MHz 12

Channel Characteristics Description Value Unit Operating Distance (max) 500 m Channel Insertion Loss (max) 4 db Positive Dispersion (max) 1.0 ps/nm Negative Dispersion (max) -2.0 ps/nm Optical Return Loss (min)* 29 db * Based on 35 db RL for connectors per ISO/IEC 11801, dual-trunk architecture model having up to 8 connectors with a mix of APC and non-apc types. 13

Multilevel Coding using bj FEC 14

Low-Latency PAM-8 Strong FEC Proposal Block size: 8280 Code Rate: 119/207 Number of Extra OH bits: 200 Code rate including extra OH: 38/69 (Approximately 0.55) Spectral Efficiency (Excluding bj FEC): 1+1+38/69=176/69 (Approximately 2.55) Baud-Rate=103.125*69/176=40.4296875 Gs/s CAUI-4 clock to PAM-8 clock conversion ratio: 69/44 This is a simple multiple of 156.25MHz. 100G Base KP4 is using a similar 2 digit ratio PAM-8 SNR for 1E-15 BER: 19.6dB The 6dB Set-Partition gain does not fully materialize because some of the optical noise sources are amplitude dependent (such as RIN). If the noise was AWGN, then the PAM-8 SNR for 1E-15 BER should have been 19.3dB. So there is a loss of 0.3dB due to non-awgn noise effect Strong FEC Encoder latency: 25ns 50ns Strong FEC Decoder latency: 305ns RS bj FEC Decoder latency : 100ns If the RS FEC is integrated with strong FEC, this additional latency can be reduced to 45 ns. 15

BER Example Coded Modulation Sim Results 10-2 10-4 PAM8 Uncoded PAM8 Coded Modulation 10-6 10-8 10-10 10-12 10-14 10-16 11.67dB 10-18 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 SNR PAM8 coded modulation FEC delivers 11.67dB coding gain 16

FFS: Options to Reduce Latency DSQ32 is a 2-dimensional constellation mapping Constellation comprised of 32 PAM-8 points Data is encoded over 2 consecutive symbols Encoded signaling rate = 42.4GBd Latency < 150ns X(2k) X(2k-1) How constellation manifests as optical eye at TP2 17

Summary We have proposed a PAM8 solution to address 802.3bm 500 m SMF objective. Complexity transferred to digital CMOS. Simpler optics, single laser, low cost. 18

Backup 19

Note: Animated in Slide Show Straight PAM8 L7 (1 volt) MLC-PAM8 L7 000 = L0 111 = L7 L6 L5 L4 L6 L4 L5 Level within PAM4 Constellation L3 L3 L2 L2 L1 L1 L0 (0 volt) L0 PAM4#0 PAM4#1 PAM4 Constellation b1 b2 b3 Input data stream MLC Not all bits are equal. Focus FEC overhead/gain where it adds most value Treat one bit b1 as PAM8. Treat lower two bits (b2,b3) as PAM4 Target all FEC overhead/gain to protecting the upper bit, and no FEC to lower two bits Enables higher FEC coding gain without bumping up the symbol (data) rate A 10% overhead FEC (on aggregate) results in 30% overhead FEC on upper bit 20