DESIGN OF INTERPOLATION FILTER FOR WIDEBAND COMMUNICATION SYSTEM

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ternational Journal of novative Research in Science, DESIGN OF INTERPOLATION FILTER FOR WIDEBAND COMMUNICATION SYSTEM Jaspreet Kaur, Gaurav Mittal 2 Student, Bhai Gurudas College of, Sangrur, dia Assistant Professor, Bhai Gurudas College of, Sangrur, dia 2 Abstract: terpolation filters are integral part of a modern communication transmitter. This paper presents the design and FPGA implementation for a digital up converter or interpolation filter for a WiMAX Communication system. Multistage implementation approach has been used to reduce the hardware requirement. The results have been presented for a xc3sd800a-4fg676 FPGA device. Keywords: Digital Up Converter, FPGA, terpolation, Multistage, WiMAX. I. INTRODUCTION Modern signal processing problems are often solved in the digital domain due to the availability of powerful VLSI circuits which allow to perform complex operations in real-time, without the well-known shortcomings of analog implementations. The source signal is transformed into the digital domain by an A/D converter. All data processing, e.g. filtering, shaping, mixing etc., is done in the digital domain and only the final result is converted back to analog. To overcome the degradation caused by successive A/D-D/A conversion, all processing blocks must have digital interfaces. Depending on the available bandwidth of the channel, the required quality, and the data rate of the interfaces a wide variety of sample rates are used. The incorporation of all these systems is however trouble-free, if a sample-rate converter is used at each interface. Samplerate conversion is used in the field of communications systems, speech processing systems, antenna systems and radar systems etc. Many types of sampling have been discussed in the literature including non-uniform sampling, uniform sampling, and multiple function uniform sampling. The most common form of sampling is periodic sampling in which qt t T n (l) i.e., the samples xd n are uniformly spaced in the dimension t, occurring nt apart. For uniform sampling we define the sampling period as T and the sampling rate as Copyright to IJIRSET www.ijirset.com 426

ternational Journal of novative Research in Science, F T (2) It is necessary that the sampling rate F be chosen to satisfy the requirements of the Nyquist sampling theorem. The sampling rate F is a fundamental consideration in many signal processing techniques and applications. It often determines the convenience, efficiency, and accuracy in which the signal processing can be performed. The process of digitally converting the sampling rate of a signal from a given rate F to a different rate F is T T calledsampling rate conversion. When the new sampling rate is higher than the original sampling rate, the process is called interpolation, whereas the process of digitally converting the sampling rate of a signal from a given rateto a lower rate is called decimation.fig. provides a general description of a sampling rate conversion system. The ratio of sampling periods of ym and Fig. Basic process of digital sampling rate conversion. xn can be expressed as a rational fraction, T F M T F L (3) where M and L are integers. samples Forlinear time-varying systems, each output sample ym ) can be expressed as a linear combination of input xn. Mathematically ym can be expressed as m (4) y( m) g ( n) x [ nm / L] n n the trivial case when T = T, or L = M =, equation (4) reduces to the simple time-invariant digital convolution equation (5) y( m) g( n) x m n n Copyright to IJIRSET www.ijirset.com 427

ternational Journal of novative Research in Science, II. If the sampling rate is increased by an SAMPLING RATE UP CONVERSION integer factor L, then the new sampling period T is T (6) T L and the new sampling rate F LF. This process of increasing the sampling rate of a signal xn by L implies that we must interpolate Lnew sample values between each pair of sample values of xn. Fig. 2Block diagram of terpolator Fig. 2 shows the conceptual block diagram of interpolator. For interpolation by factor L, L zero values have to wm given as be inserted between each pair of samples of xn, resulting in the signal, x( m / L), m 0, L, 2 L,... (7) wm ( ) 0, otherwise To recover the baseband signal of interest and eliminate the unwanted higher frequency components it isnecessary to filter the signal wm with a digital low-pass filter, which approximates the ideal characteristic 2 FT j G, / L He (8) ( ) 2 0, otherwise J If He denote the frequency response of an actual filter that approximates the characteristic in (8), then j j jl Y( e ) H ( e ) X ( e ) (9) J and from(8),using the approximated value of He, (20) can be written as Copyright to IJIRSET www.ijirset.com 428

ternational Journal of novative Research in Science, jl j GX ( e ), / L Ye ( ) (0) 0, otherwise III. DESIGN OF INTERPOLATION FILTER System Generator TP 0 TP TP 2 TP 3 TP 4 TP 5 Fix _6_5 Fix _6_5 Fix _6_5 Fix _6_5 UFix 0 UFix _32_0 UFix _6_6 UFix _6_5 P Pvalid P boolean Stimulus wimax _duc Fig.3 System Generator Model for terpolation Filter 2 I0 Q0 ChannelFilter FirstHalfband SecondHalfband ThirdHalfband V0 I Q 2 V 3 4 putmux 3 4 Fig. 4 ternal View of Multistage Implementation Figure 3 show the complete setup developed using system generator and Figure 6 shows the details of DUC module. Figure 4 shows the internal view of multistage implementation of interpolation filterthe setup shown in Figure 3 has been simulated and synthesized using ISE 9.2i software. Table shows the resources used by the design for xc3sd800a-4fg676 FPGA device. Copyright to IJIRSET www.ijirset.com 429

ternational Journal of novative Research in Science, Table. Resource Utilization From Table, it has been concluded that the proposed design uses only very small number of FPGA resources. IV. CONCLUSION DUC is in integral part of a digital communication receiver and its multistage design leads to the requirement of less number of FPGA resources. This paper shows the successful implementation of DUC for a WiMAX system. The resources utilized by the proposed design are well below the hardware utilization reported in previous works. REFERENCES. J.G. Proakis and D.G. Manolakis, "Digital Signal Processing: Principles, Algorithms and Applications (3rd ed.)", New Delhi: PHI Publications c., 2006. 2. Wenmiao Song &BoLiu,"Design of the CIC decimation filter Based on SOPC Builder", 978--4244-5540-9/0/200 IEEE. 3. Yun Zhao, Li Jun Wang, and Jian Liang Xu,"Implementation of Sample Rate Conversion in Direct RF Synthesis Transmitter", 20 Cross Strait Quad-Regional Radio Science and Wireless Technology Conference 978--4244-9793-5//20 IEEE. Copyright to IJIRSET www.ijirset.com 430