8.6.5 Synchronous sequential Table of content. Combinational circuit design. Elementary combinatorial for data transmission. Memory structures 4. Programmable logic devices 5. Algorithmic minimization approaches 6. Sequential circuit design 6. Synthesis of sequential 6. Standard sequential 6.. Counters 6Shift 6.. Registers 7. Testing digital
8.6.5 6. Synthesis of sequential Specify the problem, circuit behaviour Definition of In- and Output variables Derive state diagram/ state table/ type of state machine (Moore, Mealy, ) => Result: uncoded state table of a certain type of machine; e.g. Moore Machine State coding Calculate FF equations Design circuit for the output function Choose type of flip flop and calculate flip-flops flops input functions Design of the circuit for the state transition function Eventual transformation of the logical expressions into suitable structured expressions Application in the circuit diagram 6. Synthesis of sequential Specify the problem, circuit behaviour Definition of In- and Output variables Derive state diagram/ state table/ type of state machine (Moore, Mealy, ) => Result: uncoded state table of a certain type of machine; e.g. Moore Machine 4
8.6.5 6. Synthesis of sequential Specify the problem, circuit behaviour Definition of In- and Output variables Derive state diagram/ state table/ type of state machine (Moore, Mealy, ) => Result: uncoded state table of a certain type of machine; e.g. Moore Machine 5 6. Synthesis of sequential Specify the problem, circuit behaviour Definition of In- and Output variables Derive state diagram/ state table/ type of state machine (Moore, Mealy, ) => Result: uncoded state table of a certain type of machine; e.g. Moore Machine State coding Present state Z Z. Zn Input Variables x x x xn Next states zij Out put Y Y.. Yn 6
8.6.5 6. Synthesis of sequential Specify the problem, circuit behaviour Definition of In- and Output variables Derive state diagram/ state table/ type of state machine (Moore, Mealy, ) => Result: uncoded state table of a certain type of machine; e.g. Moore Machine State coding/ number of FFs See example State minimization; if needed e.g. Moore Algorithm Present state Z Z. Zn Present state Input Variables x x x xn Next states zij Out put Y Y.. Yn ab ab ab ab Out I I II put Z= I I I Z= I I Z= I I Q Q Q Q 7 6. Synthesis of sequential Derive FF equations Present state ab ab ab ab Out I I II put Z= I I I Z= I I Z= I I Q Q Q Q 8 4
8.6.5 6. Synthesis of sequential Derive FF equations Present state ab ab ab ab Out I I II put Z= I I I Z= I I Z= I I Q Q Q Q 9 6. Synthesis of sequential Derive FF equations Present state ab ab ab ab Out I I II put Z= I I I Z= I I Z= I I Q Q Q Q Derive output function 5
8.6.5 6. Synthesis of sequential Combinatorial circuit Design circuit for the output function Flip Flops Combinatorial circuit 6. Synthesis of sequential Combinatorial circuit Choice of type of flip flop and calculate flip-flops input functions e.g. JK Flip Flops Flip Flops Combinatorial circuit 6
8.6.5 6. Synthesis of sequential Combinatorial circuit Flip Flops Combinatorial circuit 6. Synthesis of sequential Combinatorial circuit Design the circuit for the state transition function Flip Flops Combinatorial circuit 4 7
8.6.5 6. Synthesis of sequential 5 6. Synthesis of sequential Specify the problem, circuit behaviour Definition of In- and Output variables Derive state diagram/ state table/ type of state machine (Moore, Mealy, ) => Result: uncoded state table of a certain type of machine; e.g. Moore Machine State coding Calculate FF equations Design circuit for the output function Choose type of flip flop and calculate flip-flops flops input functions Design of the circuit for the state transition function Eventual transformation of the logical expressions into suitable structured expressions Application in the circuit diagram 6 8
8.6.5 6. Sequential standard 6.. Counters One common requirement in digital is counting, both forward and backward. Example: Digital clocks and watches, timers in a range of appliances from microwave ovens to VCRs counters for other reasons are found in everything from automobiles to test equipment. 7 6. Sequential standard 6.. Counters A binary counter is a sequential circuit that counts, while it proceeds through a pre-defined sequence of states every state of the circuit can be given a number => a counter produces a sequence of numbers => as our counter is a digital system; it counts in a dual number system => every state is interpreted as a dual number Example: - if flip-flop A,B and C are all => counter s state is. - if A is, B is and C is the counter s state is = 5 - and so on. 8 9
8.6.5 6. Sequential standard 6.. Counters The most basic counters will simply increment by with every clock pulse => so after state it will go to => the next pulse will let it switch to etc. It is possible to design counters with any needed counting sequence. Counters can be designed as synchronous sequential asynchronous sequential 9 6. Sequential standard 6.. Counters Characteristics of counters Step Size gives the (fixed) value by which the counter output is incremented/decremented by every pulse most binary counters use a step size of digital in contrast: offset-counters have a variable step size, that can change with every pulse Counting direction uni- directional counters can count in only one direction (forward OR backward) bi-directional counters can count in both directions => a special input line is needed to specify the direction Number format the actual state needs to be stored in a number system. any dual number system can be chosen influence on complexity, power consumption, etc. Implementation ti counters can be implemented in different ways. most common implementations as synchronous and asynchronous counters Even if in this lecture only synchronous sequential are discussed, a short overview on asynchronous counters will be given
8.6.5 6. Sequential standard 6.. Counters Counter Taxonomy of counters Offset Counter Binary Counter Synchronous Asynchronous Forward Backward Bidirektional Forward... Dual Code Dual Code BCD-Code BCD-Code Gray Code Gray Code...... 6. Sequential standard 6.. Counters Counter design generally follows this scheme: Determination of the number of flip-flopsflops Setting up the state table Determination of the input functions for the flip-flops Creation of the circuit Determination of possible initial conditions at initiation of the circuit
8.6.5 6. Sequential standard 6.. Counters Synchronous counters all flip flops a clocked with the same pulse states of all flip flops change synchronous every of the n flip flops represents one digit of the counters output The simplest variation Uses no input lines Conects output lines direct to the flip flop output Example: Design of a 4-bit forward counter Counting sequence of a 4-bit forward counter Flip Flop Output is connected to flip flop output y=f(z) Moore Machine D C B A 4
8.6.5 Example: State table of 4-bit forward counter Current state Next state Current state Next state Q Q Q Q Q Q Q Q Fachgebiet Technische Informatik Q Q Q Q Q Q Q Q Q Q Q Q Q Q 5 Q Q Example: Flip Flop Equations From the KV-Maps it can be found: Q = QQ QQ Q = Q Q Q = Q Q Q Q Q Q Q = ( Q Q ) Q Q Q Q = Q ( Q Q Q ) Q Q Q Q = Q Q Q Q Q Q Q Q Q Q Implementation with JK-Flip Flops k = = J K = Q = J K = Q = Q Q = Q Q Q K = J = J = Q Q = Q Q Q = Q Q Q Q 6
8.6.5 6. Sequential standard 6.. Counters Asynchronous counters do not use the same clock signal for all flip-flops. the first flip-flop however is always controlled by the master clock signal. the clocking of the remaining flip-flops occurs by the outputs of the primary flip-flops. By that: not all flip-flops have to be designed for the maximum clock-input frequency C as not all flip-flops are switched by the master clock, the control functions for those flip-flops simplify. In total this leads: to less complex combinational for controlling the flip-flops to diffent timing beavior: for asynchronous counters propagation time grows with bit-width. 7 Asynchronous 4-bit forward counter Counting sequence from to IIII 8 4
8.6.5 6. Sequential standard 6.. Registers Registers are used to store complete data words (outside view) rather than a single bit use n flip flops, that are synchronously clocked 9 6. Sequential standard 6.. Registers Shift Registers In digital systems data words often are to be send or received bitwise => i.e. one bit every clock pulse. to store such data shift registers are used. a shift register has only one input. with every clock pulse - one bit is loaded into the first flip-flop of the register - while all the actual flip-flop contents are shifted and the oldest bit got dropped. From a circuit-based view the shift register as well as the counter consists of a pure sequential part and a pure combinational part. The data in the register are shifted by the clock pulses from one memory-cell to the next. Mostly a conversion of the data format is possible, such that serial inputs/outputs can be converted into parallel inputs/outputs. 5
8.6.5 Example: Design of a serial shift register Task: A -staged shift register for right shifting input-sequences x={,i} is to be designed. The state of the first input is constantly I and the flip-flops are clocked synchronously. Symbol: State table of a shift register Current State Next State I Q Q Q Q Q Q Q = I Q = Q Q = Q Realisation with D-Flip Flops Flip Flop Equations: 6