ARDESIA: an X-ray Spectroscopy detection system for synchrotron experiments based on arrays of Silicon Drift Detectors.

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ARDESIA: an X-ray Spectroscopy detection system for synchrotron experiments based on arrays of Silicon Drift Detectors Carlo Fiorini Dipartimento di Elettronica, Informazione e Bioingegneria, Politecnico di Milano, and INFN Sez. di Milano, Milano, Italy

Goal: Development of a versatile detector based on arrays of Silicon Drift Detectors and low-noise electronics for X-ray detection The ARDESIA collaboration: Politecnico and INFN-Milano, Italy G.Bellotti, A.D.Butt, C.Fiorini, R.Quaglia, F.Schembari, D.Giove INFN-LNF, Frascati, Italy A.Balerna, E. Bernieri, M.Iliescu, S. Mobilio Fondazione Bruno Kessler FBK, Trento, Italy C.Piemonte, N.Zorzi International Endorsers: F.d Acapito (ESRF), N.Tartoni (Diamond Light Source),.. Project funded by Italian INFN (start: st Jan. 5)

Starting point () SDD technology developed at FBK laboratories, already proved for X-ray Spectroscopy and γ-ray detection with scintillators (C. Fiorini et. al IEEE TNS, 3, R.Quaglia et al., IEEE TNS 5). Wafer produced in the framework of an ESA project, for the development of γ-ray spectrometers based on LaBr 3 readout by SDDs 36 channels. Active area: 4.8x4.8 cm SDD temperature -6 C γ-ray spectra with LaBr 3 coupled to the 4 SDD arrays FBK production : 4 wafer (leak. current: na/cm ) now 6 wafer (leak. current: <pa/cm, Bertuccio et al. 4) x mm Array: 9 SDDs (8 x 8 8 x 8 mm mm each)

CMOS CUBE Preamplifier Starting point () the whole preamplifier is connected close to the SDD (and not only the FET) the high transconductance of the input MOS compensates the larger capacitance introduced in the connection SDD-FET the remaining part of the electronics (e.g. the ASIC of analog processing or a DPP) can be placed relatively far from the detector (even - cm) radiation entrance window SDD 55 Fe signal (SDD) 3 ns CUBE SDD CUBE High performances, in particular at high counting rates, in X-ray spectroscopy applications with SDDs L. Bombelli, et al., CUBE, A Low-noise CMOS Preamplifier as Alternative to JFET Front-end for High-count Rate Spectroscopy, Nuclear Science Symposium Conference Record,, N4-5.

The image cannot be displayed. Your computer may not have enough memory to open the image, or the image may have been corrupted. Restart your computer, and then open the file again. If the red x still appears, you may have to delete the image and then insert it again. X-ray spectroscopy with CUBE preamplifier 55 Fe spectrum. µs shaping time 3. ev Analog pulse processing 55 Fe spectrum 5 ns shaping time. µs total processing time 6.4 ev Counts 6 x 4 5 4 3 4.6 ev with 3 ns total processing time ( ns peaking and ns flat-top ) 5 7.5 Digital pulse processing SDD characteristics: Area = mm (round shaped) T= -4 C (Peltier cooling) leakage about na/cm at RT uncollimated source

Monolithic array of 3x3 SDDs and CUBEs 5.8cm active area (85% of chip area) Bias through the punch through mechanism 6 mm 6 mm 3 x 4 3 x 4 3.5 x 4 C o unts.5.5 3.9 ev C ounts.5.5 4.8 ev C o unts 3.5.5 3.6 ev.5.5.5 C ou nts.5.5.5 3 x 4 3.7 ev C ou nts 3.5 x 4 3.5.5.5 3.9 ev C o unts 3.5 x 4 3.5.5.5 3.8 ev 3 x 4 3.5 x 4 3.5 x 4 C ounts.5.5 34.3 ev C ou nts 3.5.5 34. ev C ounts 3.5.5 3.5 ev.5.5.5 T 9 K, 6 µs peaking time Mn-Ka peak stability over 7 days

ARDESIA: an X-ray spectroscopy detector for Synchrotron applications Sample XRF and XAFS S K edge DXR- DAΦNE-Light ARDESIA development: detector processing electronics data Acquisition system preliminary experiments at beamlines

Preliminary requirements list (contributions are welcome!) Energy range:.kev 5keV (Si detection region) Energy resolution vs. counting rate: i) best resolution (e.g. 3eV@Mn-Kα) at moderate rates ii) maximized throughput (e.g. Mcps/ch.) with <5eV Geometrical constraints: fitting synchrotron exp. chamber (e.g. 6 mm max. flange inner diameter) scattering minimization ( 9 geometry ) maximize count rate (detector close to the sample, e.g. cm) Peltier cooler, better if operations close to room T Operations in vacuum or in air (with window) Modularity, scalability, easy replacement of units

Approach for ARDESIA design Monolithic array of many units compact, low dead area high-rate capability complex, yield issues many readout channels trade off Array of single units simple, modular large dead area few readout channels Assembly of monolithic arrays of few units simple, modular high-rate capability medium/large dead area 4-6-36 readout channels Possible configurations: area single SDD: -5mm max. output rate:.5-mcps/ch. (analog, digital) X-ray beam X-ray beam X-ray beam sample sample sample

Simulated performances (preliminary) A=5mm low leakage FBK technology CUBE trapezoidal shaping @5.9keV C C Possible worsening effects due to drift time issues for short processing times to be evaluated! C - C - C -4 C -3 C Peaking time [µs]

Readout electronics: analog and digital ARDESIA will provide an analog solution as baseline SFERA (ASIC) It will be also fully compatible and tested using Digital Pulse Processors DAQ compatible with synchrotron beamlines experimental setup SFERA (Silicon-Drift-Detectors Front-End Readout ASIC) 6 analog channels Shaper with selectable gain and peaking times (9 th order complex poles) Fast shaper (9 th order complex poles) Pile-up rejector Integrated -bit ADC SPI programming

Conclusions ARDESIA is aiming to provide a detection system for high-rates and high-resolution X-ray spectroscopy at Synchrotron facilities The project is open to include requirements/suggestions from potentially interested users Collaborations with companies during the development are welcome