Features STEVAL-ISA050V Monolithic VR for chipset and DDR/3 demonstration board based on the PM664 Data Brief Switching section 0.8 V ±% voltage reference.7 V to 5.5 V input voltage range Fast response, constant frequency, current mode control Three independent, adjustable, SMPS For DDR/3 (VDDQ) and chipset supply S3-S5 states compliant DDR/3 section Active soft-end for all outputs Selectable tracking discharge for VDDQ Separate Power Good signals Pulse skipping at light load Programmable current limit and soft-start for all outputs Latched OVP, UVP protection Thermal protection Reference and termination voltages (VTTREF and VTT) ± Apk LDO for DDR/3 termination (VTT) with fold back Remote VTT output sensing High-Z VTT output in S3 ±5 ma low noise DDR/3 buffered reference (VTTREF) STEVAL-ISA050V ±5 ma low noise buffered reference. Each regulator is provided of basic under voltage (UV) and over voltage (OV) protections, programmable soft-start and current limit, active soft-end and pulse-skipping at light loads. Application Supply for ultra-mobile PC (UMPC) Description The STEVAL-ISA050V demonstration board is based on the PM664, that is a monolithic voltage regulator module, with internal Power MOSFET, specifically designed to supply DDR/3 memory and chipset in ultra-mobile PC and real estate portable systems. It integrates three independent, adjustable, constant frequency buck converters, a ± Apk low drop-out (LDO) linear regulator and a November 008 Rev /4 For further information contact your local STMicroelectronics sales office. www.st.com 4
Circuit schematic STEVAL-ISA050V Circuit schematic Figure. Schematic TP8 R34 JP3 R0 0603-603-68k C5 C6 C7 C8 SW DIP-4 0603-0 -00p 0603-00p 0p 0603-00p 0603 603-00 00p C7 B Case - 0u R 0603-603-47k C30 C4 0805-0u C6 0603-00 00p 0603-00n 0n TP4 PG S05 R7 0603-03-68k TP8 + C3 R0 0603-03-80k EL SMD C-0 0u TP6 A TP6 A TP5 TP5 LDOIN TP VTTREF TP4 VTT R 0603-4 3-4R3 C8 0603-33 33n R33 0603 603-join C 0805-5-0u C9 0603-n C3 0603-03-00p TP VOUT_S05 C7 0603-03-00n R3 0603-00 00k R4 0603-68 68k + C5 EL SMD C-0u C5 C6 B Case - 0u B Case - 0 0u 3 JP C 06 06- u R 0603-00 00k C3 0603 603-5 5p C 0603 603- n 3 TP3 R3 0 A_ SET_SWF VOUT_S8 CSNS S_S8_ S_S8_ VSW_S8_ VSW_S8 S8 S8 VFB_S8 COMP_S8 U PM66 664_Q _QFPN EN_VTT EN S5 EN S05 S5 VSW S5_ VSW S5_ S S5_ 5_ S S5_ 5_ VFB S5 COMP S5 SS S5 PG S5 36 35 34 33 3 3 30 9 8 7 6 5 3 4 5 6 7 8 9 R7 0603-00 00k L 839-u u5 R8 0603-0 0k + C8 EL SMD C-0u JP5 C3 0603-03-470p TP PG_S8 R9 0603-68k 3 4 5 6 7 8 9 0 3 4 SS_S8 SS_S05 COMP_S05 VFB_S05 S_S05_ S_S05_ VSW_S05_ VSW_S05 S05 S05_ PG_S05 PG_S8 48 VTT_FB 47 DSCG 46 45 VTTREF LDO_IN 44 VTT 43 VTT_ 4 4 40 A_ 39 SET_PH A_3 38 37 EN_S8 49 THERMAL L3 839-u JP4 C 0603-u R5 0603-5 -50k C 0805 805-0 0u L 839-39-u C 0603-330 330p C33 0603-5 5p 3 C0 0603-n C4 + R3 TP0 VOUT_S5 TP7 3 SW R3 R C34 0603-3-5p TP3 PG_S5 TP9 VOUT S8 R 0603-4 3-4R3 JP7 JP8 EL SMD C-0u R6 0603- -0k STRIP STRIP R3 0603-03-68k C4 0603-03-330p 30p C9 B Case - 0u TP R R30 C3 0805-0 0u TP7 4 5 R8 0603-68k C0 B Case - 0 0u 3 8 7 6 C9 0603-0 -00p R9 0603-03-56k JP6 3 AM0386v /4
STEVAL-ISA050V Revision history Revision history Table. Document revision history Date Revision Changes -Nov-008 Initial release. 3/4
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