ECE 274 - Digital Logic Lecture Datapath Components: Processor: Controller + Datapath Lecture Parallel Load Register Shift Registers Multifunction Registers Multifunction Register Design Process Controller Data Inputs Datapath Control Outputs Control Inputs Data Outputs 1 2 Datapath Components: Registers Datapath Components: Parallel Load Register 4-bit Parallel Load Register Ability to choose between previous and new value Load all bits at the same time Additional Desired Functionality: Ability to choose between previous and new value Load all bits at the same time 3 4 Datapath Components: Parallel Load Register Example Datapath Components: Parallel Load Register Example Basic parallel load register example. Basic register example: (a) timing diagram, and (b) the contents of each register. 5 6
Datapath Components: Design Example: Weight Sampler Datapath Components: Design Example: Weight Sampler Weight Sampler: Functional Description: Display Weight of objects placed on scale Display Present weight Display Saved weight stored upon Save button being pressed 7 Weight sampler implemented using a 4-bit parallel load register. Sequential Logic Design Controllers: Design Example Circuit Description: Temperature History Storage Functional Description: Design a system that records the outside temperature every hours and displays the last three recorded temperatures. Inputs: c: clock signal x4..0: 5-bit temperature reading Outputs: a4..0, b4..0, c4..0: 5-bit temperature readings to be displayed Datapath Components 9 Internal design of the TemperatureHistoryStorage component, using parallel load registers. 10 From the car s central computer? T A I M I0 I1 I2 I3 -bit 4x1 D D s1s0 x y button To the abovemirror display We ll design this later 11 12
User Input Circuit Circuit 13 14 An electronic checkerboard: Eight -bit registers (R7 through R0) can be used to drive the 64 LEDs, using one register per column, and detail of how one register connects to a column s LEDs. 15 Timing diagram indicating an input sequence that can be used to initialize 16 Datapath Components: Computer Components: Shift Registers Shift Register: Register that can move contents left/right Checkerboard after loading registers for initial checker positions. Right shift example: (a) sample contents before and after a right shift, and (b) bit-by-bit view of the shift. 17 1
Datapath Components: Computer Components: Shift Registers Datapath Components: Computer Components: Rotator Shift register: (a) implementation, (b) paths when shr=1, and (c) block symbol. 19 20 Datapath Components: Not really a quiz, but it is a CHALLENGE!! Design a 4-bit shift register with a shift-in input that will allow you to shift left by 0-3 positions on one clock cycle. Clearly indicate the following: Inputs Outputs Implementation 21 If you implement this diagram using shift registers, by how many input wires will we need? A) 1 B) 6 C) 22 4-bit register with multiple operations: parallel load shift right Operation Table 23 24
4-bit register with multiple operations: Parallel load Shift right Shift left Operation table of a 4-bit register with parallel load, shift left, and shift right operations. Operation table of a 4-bit register with separate control inputs for parallel load, shift left, and shift right. 25 26 A small combinational circuit maps the control inputs ld, shr, and shl to the mux select inputs s1 and s0. 27 Truth tables describing operations of a register with left/right shift and parallel load along with the mapping of the register control inputs to the internal 4x1 mux select lines: (a) complete operation table defining the mapping of ld, shr, and shl to s1 and s0, and (b) a compact version of the operation table. 2 1. 2. Step Determine mux size Create mux operation table Description Count the number of operations (don t forget the maintain present value operation!) and add in front of each flip-flop a mux with at least that number of inputs. Create an operation table defining the desired operation for each possible value of the mux select lines. Datapath Components: Using Multifunction Register Design Process Functional Requirements: Register with the following operations Load Shift left Synchronous clear Synchronous set 3. 4. Connect mux inputs Map control lines For each operation, connect the corresponding mux data input to the appropriate external input or flip-flop output (possibly passing through some logic) to achieve the desired operation. Create a truth table that maps external control lines to the internal mux select lines, with appropriate priorities, and then design the logic to achieve that mapping Four-step process for designing a multifunction register. 29 30
Step 1: Determine Mux Size Register with the following operations Load Shift left Synchronous clear Synchronous set Don t forget Hold Present Value Step 2: Create Mux Operation Table Assign operations to mux inputs Need a mux with at least 5 inputs: x1 mux 31 32 Step 3: Connect Mux Inputs Step 4: Map Control Lines 33 s2 = clr *set s1 = clr + clr *set *ld *shl s0 = clr + clr *set *ld 34 Step 4: Map Control Lines clr *set=> clr, set, clr + clr *set *ld *shl=> ld, shl clr + clr *set *ld=> 35