FL_0 USER MANUAL FlashLink User Manual CONTENTS (Introduction on next page) January 00 /
FlashLink User Manual Features Allows PC parallel port to communicate with PSDF via PSDsoft Provides interface medium for JTAG communications Supports basic IEEE. JTAG signals (,,, ) Supports additional signals to enhance download speed (TERR, TSTAT) Can be used for programming and/or testing Wide power supply range of. to.v Pinout independent with target side flying leads Included loopback connector to validate FlashLink and PC connection Convenient desktop packaging allows varying applications (desk, lab or production) Synchronous JTAG interface allows speeds as fast as pc can drive Overview FlashLink is a hardware interface from a standard PC parallel port to one or more PSDF devices located within a target pc board as shown below. This interface cable allows the PSDF to be exercised for purposes of testing and/or programming. PSDsoft is the software source for driving FlashLink. Figure. FlashLink Adapter Application Flying lead cable Mates with PC parallel port feet FlashLink adapter inches wires Target device power for FlashLink is derived from the target system in the range of. to.v. Compatibility over this voltage range is ensured by the design of FlashLink. No settings are involved. On a cautionary note, it is recommended that the target system be powered with a well regulated and stable source of power which is energized at the final value of V CC. It is not recommended that the input voltage be varied using the verneer on a regulated power supply, as this may cause the internal FlashLink IC s (VHC0) to misoperate toward the lower end of the supply range.
(cont.) Table. Pin Descriptions for FlashLink Adapter Assembly Description Signal Description JTAG = IEEE. Pin # Name Signal JTAG EJTAG = IEEE = WSI. Enhanced JTAG Pin # Name EJTAG = WSI Enhanced JTAG J EN JTAG enable on PSDF () Type Type FlashLink IS FlashLink Signal: IS Signal: JEN JTAG enable on PSDF () T RST JTAG reset on target ( per.) TRST JTAG reset on target ( per.) G ND Signal ground Signal ground C NTL Generic signal, user defined () CNTL Generic signal, user defined () T DI JTAG test data input JTAG test data input T STAT EJTAG programming status () TSTAT EJTAG programming status () Destination Destination V CC V CC VDC source from target VDC source from target R ST Target system reset () RST Target system reset () T MS JTAG mode select JTAG mode select 0 0 G ND TC K G Signal Signal ground ground JTAG JTAGclock clock Signal Signal ground d Sourc e T D O JTAG J serial data dataoutput t T TERRR EJTAG E programming error () ) Destinationn Destinationn Notes. Notes Bold signals are required connections.. All Bold signal signals grounds are are required connected connections. together inside FlashLink.. All signal = open grounds collector are connected together inside FlashLink.. = open collector.
(cont.) Note: The target device must supply V CC to the FlashLink Adapter (. to. VDC, ma max @.V). Not all signals may be needed for a given application. Here s how they break down: () Core signals that must be connected:,,,, V CC, () Optional signals for enhanced ISP: TSTAT, TERR () Optional signal to control multiplexing of the JTAG signals: JEN () Optional IEEE-. signal for JTAG chain reset: TRST () Optional signal to allow FlashLink to reset target system after ISP: RST ()* Optional generic control signal to target system from FlashLink: CNTL () Two additional ground lines to help reduce EMI if a ribbon cable is used. These ground lines sandwich the signal in the ribbon cable. * = Not supported initially by PSDsoft Target Side Pinouts There is no indsutry standard JTAG connector. Each manufacturer differs. ST has a specific connector and pinout for the FlashLink programmer adapter. The connector scheme on the FlashLink adapter can accept a standard pin ribbon connector ( rows of pins on 0." centers, standard keying) or any other user specific connector that can slide onto 0.0" square posts. The pinout for the FlashLink adapter connector is shown in Figure. If a standard ribbon cable is used for quick connection of the FlashLink adapter to the target circuit card assembly, then the target system should use the pinout as shown in Figure. Figure. JTAG Connector Recommended Pinouts ST ENHANCED JTAG ISP CONNECTOR DEFINITION TERR 0 RST TSTAT CNTL TRST JEN KEY WAY VIEW: LOOKING INTO FACE OF SHROUDED MALE CONNECTOR. 0.0" POSTS ON 0." CENTERS. Connector reference: Molex 0-0 Recommended ribbon cable for quick connection of FlashLink adapter to end product: Samtec: HCSD-0-D-0.00-0-S-N Digikey: MCCK-0-ND Note: is a signal source on the Flashlink and should be a signal destination on the target board
Figure. FlashLink Schematic SOLDERING PAD PATTERN CBL D0()DB D() DB D() DB D(JEN\) DB D(TRST)DB D(RST) DB DB ACKN DB0 PA P DB ERRN DB SEL DB BUSY DB D DB A UTO LINE FEEDDB red org pink yellow green lt green grey black orgt brnt white S PA D 0 R0 0K (FRAME ) S SHIELD (DRAIN WIRE) PA D D R.K Q N0 R 0K UA UE 0 UF UF (FOR U) 0.0UF C UC UB R 0K UD UB A A A A G V HC0 0K Y Y Y Y R R R R R R R R0 R R 00K R TRSTN /JEN CONTROL TSTA TN V CCIN RSTN TERRN P 0 0-0 MOLEX R UB 0K R 0K R0 UD UC 0 UE 00K 00K 00K R R R 0.0UF C 0.0UF C (FOR U) (FOR U) R0 0 C0 D.V C R UF 0.0UF 00K 0 R 0K R 0K R 0K R 0K R Wa fersc ale Integration 0 Kato Road Fre mont, CA Title FlashLink Schematic Size Document Number Rev B FlashLink PCB G Date: Thursday, A pril 0, Sheet of D R R0 0K C C R.K R.K R.K R.K 00pf 00pf 00pf 00pf 0 PA D R R R R R R R0 R R R R C C C UA A A A A G V HC0 Y Y Y Y UA D N 00pf 00pf 00pf C C
(cont.) A schematic of FlashLink is shown on the previous page. For further information, see the PSDsoft Users Manual. Note: This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to Part of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in accordance with the instruction manual, may cause harmful interference to radio communications. Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to correct the interference at his own expense. Figure. Chaining Example FlashLink Target System, V or V V CC V CC 0K typical TSTAT TERR JEN TRST * CNTL RST * 0 * TSTAT TERR PSDFx straight through cable row, position TSTAT TERR PSDFx JTAG Chaining example on target system using straight through ribbon cable * all ground pins are connected together inside flashlink assembly
Figure. Loopback Adaptor (cont.) To FlashLink Assembly J 0 TSTAT TERR J J CON V CC CON CON -pin Dual Row 0.0 square Receptacle Output Signal Signal PC Parallel Port Connector Line (DB Pin No.) JEN S TAT SEL () T STAT ACKN () T ERR ERRN (0) T DO PAP ()
FL_0 - USER MANUAL Table. Document Revision History Date Rev. Description of Revision.0 Document written in the WSI format 0-Jan-00. FL_0: FlashLink User Manual Front page, and back two pages, in ST format, added to the PDF file Any references to Waferscale, WSI, EasyFLASH and PSDsoft 000 updated to ST, ST, Flash+PSD and PSDsoft Express /
FL_0 - USER MANUAL For current information on PSD products, please consult our pages on the world wide web: www.st.com/psm If you have any questions or suggestions concerning the matters raised in this document, please send them to the following electronic mail addresses: apps.psd@st.com (for application support) ask.memory@st.com (for general enquiries) Please remember to include your name, company, location, telephone number and fax number. Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is registered trademark of STMicroelectronics All other names are the property of their respective owners 00 STMicroelectronics - All Rights Reserved STMicroelectronics group of companies Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. www.st.com /