ECE 4/517 MIXED SIGNAL IC DESIGN LECTURE 1 SLIDES. Vishal Saxena (vsaxena AT uidaho DOT edu) AMPIC Laboratory University of Idaho

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ECE 4/517 MIXED SIGNAL IC DESIGN LECTURE 1 SLIDES Vishal Saxena (vsaxena AT uidaho DOT edu) AMPIC Laboratory University of Idaho

COURSE OUTLINE Instructor : Vishal Saxena Email : vsaxena AT uidaho DOT edu Time : Tue and Thu, 9:30-10:45 AM Course dates : Jan 12, 2017 May 4, 2017 Location : JEB 26 (Please note the change of place) Office Hours : Tue & Thu 11:15 AM-12:15 PM (or by appointment), BEL 318 Holidays : Spring Break Final Exam time: Friday, May 12, 7:30-9:30 AM Course Site : http://lumerink.com/courses/ece517/s17/ece517.htm Piazza Site : https://piazza.com/uidaho/spring2017/ece517/home

COURSE TOPICS Data Conversion and spectral estimation fundamentals Review of Switched Capacitor Circuits, Sample-and-hold, Comparators Nyquist rate ADCs: Flash, SAR, Pipelined, Time-interleaved ADCs. High-speed Link design issues: Driver Circuits, Equalizers, PAM signaling, ADCs for high-speed links. Note: This is an advanced elective course. It is important that the students have a good understanding of Analog and Digital Circuit fundamentals.

PREREQUISITES Analog IC Design Basics (ECE 410: Advanced Electronics) MOS amplifier design, including operation amplifiers, biasing, and stability analysis; advanced use of HSPICE Knowledge of material in ECE 4/515 is recommended Undergrad-level Signals and Systems Fourier, DTFT, Laplace, z-transforms, poles and zeros. Matlab scripting. Transistor-level circuit details are covered in ECE 4/515 Analog IC Course Can review material online on the course sites: CMOS Analog IC Design: http://lumerink.com/courses/ece5411/s11/lectures.htm Advanced Analog IC Design: http://lumerink.com/courses/ece614/f12/lectures.htm

TEXTBOOK AND REFERENCES Lecture notes and handouts will be used. Following references are useful to supplement the course material: Design of Analog CMOS Integrated Circuits, B. Razavi, McGraw-Hill. High-Frequency Integrated Circuits by Sorin Voinigescu, 1 st ed., Cambridge. CMOS Integrated Analog-to-Digital and Digital-to-Analog Converters by Rudy J. van de Plassche, Springer.

COURSE PEDAGOGY AND GRADING Combination of lecture notes, slides and simulation Lecture notes will be posted online (may have 1 or 2 days delay) Additional slides, Matlab code, Homeworks, etc. will also be posted. Workload (Grading) 25% Homeworks 25% Midterm Exam 25% Project 1 25% Project 2 or Final Exam

COURSE POLICIES Policies No late work (rare exceptions allowed). Penalty details on course site. Submission will not be accepted if the solutions are distributed by any means. No net surfing in class. Avoid distracting other students. Neither the final exam nor final project will be returned at the end of the semester. Academic Honesty No plagiarism is allowes Do you own work: can discuss but not replicate work of others See Article II of the University if Idaho s Student Code of Conduct http://www.webs.uidaho.edu/fsh/2300.html

DATA CONVERTERS Analog (real world) Digital Signal Processing (simulated world) Analog (real world) ADC DSP/FPGA C/assembly code/ ASIC DAC Interface Electronics (ADC or DAC ) Real world: Continuous-time, continuous-amplitude signals. Digital world: Discrete-time, discrete-amplitude signal representation. Interface circuits: ADC and DACs. Varying speed and precision requirements.

DATA CONVERSION SCENARIOS Any application using a sensor and/or an actuator Wireless: RF Rx and Tx chain Twisted pair: ADSL modem Coaxial: Cable modem Serial/Optical links: 10G+ ADC for modulation and equalization Audio Recording: 24-bit stereo ADCs Audio players: stored data to speaker (audio DAC) HDD read channel: Magnetic disk to microprocessor Biomedical applications (e.g. sensing blood glucose level and actuating the insulin pump),... Speed and resolution requirements vary with the application.

DATA CONVERTERS http://www.analog.com/en/data-conversion-knowledge-resource/conversions/index.html

ANALOG TO DIGITAL CONVERTER ARCHITECTURES Resolution (bits) 25 20 Integrating 15 Oversampling S/H with 1ps rms jitter 10 5 SAR, Algorithmic Pipelined, Folding,Flash, Time-Interleaved 1k 10k 100k 1M 10M 100M 1G 10G Bandwidth (Hz)

ANALOG-TO-DIGITAL CONVERTER (ADC) x(t) ADC N v[n] S/H or T/H x(t) Sampler y[n] N v[n] Continuous-time Continuous amplitude Quantizer Discrete-time Continuous amplitude Discrete-time Discrete amplitude 12

SAMPLING PROCESS Refer to lecture notes.