Prototyping Solutions For New Wireless Standards Christoph Juchems IAF Institute For Applied Radio System Technology Berliner Str. 52 J D-38104 Braunschweig Germany www.iaf-bs.de
Introduction IAF Institute for applied Radio System Technology Located in Braunschweig / Germany founded 1992 15 employees
IAF History building prototypes for new wireless standards 1992 Company foundation 1993 IFA Berlin Präsentation Digital terrestrial video broadcasting technique (DVB-T) 1995 IFA Berlin Demonstration of mobile DVB-T Receiption 1995 Technology-Transfer Award of chamber of industry and commerce Braunschweig 1997 Development of Prototypes for ATM-Mobile 5,2 GHz wireless radio transmission 1999 Development of a wireless voting system (433 MHz) 2001 Conception and Development of a Wireless LAN OFDM testbed for the 5,2 GHz band 2003 Conception and Development of a 'Wideband OFDM testbed' for the 70 GHz band 2004 1 GBit/s wireless transmission with a MiMo OFDM System 2006 Conception and Development of a 3GLTE testbed 2008 3GLTE advanced features / standard compliant test and measurement solutions
Experiences Development of digital and analog hardware components Development and implementation of baseband signal processing OFDM (Orthogonal Frequency Division Multiplex) systems SCFDE ( Single Carrier with Frequency Domain Equalization) systems Time and Frequency Synchronisation Digital Filtering and modulation FEC Encoding and Decoding Implementation of high rate application interfaces ( 1 GBit Ethernet, PCIx)
Conception and development of innovative radio transmission systems System conception and feasibility studies System simulation Hardware development and PCB design Software development Design, implementation and verification of signal processing algorithms Algorithm implementation in HDL System integration, verification and test Manufacturing real-time prototyping systems Engineering support for series production Fields of Work Product line: universal FPGA Building Set
FPGA Building Set Two different FPGA based prototyping platforms are available: FFP Basic ( equipped with Xilinx Virtex-IIpro FPGA) FFP Basic+ ( equipped with Xilinx Virtex-5 FPGA) Hardware extensions are available for both types of prototyping platforms: Pluggable add-on modules for several applications ( DAC, ADC, Gbit Ethernet, DSP) Development of customer-specific add-on modules Well-approved prototyping platform FFP Basic
New Prototyping Platform FFP Basic+ FPGA mainboard equipped with four Xilinx Virtex-5 FPGA, integrated board controller FPGA, power supply, clock management and several user interfaces six extension slots for pluggable add-on modules ( DAC, ADC, DSP)
FFP Basic Plus Architecture Backplane Connector 1 100 32 PCI GTP Ext. Slot 1 Ext. Slot 2 Ext. Slot 4 Ext. Slot 5 PCI PCI 160 160 160 160 76 Virtex 5 SX95T 2 Lanes Virtex 5 SX95T 2 Lanes 2 Lanes Backplane Connector 2 32 100 134 2 Lanes 2 Lanes 2 Lanes 2 Lanes 134 Virtex 5 LX330T 160 CONF (to all devices) 2 Lanes 2 Lanes 2 Lanes 290 CLK (to all devices) HIL (to all devices) Virtex 5 LX330T Flash PLL DDR 36 QDR RAM Ext. Slot 3 Ext. Slot 6 QDR RAM 36 2 Lanes 2 Lanes 160 - Virtex 4 FX60 Front Connector 1 1GB Eth MMC Card USB 1GB Eth USB 1GB Eth Front Connector 2 Notes: Board Configuration User FPGA Extension Slots User Memory User Interfaces
Capabilities of the FFP Basic Building Set PC Gbit Eth USB Remote Radio Head PCIexpress Interface Gbit Ethernet Interface USB Interface CPRI ( optical) Via SFP connector PCIe- Connection PCIexpress Interface CPRI ( optical) Via SFP connector CPRIconnection Add-on module: Digital Signal Processor FFP Basic + Prototyping Platform CPRI ( optical) Via SFP connector CPRIconnection LVDS interface LVDS connection Add-on module: 200 MSPS ADC / DAC Add-on module: 3 GSPS ADC / DAC PCIe LVDS CPRI RF Frontend RF Frontend PCIe- Connection Digital IQ ADC / DAC RF Frontend
Faraday DSP Add-on Module Rev.1/ Rev. 2 Single TMS32C6474 System Additional Features of Rev. 2: -128 MB DDR2 Memory Framesync 7 MMCX 6 AIF 24 MMCX Ethernet 4MMCX -All 6 AIF interfaces on MMCX connectors, can be connected directly to Rocket I/O 128 Mbyte DDR2 1x SRIO 4 MMCX SRIO Ser/Des 1x SRIO 4 MMCX Mux Rx/Tx- Data1-N/P Rx/Tx-Data2-N/P DSP 1 -Ethernet interface on MMCX connectors, additional adaptor with Ethernet connector required I 2 C- PROM 4 Leds Dip- Switch JTAG Con CPLD JTAG Con DSP LED Control DSP-Boot-Configuration CPLD JTAG Programming DSP JTAG Programming Oszi Clock1 Diff. CPLD 1 Oszi Clock2 Diff. Power-Supply / Conversion 5V - 3,3V 5V - 2,5V 5V - 1,8V 5V - 1,1V
TMS32C6474 DSP-Board system concept FFP Basic Plus V5 Framesync 7 MMCX 6 AIF 24 MMCX DSP Board Main Framesync 7 MMCX 6 AIF 24 MMCX DSP Board Extension Ethernet 4MMCX 128 Mbyte DDR2 DSP 1 Ethernet 4MMCX 128 Mbyte DDR2 DSP 2 V4 Control 16bit RXBus 16bit TXBus + Control I²C-Bus 1x SRIO 4 MMCX SRIO Ser/Des 1x SRIO 4 MMCX I 2 C- PROM I²C-Bus I²C- Board ID Mux Rx/Tx- Data1-N/P Rx/Tx-Data2-N/P Reset,Boot-Konfig,GPIO Interface (Leds) Oszi Clock1 Diff. I²C-Bus I²C-Bus Power- Supply / Conversion 5V - 3,3V 5V - 2,5V 5V - 1,8V 5V - 1,1V Oszi Clock2 Diff. 3,3V 2,5V 1,8V 1,1V 1x SRIO 4 MMCX I 2 C- PROM Power-Supply from Main- Board Framesync 7 MMCX 6 AIF 24 MMCX Ethernet 4MMCX 128 Mbyte DDR2 Rx/Tx-Data2-N/P Clock 1 Clock 2 Clock 2 Clock 1 I 2 C- PROM Rx/Tx-Data1-N/P Reset,Boot-Konfig,GPIO Interface(Leds) DSP 3 1x SRIO 4 MMCX Rx/Tx-Data2-N/P Communication DSP-CPLD-CPLD Reset... 4 Leds Dip- Switch JTAG Con CPLD JTAG Con DSP LED Control DSP-Boot-Configuration CPLD JTAG Programming DSP JTAG Programming CPLD 1 8 Leds Dip- Switch JTAG Con CPLD JTAG Con DSP LED Control DSP-Boot-Configuration CPLD JTAG Programming DSP JTAG Programming CPLD 2
Testbed Configuration: 2 x 2 MIMO / OFDMA / Multi-User Modulation Antenna1 Terminal 1 CQI Basestation Modulation Antenna 2 OFDM Subcarrier CQI OFDM Subtcarrier Modulation Antenna 1 Terminal 2 Modulation Antenna 2 OFDM Subtcarrier OFDM Subtcarrier
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