MSP0-HG development board Users Manual All boards produced by Olimex are ROHS compliant Revision Initial, June 0 Copyright(c) 0, OLIMEX Ltd, All rights reserved Page
INTRODUCTION: MSP0-HG is header board with MSP0GIPWR ultralowpower mixed signal microcontroller from Texas Instruments. MSP0GIPWR has a built-in -bit timer, ten I/O pins, a 0-bit A/D converter and built-in communication capability using synchronous protocols (SPI or IC). On the board are available JTAG connector, one status led and extension headers for each microcontroller pin, where you can connect your own circuits. All this allows you to build a diversity of applications. BOARD FEATURES: Microcontroller MSP0GIPWR JTAG interface Status led Extension headers for each microcontroller pin FR-,. mm, soldermask, component print Dimensions:.00 x 0.00 mm (.0 x 0.9") ELECTROSTATIC WARNING: The MSP0-HG board is shipped in protective anti-static packaging. The board must not be subject to high electrostatic potentials. General practice for working with static sensitive devices should be applied when working with this board. BOARD USE REQUIREMENTS: Cables: The cable you will need depends on the programmer/debugger you use. If you use MSP0-JTAG-TINY, MSP0-JTAG-TINY-V or MSP0JTAG-ISO, you will need USB A-B cable. If you use MSP0-JTAG, you will need LPT cable. Hardware: Programmer/Debugger MSP0-JTAG, MSP0-JTAG-TINY, MSP0-JTAG-TINY-V, MSP0-JTAG-ISO by OLIMEX, or other compatible programming/debugging tool. Page
PROCESSOR FEATURES: MSP0-HG board use MSP0GIPWR microcontroller from Texas Instruments with these features: Low Supply-Voltage Range:. V to. V Ultra-Low Power Consumption Active Mode: 0 μa at MHz,. V Standby Mode: 0. μa Off Mode (RAM Retention): 0. μa Five Power-Saving Modes Ultra-Fast Wake-Up From Standby Mode in Less Than μs -Bit RISC Architecture,.-ns Instruction Cycle Time Basic Clock Module Configurations Internal Frequencies up to MHz With One Calibrated Frequency Internal Very Low Power Low-Frequency (LF) Oscillator -khz Crystal External Digital Clock Source -Bit Timer_A With Two Capture/Compare Registers Universal Serial Interface (USI) Supporting SPI and IC Brownout Detector 0-Bit 00-ksps A/D Converter With Internal Reference, Sample-and-Hold, and Autoscan Serial Onboard Programming, No External Programming Voltage Needed, Programmable Code Protection by Security Fuse On-Chip Emulation Logic With Spy-Bi-Wire Interface For more information about this microcontroller, see here. Page
BLOCK DIAGRAM: Page
Page EXT HNx uf C POWER HNx(OPEN).V P. P. P. P. P. P. P. VIN EXT HNx k R P_OUT.V.V P_IN VIN TEST RST P.0 P. P. 0 NA C 9 R K.V MCP0-0E/MB GND VOUT VIN VR(.V) HNx JTAG uf C.V 0 9 MSP0GIPWR P. P. C P. C Q. khz/pf GND P. 00n C.V 0pF 0pF http://www.olimex.com/dev COPYRIGHT(C) 0, OLIMEX Ltd. Rev. A MSP0-HG TEST/SBWTCK DVCC RST/NMI/SBWTDIO P.0/TA0CLK/ACLK P./TA0.0 P./TA0. P. DVSS P./SMCLK/TCK XIN/P./TA0. P./TA0.0/SCLK/TMS XOUT/P. P./TA0./SDO/SCL/TDI/TCLK P./SDI/SDA/TDO/TDI U 90R R LED red P.0 SCHEMATIC:
BOARD LAYOUT: POWER SUPPLY CIRCUIT: MSP0-HG can take power form: EXT pin (VIN) and pin (GND) from to VDC not typical POWER connector (the connector looks like opened jumper) from to VDC JTAG The programmed board power consumption is about 0 ma with all peripherals enabled. RESET CIRCUIT: MSP0-HG reset circuit includes MSP0GIPWR pin 0 (RST/NMI/SBWTDIO), JTAG connector pin, and R (kω). CLOCK CIRCUIT: Quartz crystal. khz is connected to MSP0GIPWR pin (XOUT/P.) and pin (XIN/P./TA0.). Page
JUMPER DESCRIPTION: P_IN P_OUT When this jumper is closed, the board is power supplied by the standard JTAG pin. This is only possible when the consumption of the board is not very high which is typically the case with MSP0 microcontrollers. If this jumper is open the board should be power supplied by another external source. This jumper and P_OUT should always be reversely open/closed, i.e. if P_IN is closed, P_OUT should be open and vice versa. Default state is closed. When this jumper is closed, the board is power supplied not by the JTAG but from external source. Then the JTAG has to synchronize with the working voltages which is done through this line. This is especially important when debugging with JTAG. This jumper and P_IN should always be reversely open/closed, i.e. if P_OUT is closed, P_IN should be open and vice versa. Default state is opened. INPUT/OUTPUT: Status led (red) with name LED, connected to MSP0GIPWR pin (P.0/TA0CLK/ACLK). Page
EXTERNAL CONNECTORS DESCRIPTION: JTAG: P. Via P_IN to.v P. Via P_OUT to.v P. NC P. TEST 9 GND 0 NC RST NC NC NC EXT: VCC P. P. P.0 RST TEST GND VIN EXT: Page
GND P. P. P. P. P. P. P. POWER: GND VIN Page 9
MECHANICAL DIMENSIONS: Page 0
AVAILABLE DEMO SOFTWARE: msp0hg_demo demonstrates blinking led Page
ORDER CODE: MSP0-HG - assembled and tested board How to order? You can order to us directly or by any of our distributors. Check our web www.olimex.com/dev for more info. Revision history: Board's revision Rev. A, March 0 Manual's revision Rev. Initial, June 0 Page
Disclaimer: 0 Olimex Ltd. All rights reserved. Olimex, logo and combinations thereof, are registered trademarks of Olimex Ltd. Other terms and product names may be trademarks of others. The information in this document is provided in connection with Olimex products. No license, express or implied or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Olimex products. Neither the whole nor any part of the information contained in or the product described in this document may be adapted or reproduced in any material from except with the prior written permission of the copyright holder. The product described in this document is subject to continuous development and improvements. All particulars of the product and its use contained in this document are given by OLIMEX in good faith. However all warranties implied or expressed including but not limited to implied warranties of merchantability or fitness for purpose are excluded. This document is intended only to assist the reader in the use of the product. OLIMEX Ltd. shall not be liable for any loss or damage arising from the use of any information in this document or any error or omission in such information or any incorrect use of the product. Page