Design and Implementation of an AHB VGA Peripheral 1
Module Overview Learn about VGA interface; Design and implement an AHB VGA peripheral; Program the peripheral using assembly; Lab Demonstration. System on Chip ARM Cortex-M0 Processor 32-bit Data bus Control signals 32-bit Address bus ARM AMBA 3 AHB-Lite System Bus SRAM controller VGA Peripheral Off-chip SRAM memory Monitor 2
Module Syllabus VGA Overview VGA Interface VGA Timing AHB VGA Hardware Implementation VGA Image Buffer VGA Console Lab Practice 3
VGA Overview 4
VGA Overview Video Graphics Array (VGA) connector Five analog components Blue, green, red Horizontal and vertical synchronization Designed in 1987, still used nowadays, but most of them are superseded by Digital Visual Interface (DVI) and High-Definition Multimedia Interface (HDMI). Blue Green Red Horizontal Sync Vertical Sync 5
How VGA Signals Work CRT monitors display images on a phosphor-coated screen using amplitude-modulated moving electron beams. Beams horizontally move from left to right, and vertically from top to bottom. As the beam moves over the whole screen, the colour information of the pixel that currently being scanned is given from the VGA cable. The horizontal synchronization is used to reset the beam to the start of the next line. The vertical synchronization is used to start the next frame. The monitor will adjust its scanning frequency and screen resolution according to the synchronization signal given from the user. 6
How VGA Signals Work During the time when the beam is resetting to the beginning of next line (or the next frame), the colour information will not be used, and this particular region is known as front/ back porch. Despite from different displaying technologies, such as CRT or LCD, most of the monitors can provide a standard interface, such as VGA or DVI. The VGA timings information for different resolutions is specified and published by the VESA organization. 7
VGA Interface The digital outputs from the FPGA can be converted to analog and connected to the VGA connector using resistor-divider circuits, For example, the Digilent Nexys3 board uses 10 signals, including 8-bit colour and two standard sync signals, thus 256 colour levels can be presented. The following slides give an example timing for a 640 480 resolution. RED0 RED1 RED2 GREEN0 GREEN1 GREEN2 FPGA BLUE0 BLUE1 HSYNC VSYNC 2KΩ 1KΩ 510Ω 2KΩ 1KΩ 510Ω 1KΩ 510Ω 100Ω 100Ω RED GREEN BLUE HS VS VGA connector VGA cable 8
600 480 pixels VGA Timing 800 Vertical front porch Set colour to black (8h00) Vertical sync, give a zero pulse to start a new frame 640 pixels Beam automatically scans from left to right, then goes to the next line Next line Display region Horizontal sync, give a zero pulse to start the next line Vertical back porch Set colour to black (8h00) Set colour to your expected value while beam is in this region Horizontal front porch Set colour to black (8h00) Horizontal back porch Set colour to black (8h00) 9
VGA Timing VGA timing for 640 x 480 resolution; 25MHz clock frequency; Parameters can be found inside the code. Hsync Pulse width Horizontal front porch Display region Horizontal back porch Pulse width Horizontal front porch Vsync Vertical pulse width After every 600 lines Colour 0 0 c1 c2 c639 c640 10
AHB VGA Hardware Implementation 11
Hardware Implementation In our proposed hardware implementation, the full region of the screen is divided to two sub-regions: Text region (console) -- display text strings in a relatively high resolution; Image region (frame buffer) display a desired image in a lower resolution; Ideally, all the pixels information is stored in one frame buffer. However, since the on-chip memory is not sufficient, the resolution of the frame is reduced. Hence, to still display clear texts at the same time, the text region is separated, where the dynamic hardware logic is used instead of the frame buffer. Text region Image region 12
Mux Hardware Interconnection The VGA peripheral can display texts and images on a monitor through a VGA cable. The VGA peripheral consists of 3 components: a VGA interface, an image buffer for displaying image, and a text console module for displaying texts. Data Memory address Memory data Write enable Image buffer Image colour 10 10 8 Address x Address y HS Addr AHB interface 8 VGA interface 8 8 Colour Control Text data (ASCii) Write enable Text console Text colour Console region or image region VS 13
Hardware Implementation VGA interface Generates synchronization signals to the VGA port; Colour information of all pixels are stored in memory Is directly connected to external pins of the VGA port; Outputs the address of the current pixel; Image buffer Stores the colour information of all pixels in the image region; Is implemented on a dual-port memory; Text console Text region Monitor Image region Displays texts in the text region. Is implemented on hardware logics. Colour information is generated using hardware logic 14
VGA Interface VGA signals Name vga_red[2:0] vga_green[2:0] vga_blue[1:0] hsync vsync Description 3-bit red signal 3-bit green signal 2-bit blue signal (less sensitive to eyes) Horizontal synchronization signal, one pulse indicates the start of the next line Vertical synchronization signal, one pulse indicates the start of the next frame 15
VGA Image Buffer The image buffer stores the RGB information for all the pixels in the image region. The buffer is implemented on a dual-port RAM, which allows pixels to be modified at the same time the VGA interface is reading the pixel. Some chips do not have a large on-chip memory, such as on-chip SRAM. In such a case, the resolution can be reduced by mapping multiple pixels to a single data in the memory. For example, a 4x4 pixel region can be presented by one single data in the image buffer. Used for changing image Connected to VGA interface Write address 15 Write data 8 Write enable Read address 15 Read data 8 110001 00 001010 00 111010 01 000011 11 110111 00 001011 11 101010 11 Image buffer 111101 10 110101 00 16 4x4 pixel region is presented by one single data (1 Byte) in the image buffer Image region 400x480 pixels VGA monitor
VGA Console The VGA console module is used to generate the colour information for pixels in the text region. The colour information is generated dynamically using hardware logics, rather than storing every single pixel in a memory, whereby the valuable on-chip memory can be saved. 17
Memory Space The memory space is allocated as follow: Peripheral Base address End address Size MEM 0x0000_0000 0x4FFF_FFFF 167MB VGA 0x5000_0000 0x50FF_FFFF 16MB 18
Memory Space The internal memory space of VGA is divided into two regions Console text: 1 word (4 byte) space to print a character Image buffer: the rest of the space is used to store pixels in the image region. Register Base address End address Size Console text 0x5000_0000 0x5000_0000 4 Byte Image buffer 0x5000_0004 0x50FF_FFFF 15999996 Byte 19
Lab Practice 20
Lab Practice Hardware design Design and implement the peripheral (VGA peripheral) in hardware using Verilog; Software programming Test the peripheral using Cortex-M0 processor programed in assembly language; System demonstration Display text strings and images on the monitor. 21
Useful Resources Reference1 Nexys3 Reference Manual: http://www.digilentinc.com/data/products/nexys3/nexys3_rm.pdf 22