PBR-310C E-BERT. 10Gb/s BERT System with Eye Diagram Tracer

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PBR-310C E-BERT 10Gb/s BERT System with Eye Diagram Tracer rate from 8.5~11.1Gb/s and extend data rate down to 125M~5Gb/s Support up to four channels Eye Diagram and Mask Test* Eye Contour and Histogram* Equalized Re-drive Output < 60mVpp Input Sensitivity* Jitter Analysis Suite CDR function embedded Recovery Clock Output (1/64) Optical Interface (option) USB/RS232 serial I/F with API for remote control * 1. 8.5~11.1Gb/s for Eye Diagram and Mask Test 2. Standard BER Test 1

General Description Phytrex PBR-310C BERT System (hereafter called PBR-310C) is an perfect manufacturing testing gear aim for 10Gb/s level optical and electrical devices or modules. It provides wide bandwidth and continues data rates between 8.5Gb/s ~ 11.1Gb/s and extended data rate down to 125Mb/s to 5Gb/s. It can also provide symmetric and asymmetric test especially on optical components and transceiver module compliance to today s most popular application such as 10G-PON,10GE-PON and SFP+. Figure 1: Basic BERT Function Block Diagram PBR-310C provides the variable patterns and receiver was built-in clock recovery unit, "synchronized loss" detector and error lamp could provides an useful indication for manufacturing purpose. The remote control interface generally provides the USB or RS232 serial port, with the development API for Labview, VB and Microsoft C#.NET versatile developing platform. Figure 2: Receiver System Block Diagram System Configuration BERT system including Pattern Generator and Error Detector with built in CDR circuit - BERT 8.5~11.1Gb/s Single Channel - BERT Dual Channels (Option 01) - BERT Quad Channels (Option 02) - Eye Diagram ( ) (Option 05) - Eye Mask and Eye Contour (Option 06) - Extend BERT 125M~5Gb/s (Option 04) - Enlarge Amplifier to 2.5Vpp (Option 03) 2

Measurement Suite - Basic BER - Quick Eye Diagram Check and relative parameters numerical result display - Eye Contour Scan - Jitter Decomposition (DJ/RJ)@specified BER (Option) Applications - Optical transceiver modules (SFP+, XFP, X2, Xenpak, XPAK), transponders, line cards, and Subsystems - Optical Components and Devices (TOSA/ROSA..) - Serial/Parallel active optical cable (AOC), legend copper cable (SATA, FC.). subsystems, and systems - Serial bus and high-speed backplane transportation Figure 4: BER information and system status indicator Figure 5: Historical BER and histogram User Interface PBR-310C provide the intuitive and easy to use graphical user interface control software which provides the following functions. - Pattern Generator/Error Detector Setup - Fundamental BER measurement result and status indication - History BER record - Eye Diagram ( ) and Mask Test Eye Diagram and Eye Mask Test is the eye monitoring function embedded in PBR-310C. It allows a one-shot eye diagram test for a valid signal from 8.5~11.1Gb/s without any trigger input. Extrapolated eye contour lines display the eye opening for even lower BER levels, more. The display allows the quick check for relative eye parameters. Eye masks can be loaded from a library and eye mask violation check can be set from 0~30% margin for the DUT waveform testing criteria. The result screen can be printed and saved for documentation purpose. Figure 3: User control interface including Setting, BER, History and Eye Diagram Test four folders 3

simultaneously. Figure 6: Eye Diagram Measurement UI Eye contour and Histogram Eye opening is a key characteristic for a device. More deeper views with BER and eye contour simultaneously are much desiable. eyetrex provides eye contour and histogram on vertical /horizontal axis.. Figure 8 : Two PBR-310C can enable 4 channels Figure 9 : 4 channel system GUI screen shot (Setup) Figure 7: Eye Contour with various BER level and statistic histogram Four Channel Mode PBR-310C can enable the four channels measurement mode with new system GUI. Users can control multiple PBR-310C via the USB cable link to implement the 4 channel measurement BER and Eye Diagram measurement Figure 10: 4 channel eye diagram measurements 4

System Specification rate (8.5~11.1Gb/s) Standard Rate 8xFC 8.5Gb/s 10xFC 10.518Gb/s OC-192/STM-64 /10GE-W 9.953Gb/s 10GE-R 10.3125Gb/s OUT-2 10.709Gb/s OUT-2e 11.09Gb/s 10GE-FEC G.975+FEC 10.664Gb/s Custom 8.5~11.09Gb/s Extended Rate (125M~5Gb/s) option04 Fast Ethernet 125 Mb/s Gigabit Ethernet x1 1.25Gb/s 2.5GbE, Infiniband, or PCI 2.5Gb/s Express Infiniband x2 or PCI Express x2 5.0G b/s ESCON/SBCON 200Mb/s OC3/ STM-1 155.52 Mb/s OC12/ STM-4 622.08 Mb/s OC48/ STM-16 2.48832Gb/s OC48 with FEC 2.66606Gb/s F.C. x1 1.0625Gb/s F.C. x2 2.125Gb/s F.C. x4 4.25Gb/s Pattern The system provides PRBS7, 9,23 and 31 four types of test pattern Waveform Performance Rising Time (20%~80%) <42ps (typ. 38ps) Jitter (pp) <25ps Pattern : PRBS31 Rate : 10.312Gb/s Figure 11: Clean Eye output at 10.312Gb/s Driver Power Amp. (option03) PBR310C provides amplifier for the option to drive the LiNbO3 Mach- Zehder optical modulator (MZM) or electro-absorption modulator (EAM) for long haul transmission. Re-drive and Recovery Clock Output (option 07,08) PBR-310 equips with re-drive and recovery clock circuits on data input port. (Figure 12). Re-drive function can compensate the channel loss and Recovery clock extract from the input data stream and provide 1/64 of data rate differential output from internal CRU. Figure 12: Re-drive Output (@8.5Gb/s) 5

Figure 13: Recovery Clock (1/64 of 8.5Gb/s) Figure 14: Recovery Clock (1/64) Jitter Specification Electrical Specification. PPG Output (20%~80%) ED Input Scope Input Re-driver Output (20%~80%) Amplitude >320mVpp Single Ended Rise/Fall 8.5~11.1Gb/s < 42 ps Time Jitter p-p 8.5~11.1Gb/s <25 ps Rate 8.5~11.3Gb/s Sensitivity <60 mvpp (Single ended) Range 60~400 mvpp (Single ended) Jitter <0.6UI Tolerance Rate 8.5~11.1Gb/s Sensitivity <60mVpp (Single ended) Range 60~400 mvpp (Single ended) Jitter <0.6UI Tolerance Route From ED Input Rise/Fall 8.5~11.1Gb/s < 42 ps Time Jitter p-p 8.5~11.1Gb/s <25 ps Recovery Clock Output Connector Type Frequency Jitter (rms) Differential, AC-Couple 1/64 of Rate <1/10 UI SMA Trigger Output A single-ended electrical trigger output is provided on the front panel. Output type Single ended Impedance 50Ω nominal, AC-coupled Amplitude >600 mv(p-p) Frequency 1/64 of Rate Connector SMA 6

General Configuration Power Supply 110V to 240V, 50~60Hz Power Consumption 50 VA maximum Operating 10 C ~ 40 C Temperature Storage Temperature 0 C ~ 70 C Control Interface USB or RS232 Language C++, VB, LabVIEW Dimension (L)400mm X (W)2700mm X (H)70mm Net Weight < 5Kgw Warm Up 10 min Warranty 1 year Order Information Model Description PBR-310C 8.5Gb/s~11.1Gb/s Bit Error Rate Tester with USB/RS232 control interface Option 01 Dual Channels (2x PPG, 2x ED) Option 02 Quad Channels (4xPPG, 4xED) Option 03 Driver Amp up to 2Vpp Option 04 Extend Rate to 125M~5Gb/s Option 05 Eye Diagram Test Option 06 Eye Mask Test and Eye Contour Option 07 Repeater and Re-drive Output Option 08 Recover Clock Output (1/64) * is the trademark of Phytrex Technology Inc. *Product specifications and descriptions in this document are subject to change without notice. 7