hrontel rief atasheet eatures TV/V ncoder TV encoder targets the handheld devices and other appropriate display devices used in consumer products. (i.e. automobile) Support multiple output formats. Such as STV format (NTS and PL), TV format for 480p,576p,720p and 1080i, analog R output for V. Sync signals can be provided in separated or composite manner (programmable composite sync generation). Three on-chip 10-bit high speed s providing flexible output capabilities. Such as single, double or triple VS outputs, YPbPr output, R output and simultaneous VS and S-video outputs. 16Mbits SRM is used as frame buffer. Supporting for frame rate conversion. lexible up and down scaling engine is embedded including deflickering capability. Programmable 24-bit/18-bit/16-bit/15-bit/12-bit/8-bit digital input interface supports various R (R888, R666, R565 and etc), Ybr (4:4:4 Ybr, ITU656) and 2x or 3x multiplexed input. PU interface are also supported. Support for flexible input resolution up to 800x800 and 1024x680. Pixel by pixel brightness, contrast, hue and saturation adjustment for each kind of output is supported. (or R output, only brightness and contrast adjustment is supported). Pixel by pixel horizontal position adjustment and line by line vertical position adjustment are supported. 90/180/270 degree image rotation and vertical or horizontal flip functions are supported. Macrovision 7.1.L1 for STV is supported in 7025. (7026 is Non-Macrovision part.) Macrovision TM copy protection support for progressive scan TV (480p, 576p 7025 only) MS- support for STV and TV TV/Monitor connection detect capability. can be switched off based on detection result. (river support is required) Programmable power management. lexible pixel clock frequency from graphics controller is supported. (2.3Mz 120Mz) lexible input clock from crystal or oscillator is supported. (2.3Mz 64Mz) Only slave mode supported. Offered in or QP package. ully programmable through serial port. IO and SP/SP voltage supported is from 1.2V to 3.3V. eneral escription The is a device targeting handheld and similar systems which accept digital input signal, and encodes and transmits data through 10-bit s. The device is able to encode the video signals and generate synchronization signals STV format for NTS and PL standards and TV format for 480p,576p,720p and 1080i. nalog R output and composite SY signal are also supported. The device accepts different data formats including R and Ybr (e.g. R565, R666, R888, ITU656 like Ybr, etc.). 16Mbit SRM is embedded in package. rame rate conversion and Image rotation are possible. Note: the above feature list is subject to change without notice. Please contact hrontel for more information and current updates. 209-1000-004 Rev. 1.1, 12/3/2008 1
SRM R/Ybr S W VSY IN Input data format decoder PU interface MUX S (Ybr to R) Scaler MUX S (R to YUV) U ST RI ON VP P TV formater SP MUX SP XI XO Serial port PLL RI ON VP P 1 2 3 R/Y/VS/Y_Svideo /Pb/VS/-Svideo /Pr/VS,V, SY position adjust omposite sync generation SY VSY SY igure 1: block diagram 2 209-1000-004 Rev. 1.1, 12/3/2008
1.0 Pin-out 1.1 Package iagram 1 2 3 4 5 6 7 8 9 SY VSO RST /S 20 23 V SO /W 21 17 18 N V 13 11 8 5 10 7 6 S 16 15 14 3 4 NQ _ VQ _ 22 19 12 2 0 1 V_ N_ 6 TP 8 9 10 1 VIO LK VQ _ 2 7 9 V_ N_ N_ NQ _ 3 V_ 11 K L 4 5 13 2 _ 1 _ 0 _ PLL IST _ PLL XI XO 12 SP SP K L 1 2 3 4 5 6 7 8 9 igure 2: Package 209-1000-004 Rev. 1.1, 12/3/2008 3
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 SO [10] [8] [7] [6] [9] [12] [19] [17] [16] [15] [14] [13] [11] [18] [20] [22] V /S V /W [23] [21] N VSO SY [3] [5] [4] [2] VIO LK N_ V_ [0] [1] N_ V 2 _ 1 _ 0 _ IST _PLL _PLL XI XO SP SP TP S Reset NQ_ VQ_ NQ_ VQ_ N_ V_ 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 61 62 63 64 60 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 igure 3: 80 Pin LQP Package 4 209-1000-004 Rev. 1.1, 12/3/2008
1.2 Pin escription Table 1: Pin Name escription ( Package) Pin # Type Symbol escription 3, 4, 4, 4, 5, 5, 5, 4, 5, 6, 7, 6, 7, 8, 6, 8, 9, 9, 8, 9, 8, 8, 7, 9 In [23:0] ata[0] through ata[23] Inputs These pins accept the 24 data inputs from a digital video port of a graphics controller. The swing is defined by VIO. 2 In/Out V Vertical Sync Input / Output When the SYO control bit is low, this pin accepts a vertical sync input for use with the input data. The amplitude will be 0 to VIO. When the SYO control bit is high, the device will output a vertical sync pulse. The output is driven from the VIO supply. 3 In/Out /W orizontal Sync Input / Output When the SYO control bit is low, this pin accepts a horizontal sync input for use with the input data. The amplitude will be 0 to VIO. When the SYO control bit is high, the device will output a horizontal sync pulse. The output is driven from the VIO supply. It is also the W signal of PU interface. 2 In /S ata Input Indicator When the pin is high, the input data is active. When the pin is low, the input data is blanking. It is also the S signal of PU interface The amplitude will be 0 to VIO. 2 In S ddress select 5 In TP TP nable (Internally pull-down) This pin should be left open or pulled low with a 10k resistor in the application. This pin configures the precondition for scan chain and boundary scan test when high. Otherwise it should be low. Voltage level is 0 to 3.3V. 1 In Reset Reset * Input When this pin is low, the device is held in the hardware reset condition. When this pin is high, reset is controlled through the serial port. K9 In/Out SP Serial Port ata Input / Output This pin functions as the bi-directional data pin of the serial port. xternal pull-up resister is required. L9 In SP Serial Port lock Input This pin functions as the clock pin of the serial port. xternal pull-up resister is required. 209-1000-004 Rev. 1.1, 12/3/2008 5
Pin # Type Symbol escription L4 Out 0 VS, S-video, YPbPr or nalog R output ull swing is up to 1.3v L3 Out 1 VS, S-video, YPbPr or nalog R output ull swing is up to 1.3v L2 Out 2 VS, S-video, YPbPr or nalog R output ull swing is up to 1.3v L5 In IST urrent Set Resistor Input This pin sets the current. 1.2k Ω, 1% tolerance resistor should be connected between this pin and _ using short and wide traces. K7 In XI rystal Input / xternal Input or some situation of the slave mode, a parallel resonance crystal (± 20 ppm) should be attached between this pin and XO. owever, an external 3.3V MOS compatible clock can drive the XI/IN input. K8 Out XO rystal Output or some situation of the slave mode, a parallel resonance crystal (± 20 ppm) should be attached between this pin and XI / IN. owever, if an external MOS clock is attached to XI/IN, XO should be left open. 9 In LK xternal lock Inputs The input is the clock signal input to the device for use with the, V, and [23:0] data. 1 Out VSO Vertical sync signal output 2 Out SO orizontal sync signal output 1 Out SY omposite sync output 8 Power VIO IO supply voltage (1.2-3.3V) 6 Power V igital supply voltage (1.8V) 1, 1, L7, 9 Power nalog supply voltage (2.5 3.3V) K6 Power _PLL PLL supply voltage (1.8V) K4 Power _ power supply (2.5 3.3V) 2, 1 Power VQ_ SRM output buffer supply voltage (2.5V) 2, 8, 6 Power V_ SRM device supply voltage (2.5V) 6 Power N igital supply ground 4, 2, L6, 8 Power nalog supply ground K5 Power _PLL PLL supply ground K3 Power _ supply ground 1, 1 Power NQ_ SRM output buffer supply ground 3, 9, 8 Power N_ SRM device supply ground 6 209-1000-004 Rev. 1.1, 12/3/2008
Table 2: Pin Name escriptions (LQP80 Package) Pin # Type Symbol escription 52-67 70-77 In [23:0] ata[0] through ata[23] Inputs These pins accept the 24 data inputs from a digital video port of a graphics controller. The swing is defined by VIO. 79 In/Out V Vertical Sync Input / Output When the SYO control bit is low, this pin accepts a vertical sync input for use with the input data. The amplitude will be 0 to VIO. When the SYO control bit is high, the device will output a vertical sync pulse. The output is driven from the VIO supply. 78 In/Out /W orizontal Sync Input / Output When the SYO control bit is low, this pin accepts a horizontal sync input for use with the input data. The amplitude will be 0 to VIO. When the SYO control bit is high, the device will output a horizontal sync pulse. The output is driven from the VIO supply. It is also the W signal of PU interface. 80 In /S ata Input Indicator When the pin is high, the input data is active. When the pin is low, the input data is blanking. S signal input of PU interface The amplitude will be 0 to VIO. 5 In S hip address select 0: 76h 1: 75h 4 In TP TP nable (Internally pull-down) This pin should be left open or pulled low with a 10k resistor in the application. This pin configures the pre-condition for scan chain and boundary scan test when high. Otherwise it should be low. Voltage level is 0 to 3.3V. 6 In Reset Reset * Input When this pin is low, the device is held in the power-on reset condition. When this pin is high, reset is controlled through the serial port. 38 In/Out SP Serial Port ata Input / Output This pin functions as the bi-directional data pin of the serial port. xternal pull-up resister is required. 39 In SP Serial Port lock Input This pin functions as the clock pin of the serial port. xternal pull-up resister is required. 29 Out 0 VS, S-video, YPbPr or nalog R output ull swing is up to 1.3v 27 Out 1 VS, S-video, YPbPr or nalog R output ull swing is up to 1.3v 25 Out 2 VS, S-video, YPbPr or nalog R output ull swing is up to 1.3v 31 In IST urrent Set Resistor Input This pin sets the current. 1.2k Ω, 1% tolerance resistor should 209-1000-004 Rev. 1.1, 12/3/2008 7
Pin # Type Symbol escription be connected between this pin and _ using short and wide traces. 35 In XI rystal Input / xternal Input or some situation of the slave mode, a parallel resonance crystal (± 20 ppm) should be attached between this pin and XO. owever, an external 3.3V MOS compatible clock can drive the XI/IN input. 36 Out XO rystal Output or some situation of the slave mode, a parallel resonance crystal (± 20 ppm) should be attached between this pin and XI / IN. owever, if an external MOS clock is attached to XI/IN, XO should be left open. 50 In LK xternal lock Inputs The input is the clock signal input to the device for use with the, V, and [23:0] data. 2 Out VSO Vertical sync signal output, The amplitude of this pin is from 0 to 1 Out SO orizontal sync signal output, The amplitude of this pin is from 0 to 3 Out SY omposite sync output, The amplitude of this pin is from 0 to 51 Power VIO IO supply voltage (1.2 3.3V) 69 Power V igital supply voltage (1.8V) 8, 12 Power nalog supply voltage(2.5 3.3V) 37, 49 33 Power _PLL PLL supply voltage(1.8v) 24, 28 Power _ power supply(2.5 3.3V) 10 Power VQ_ SRM output buffer supply voltage(2.5v) 18 14, 44 Power V_ SRM device supply voltage(2.5v) 45 68 Power N igital supply ground 7, 11, 34 Power nalog supply ground 48 32 Power _PLL PLL supply ground 26, 30 Power _ supply ground 9, 19 Power NQ_ SRM output buffer supply ground 13, 46, 47 Power N_ SRM device supply ground 8 209-1000-004 Rev. 1.1, 12/3/2008
2.0 Package imensions 1 onrer 1 onrer 1 2 3 4 5 6 7 8 9 9 8 7 6 5 4 3 2 1 K K L L ( Top View ) ( ottom View ) K I igure 4: 80 Pin Package Table of imensions No. of Leads SYMOL 80 (5 X 6 mm) I K Milli- Min 0.22 6.00 5.00 5.00 0.50 4.00 0.50 meters Max 1.20 0.30 0.30 0.60 0.30 Notes: 1. ll dimensions conform to standard MO-216. 209-1000-004 Rev. 1.1, 12/3/2008 9
I 1 L O-PLNRITY.004 igure 5: 80 Pin LQP Package Table of imensions No. of Leads SYMOL 80 (10 X 10 mm) I Milli- MIN 11.90 9.90 0.13 1.35 0.05 0.45 0.09 0 0.40 1.00 meters MX 12.10 10.10 0.23 1.45 0.15 0.75 0.20 7 Notes: 1. onforms to standard S-30 MS-026. 2. imension : Top Package body size may be smaller than bottom package size by as much as 0.15 mm. 3. imension does not include allowable mold protrusions up to 0.25 mm per side. 10 209-1000-004 Rev. 1.1, 12/3/2008
isclaimer This document provides technical information for the user. hrontel reserves the right to make changes at any time without notice to improve and supply the best possible product and is not responsible and does not assume any liability for misapplication or use outside the limits specified in this document. We provide no warranty for the use of our products and assume no liability for errors contained in this document. The customer should make sure that they have the most recent data sheet version. ustomers should take appropriate action to ensure their use of the products does not infringe upon any patents. hrontel, Inc. respects valid patent rights of third parties and does not infringe upon or assist others to infringe upon such rights. hrontel PROUTS R NOT UTORIZ OR N SOUL NOT US WITIN LI SUPPORT SYSTMS OR NULR ILITY PPLITIONS WITOUT T SPII WRITTN ONSNT O hrontel. Life support systems are those intended to support or sustain life and whose failure to perform when used as directed can reasonably expect to result in personal injury or death. ORRIN INORMTION Part Number Package Type opy Protection Operating Temperature Range 7025-80T, Lead-free Macrovision ommercial : -20 to 70 7025-I 80T, Lead-free Macrovision Industrial : -40 to 85 7025-T 80LQP, Lead-free Macrovision ommercial : -20 to 70 7025-TI 80LQP, Lead-free Macrovision Industrial : -40 to 85 7026-80T, Lead-free None ommercial : -20 to 70 7026-I 80T, Lead-free None Industrial : -40 to 85 7026-T 80LQP, Lead-free None ommercial : -20 to 70 7026-TI 80LQP, Lead-free None Industrial : -40 to 85 2008 hrontel ll Rights Reserved. hrontel hrontel International Limited 129 ront Street, 5th floor, amilton, ermuda M12 www.chrontel.com -mail: sales@chrontel.com 209-1000-004 Rev. 1.1, 12/3/2008 11