Report No. FI-NVM-EMT-1209 By: Josef Willer, Gregory Wong December 2009
2009 Forward Insights. All Rights Reserved. Reproduction and distribution of this publication in any form in whole or in part without prior written permission is prohibited. The information contained herein has been obtained from sources believed to be reliable. Forward Insights does not guarantee the accuracy, validity, completeness or adequacy of such information. Forward Insights will not be liable for any damages or injuries arising from the use of such information including, without limitation, errors, omissions or inadequacies in the information contained herein or for the interpretation thereof. The opinions expressed herein are subject to change without notice. Forward Insights December 2009 ii
Contents Emerging Memory Technologies CONTENTS...III LIST OF FIGURES... VII LIST OF TABLES... IX INTRODUCTION... 10 EXECUTIVE SUMMARY... 11 MAINSTREAM MEMORY TECHNOLOGIES... 12 Introduction... 12 The Memory Hierarchy... 12 SRAM... 13 Concept... 13 Scaling Challenges... 14 Scaling Options... 15 DRAM... 16 Concept... 16 Technology Evolution... 17 Scaling Challenges... 19 Scaling Options... 19 NOR Flash... 21 Concept... 21 Technology Evolution... 22 Scaling Challenges... 23 Scaling Options... 24 NAND Flash... 27 Concept... 27 Technology Evolution... 29 Scaling Challenges... 30 Scaling Options... 32 NROM... 34 Concept... 34 Technology Evolution... 36 Scaling Challenges... 36 Scaling Options... 37 Summary... 38 EMERGING MEMORY TECHNOLOGIES... 41 Floating Body Cell... 41 Forward Insights December 2009 iii
Phase Change Memory... 44 MRAM... 49 Spin-Torque MRAM... 53 Racetrack Memory... 55 FRAM... 57 RRAM... 61 Programmable Metallization Cell... 66 Nanocrystal Memory... 69 Carbon Nanotubes... 72 Memristor... 74 Probe Storage... 76 3D Integrated High Density Arrays... 79 3D OTP Memory... 80 3D Reprogrammable Memory Concept... 81 Vertical SONOS NAND... 84 OUTLOOK... 86 Charge Trap Flash (SONOS NAND)... 88 Floating Body Cell Memory... 88 FRAM... 88 MRAM... 88 PMC... 88 Silicon Nanocrystal Memory... 88 ST-MRAM... 89 Phase Change Memory... 89 RRAM... 89 Stackable NAND... 89 Stackable Cross Point Memory (3D Memory)... 89 COMPANIES... 92 4DS... 94 Adesto Technologies... 94 AMD... 94 Avalanche Technology... 94 Axon Technologies Corporation... 94 BAE Systems... 94 Forward Insights December 2009 iv
Contour Semiconductor... 94 Crocus Technology... 95 Cypress Semiconductor... 95 Elpida... 95 Everspin Technologies... 95 Freescale Semiconductor... 95 Fujitsu... 95 Grandis... 96 Hitachi... 96 Honeywell... 96 HP... 96 Hynix... 96 IBM... 96 ITRI... 97 IMEC... 97 Infinite Memories... 97 Innovative Silicon... 97 Intel Corp.... 97 Macronix International... 97 MagSil... 98 Matsushita... 98 Micron Technology... 98 Nanosys... 98 Nantero... 98 NEC... 98 Numonyx... 98 NuPGA... 98 NVE... 99 NXP Semiconductors... 99 Oki... 99 Ovonyx... 99 QS Semiconductor... 99 Ramtron... 99 Rohm... 100 Forward Insights December 2009 v
Samsung Electronics... 100 SanDisk... 100 Schiltron Corp.... 100 Solvay Solexis... 100 Spansion... 101 Spin Transfer Technologies... 101 Spingate Technology... 101 STMicroelectronics... 101 Symetrix... 101 TDK... 101 Texas Instruments... 101 Thin Film Electronics ASA... 101 Toshiba Corp.... 102 Tower Semiconductor... 102 T-RAM Semiconductor... 102 TSMC... 102 UMC... 102 Unity Semiconductor Corp.... 102 ZettaCore... 102 REFERENCES... 103 ABOUT THE AUTHORS... 107 ABOUT FORWARD INSIGHTS... 108 Services... 108 Contact... 108 Forward Insights December 2009 vi
List of Figures Emerging Memory Technologies Figure 1. Memory Hierarchy... 13 Figure 2. SRAM Cell Layout... 14 Figure 3. 3D SRAM Technology... 15 Figure 4. DRAM Cell... 16 Figure 5. DRAM Cell Transistor Evolution... 17 Figure 6. DRAM Capacitor Evolution... 18 Figure 7. DRAM Cell Capacitor Trend... 19 Figure 8. Buried Wordline... 20 Figure 9. NOR Flash Architecture... 21 Figure 10. NOR Flash Program, Erase, Read... 22 Figure 11. NOR Flash Technology Evolution... 23 Figure 12. Drain Bias Margin... 24 Figure 13. 3D NOR Flash Cell... 25 Figure 14. Virtual Ground NOR Flash... 26 Figure 15. NAND Flash Cell Concept... 27 Figure 16. NAND Flash Architecture... 27 Figure 17. NAND Cell String... 28 Figure 18. NAND Flash Program, Erase, Read... 28 Figure 19. NAND Flash Technology Evolution... 29 Figure 20. NAND Flash Memory Gap Fill... 30 Figure 21. Cross-talk and Coupling Ratio... 30 Figure 23. Inter-cell Interference Trend... 31 Figure 25. SONOS NAND... 33 Figure 26. FinFET... 33 Figure 28. NROM Virtual Ground Array... 35 Figure 29. NROM Program, Erase, Read... 35 Figure 30. NROM Technology Evolution... 36 Figure 31. Bit Disturb ( Second Bit Effect )... 37 Figure 32. FinFET, 3D NROM... 37 Figure 33 Bit Size Trend... 38 Figure 34. Device Characteristics... 39 Figure 35. NAND vs. NOR... 40 Figure 36. Floating Body Cell... 41 Figure 37. Zero Capacitor RAM (Z-RAM)... 43 Figure 38. Transistor-addressed PCRAM... 44 Figure 40. Numonyx 128Mb PCM... 45 Figure 41. PCRAM Scaling: Recent Progress... 46 Figure 43. MTJ MRAM Operation... 49 Figure 45. SEM cross section of CMOS chip with back end of line MTJ MRAM... 50 Figure 46. Cross section micrograph of 4Mb MRAM product... 51 Figure 48. Magnetic Racetrack Memory a 3D shift register... 56 Figure 49. FRAM Hysteresis Loop and its Operation... 57 Figure 50. FRAM Issues... 58 Figure 51. FRAM: A Non-volatile RAM... 59 Figure 52. RRAM: Recent Status... 63 Figure 53. Stackable RRAM... 64 Figure 54. Conductive Bridging Mechanism... 66 Figure 55. CBRAM... 67 Figure 58. Silicon Nanocrystal Process... 70 Figure 60. NRAM... 72 Forward Insights December 2009 vii
Figure 61. Memristor... 74 Figure 62. Nanocrossbar circuits at 17nm half-pitch by nano-imprint... 75 Figure 63. Probe storage concept: cantilever /MEMs tips store and read data in parallel in recording medium... 76 Figure 64. Millipede demonstrator with 4096 tips in 6.4 x 6.4 mm2 array using 10nm indentations... 77 Figure 65. Probe Storage Writing... 77 Figure 66. Probe Storage Reading... 78 Figure 67. High Density Arrays... 79 Figure 68. Matrix 3D OTP ROM... 80 Figure 69. Cross Point Memory... 81 Figure 71. 3D Memory Evolution... 83 Figure 72. Vertically Arranged Folded SONOS NAND Strings of BitCost Scalable Technology... 85 Figure 73. Density Trend... 86 Figure 74. Commercialization Prospects... 91 Forward Insights December 2009 viii
List of Tables Table 1. Memory Comparison... 87 Table 2. Memory Matrix... 90 Table 3. Company Matrix... 93 Forward Insights December 2009 ix