L5 Sequential Circuit Design

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Transcription:

L Sequential Circuit Design

Sequential Circuit Design Mealy and Moore Characteristic Equations Design Procedure Example Sequential Problem from specification to implementation Ref: Unit 14 of text 9/2/2012 ECE 361 Lect Copyright 2012 - Joanne DeGroat, ECE, OSU 2

Types of State Machines Mealy Machine Inputs Next State Logic Excitation State Memory (F/F) Current State Output Logic Outputs CLOCK Characterized by Outputs are a function of both inputs and current state. 9/2/2012 ECE 361 Lect Copyright 2012 - Joanne DeGroat, ECE, OSU 3

Types of State Machines Moore Machine Inputs Next State Logic Excitation State Memory (F/F) Current State Output Logic Outputs CLOCK Characterized by Outputs are a function of the current state only. 9/2/2012 ECE 361 Lect Copyright 2012 - Joanne DeGroat, ECE, OSU 4

Notes on Mealy and Moore Both Mealy and Moore machine implementation can be implemented with any sequential element. Why choose one elements over another? Efficiency The next state logic may differ significantly when using different F/F types. Efficiency of implementation is also drastically affected by choice of state assignment. 9/2/2012 ECE 361 Lect Copyright 2012 - Joanne DeGroat, ECE, OSU

The characteristic equation The Characteristic Equation formally specifies the flip-flop s next state as a function of its current state and inputs Q* means the next state value for the Q output of the F/F 9/2/2012 ECE 361 Lect Copyright 2012 - Joanne DeGroat, ECE, OSU 6

Characteristic equations for F/Fs Ref: Lect 1 S-R Latch D Latch D F/F D F/F with Enable J-K F/F T F/F Q* = S + R Q Q* = D Q* = D Q* = EN D + EN Q Q* = J Q + K Q Q* = Q when T = 1 9/2/2012 ECE 361 Lect Copyright 2012 - Joanne DeGroat, ECE, OSU 7

Summary of the Design Procedure 1. Given the problem statement, determine the relationship between input and output. Understand the specification and or problem statement. Resolve any questions. Then generate a state graph and/or state table. 2. Reduce the state table to the minimum number of states. 3. From the number of states determine the number of flipflops (m states n flip-flops where m <= 2 n ) 4. Generate a transition table (current state next state). Use K-maps to derive flip-flop input equations. 6. Derive output functions and implement. 9/2/2012 ECE 361 Lect Copyright 2012 - Joanne DeGroat, ECE, OSU 8

Example problem statement Sequential Code Converter (16.3 example) Word description: Design a sequential circuit to convert BCD to excess 3 code. The inputs arrive sequentially, lsb first, i.e. serial input stream. After 4 inputs the circuit resets to the initial state ready for another group of 4 inputs. The excess 3 code is output serially at the same time. First question is it possible to generate the output serially without delay? 9/2/2012 ECE 361 Lect Copyright 2012 - Joanne DeGroat, ECE, OSU 9

Input output table Input BCD Output excess 3 9/2/2012 ECE 361 Lect Copyright 2012 - Joanne DeGroat, ECE, OSU 10

Construct a state Graph Walk through the sequences 9/2/2012 ECE 361 Lect Copyright 2012 - Joanne DeGroat, ECE, OSU 11

Build a state table From the State Graph can build the state table Note the relationship between the two 9/2/2012 ECE 361 Lect Copyright 2012 - Joanne DeGroat, ECE, OSU 12

Then reduce the state table And just how is that done (the coming attraction) How many flip-flops are needed? 9/2/2012 ECE 361 Lect Copyright 2012 - Joanne DeGroat, ECE, OSU 13

What next? Choose state assignment Pick flip-flop of implementation here D F/Fs 9/2/2012 ECE 361 Lect Copyright 2012 - Joanne DeGroat, ECE, OSU 14

Next state logic Logic to generate the next state is generated Use K-maps 9/2/2012 ECE 361 Lect Copyright 2012 - Joanne DeGroat, ECE, OSU 1

From there: implement the design D flip-flop implementation 9/2/2012 ECE 361 Lect Copyright 2012 - Joanne DeGroat, ECE, OSU 16

Implementation with other F/Fs? Use the characteristic equation for generation of the transition table. Say T flip-flops example for T1 000 100 (x=0) 101 (x=1) T1 = Q1' Q2' + Q1 Q2 9/2/2012 ECE 361 Lect Copyright 2012 - Joanne DeGroat, ECE, OSU 17

Assignment Work through the problem in this lecturee on your own and be comfortable with them. Work through of Programmed Exercise 14.1 and 14.2. 9/2/2012 ECE 361 Lect Copyright 2012 - Joanne DeGroat, ECE, OSU 18