Fields and Waves I Preparation Assignment for Project 2 Due at the start of class.

Similar documents
Modeling Microwave Waveguide Components: The Tuned Stub

Bell. Program of Study. Accelerated Digital Electronics. Dave Bell TJHSST

RF (Wireless) Fundamentals 1- Day Seminar

This Errata Sheet contains corrections or changes made after the publication of this manual.

Keysight Technologies De-Embedding and Embedding S-Parameter Networks Using a Vector Network Analyzer. Application Note

What really changes with Category 6

A Simple, Yet Powerful Method to Characterize Differential Interconnects

384A Adapter Installation Instructions

Instruction Manual. Series 3000 Model R-165A. Audio/Video IF/RF Relay Panel. CATV Switching and Control

DMX 512 Language Date: Venerdì, febbraio 12:15:08 CET Topic: Educational Lighting Site

Digital Logic. ECE 206, Fall 2001: Lab 1. Learning Objectives. The Logic Simulator

Test Systems. Typical JFW Systems. Matrix switches Programmable assemblies Switch assemblies Manual attenuator assemblies Power divider assemblies

Generation of Novel Waveforms Using PSPL Pulse Generators

Final Examination (Open Katz, Calculators OK, 3 hours)

Why Engineers Ignore Cable Loss

ENGINEERING COMMITTEE Interface Practices Subcommittee AMERICAN NATIONAL STANDARD ANSI/SCTE

Step What to do Expected result What to do if test fails Component tested 1 Visual inspection. Board is accurately assembled

Final Report. Iowa State University Department of Electrical and Computer Engineering Senior Design December 2010 Team 04

ECE 2274 Pre-Lab for Experiment Timer Chip

Application Note AN39

AD9884A Evaluation Kit Documentation

GT Dual-Row Nano Vertical Thru-Hole High Speed Characterization Report For Differential Data Applications

Dual Link DVI Receiver Implementation

LabView Exercises: Part II

Design and implementation (in VHDL) of a VGA Display and Light Sensor to run on the Nexys4DDR board Report and Signoff due Week 6 (October 4)

Chapter 6 Tuners. How is a tuner build: In it's most simple form we have an inductor and a capacitor. One in shunt and one in series.

Contents Circuits... 1

Integration of Virtual Instrumentation into a Compressed Electricity and Electronic Curriculum

Basic Verification of Power Loadpull Systems

Course Outline Cover Page

HDMI Demystified April 2011

SPECIAL SPECIFICATION :1 Video (De) Mux with Data Channel

Unit 12 Design Solutions Solutions to Unit 12 Design and Simulation Problems

LAB #6 State Machine, Decoder, Buffer/Driver and Seven Segment Display

Limitations of a Load Pull System

NEW MEXICO STATE UNIVERSITY Electrical and Computer Engineering Department. EE162 Digital Circuit Design Fall Lab 5: Latches & Flip-Flops

Rensselaer Polytechnic Institute Computer Hardware Design ECSE Report. Lab Three Xilinx Richards Controller and Logic Analyzer Laboratory

ELEC 4609 IC DESIGN TERM PROJECT: DYNAMIC PRSG v1.2

Programmable Logic Design I

Drop Passives: Splitters, Couplers and Power Inserters

Lab 23 Controller Diagnostics

CS Series Motorized Coaxial Transfer Switches

AMERICAN NATIONAL STANDARD

#P46. Time Domain Reflectometry. Q: What is TDR and how does it work?

CM-1UTP CAMERA MASTER UTP ADAPTOR

Experiment 7 Fall 2012


EEC 116 Fall 2011 Lab #5: Pipelined 32b Adder

Cascadable 4-Bit Comparator

University of Pennsylvania Department of Electrical and Systems Engineering. Digital Design Laboratory. Lab8 Calculator

Lab experience 1: Introduction to LabView

FiberLink 7142 Series

Optimizing BNC PCB Footprint Designs for Digital Video Equipment

Directional Couplers and Splitters

Bravo AV s Structured or Whole-House Wiring Approach

Previous Lecture Sequential Circuits. Slide Summary of contents covered in this lecture. (Refer Slide Time: 01:55)

The PK Antenna Analyzer

GT Dual-Row Nano Vertical SMT High Speed Characterization Report For Differential Data Applications

University of Illinois at Urbana-Champaign

ENGINEERING COMMITTEE

Lab 1 Introduction to the Software Development Environment and Signal Sampling

Experiment # 12. Traffic Light Controller

A Combined Combinational-Sequential System

30 GHz Attenuator Performance and De-Embedment

University of Victoria. Department of Electrical and Computer Engineering. CENG 290 Digital Design I Lab Manual

How to overcome/avoid High Frequency Effects on Debug Interfaces Trace Port Design Guidelines

Design and Simulation of a Digital CMOS Synchronous 4-bit Up-Counter with Set and Reset

EBU INTERFACES FOR 625 LINE DIGITAL VIDEO SIGNALS AT THE 4:2:2 LEVEL OF CCIR RECOMMENDATION 601 CONTENTS

Transmission Distance and Jitter Guide

OTD-3000-S FREQUENCY AGILE TELEVISION DEMODULATOR (WITH SUB-BAND INPUT CAPABILITY) INSTRUCTION MANUAL

Instructions and answers for teachers

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING QUESTION BANK

CS8803: Advanced Digital Design for Embedded Hardware

ELEC 310 Digital Signal Processing

Investigation of Radio Frequency Breakdown in Fusion Experiments

XFEL High Power RF System Recent Developments

CABLE LOSS MASKING EFFECT

MBUS 10 RS232 TO MBUS LEVEL CONVERTER

2009 MFJ ENTERPRISES, INC.

SPINNER BROADCAST EXPLANATION OF THE MULTI CHANNEL COMBINER SPECIFICATIONS

North Shore Community College

USB Smart Power Sensor

AS/NZS 1367:2016. Australian/New Zealand Standard

PHONO LOCO Q AND A

APM CALIBRATION PROCEDURE Rev. A June 3, 2015

ENGINEERING COMMITTEE Interface Practices Subcommittee

In total 2 project plans are submitted. Deadline for Plan 1 is on at 23:59. The plan must contain the following information:

6 3 0 N M, S I N G L E M O D E F U S E D F I B E R O P T I C C OUPLERS / TA P S

Category 6A UTP cables shall be tested and proved to conform to TIA-568-C.2 standards.

Instrumental technique. BNC connector

2006 MFJ ENTERPRISES, INC.

CHAPTER 3 SEPARATION OF CONDUCTED EMI

MULTISIM DEMO 9.5: 60 HZ ACTIVE NOTCH FILTER

Transmission of High-Speed Serial Signals Over Common Cable Media

LOOK AT THE NETWORK OF METAL STRIPS ON THE BACKSIDE OF THE PROTOTYPING BOARD

Transmission of High-Speed Serial Signals Over Common Cable Media

Switching Circuits & Logic Design, Fall Final Examination (1/13/2012, 3:30pm~5:20pm)

Experiment # 4 Counters and Logic Analyzer

COE328 Course Outline. Fall 2007

STANDARD IN HIGH SPEED TESTING

Transcription:

Preparation Assignment for Project 2 Due at the start of class. Reading Assignment See the handouts for each lesson for the reading assignment. 12 November Lessons 4.5 and 4.6 a. Write out the general expression for the characteristic impedance of a general lossy line. Under what conditions does this expression reduce to that of a lossless line? b. What is the VSWR when a transmission line is properly matched? 15 and 17 November Open Shop for Project 2 K. A. Connor 1

Project 1 (Due: 19 November) Cable TV Station Blocker For this project, students can work in groups of two to four. No reports will be accepted from single students. Grading Introduction (4 pts) Initial Design (8 pts) Analysis (8 pts) Basic Performance (4 pts) Implementation (7 pts) Final Design (8 pts) Performance (7 pts) Personal Responsibility (2 pts) Creativity (0-5 pts extra credit) Appendix (2 pts) Total (50 pts) Please note: the critical tasks for this project are underlined and in red (on the web page.) Also, please be sure that you include this entire write up in your report. Group Members: 1. 2. 3. 4. K. A. Connor 2

Cable System R2 T2 Cable TV Blocker Tee (Not a Coupler) T1 TV Set Input R1 V1 75 75 0 T3 0 Open Circuit Line Introduction (4 pts): Introduce and describe the goals of the project. The purpose of this project is to build a simple device that blocks the signal from a particular cable TV channel while leaving the other channels with sufficient signal to be viewable. No active or lumped circuit elements will be used for this purpose. Rather, this will be accomplished by adding a stub-type tuner to the cable that brings the signal to the TV. List at least three educational goals for this project. That is, list at least three topics you might encounter in practical electromagnetics that play a significant role in this project. Be specific, indicating where in the textbook or other course reference materials these topics are discussed. Initial Design (8 pts): Describe your initial project design, how it works, how you came up with this particular design, and discuss potential problems. This last item is very important. The basic principle of this signal blocker is relatively simple. The CATV cable (T2 in the figure above) is interrupted with a Tee coupler to which is connected a short piece of cable (T3 above) with nothing connected to it (open circuited line). The input impedance of this extra piece of cable adds in parallel to the input impedance of the cable that runs from the Tee to the TV set (T1 above). Assuming that the cable is properly matched to the TV, the input impedance of this cable will be equal to the characteristic impedance of the cable. In this case, the impedance of the cable and the TV is 75 ohms. Since the input impedance Z in is a function of the electrical length of the cable (through the terms like tanβd where d is the length), the Z in of the open-circuited cable will change with frequency. If the length of this cable is properly selected, the signal from one CATV channel will be reflected from the Tee while the signals from other channels will not be reflected. A crude explanation of how this can work can be made by looking just at two frequencies where Z in is either very small or very large. K. A. Connor 3

ECSE-2100 Describe the basic design. Draw a picture if your artistic skills are up to it. When you have a description of your design, show it or email it to a TA or to Prof. Connor. It is very important that you understand the basic principles before you proceed with the rest of the project. Also, be sure that you identify at least two potential problems. Remember that you will probably be basing your design on an ideal lossless model of transmission lines. Anything that deviates from such an ideal can cause a problem. Analysis (8 pts): Discuss why your initial design should work and support your discussion with calculations, graphs, simulations, reference materials and/or common sense reasoning. Write out the equations that describe how this channel blocker works. Select a length for the open-circuited cable. Determine the voltage and power transfer function for the complete system. Use Maple or Matlab to solve the equations for the entire range of frequencies of the CATV channels received in the Albany-Schenectady-Troy area. Information on the Standard Cable-TV Frequencies can be found at http://www.info2000.net/~aloomis/catv.html Basic Performance (4 pts): To test out your designs, you must identify one channel that will be blocked by your first choice of cable length. CATV Channel Length _ Witnessed Implementation (7 pts) -- Discuss what problems were encountered during the implementation of your project and how you solved them. Include advice you would offer to someone who wished to avoid these problems in the future. Describe your problems and be as helpful to others as possible. Final Design (8 pts) Select a particular channel to be blocked and one that is not to be blocked. This channel must be different than the one you used above. Show that the new design works with experimental data from your hardware and simulations or paper-andpencil analysis. Include schematics. To demonstrate your design you must either build a CATV channel blocker (which will be tested by a member of the course staff) or use your model on an equivalent experiment that can be done in the studio. Since the function generator is limited to 15MHz, use a range of frequencies that is equivalent to the CATV frequencies you analyzed. That is, the maximum and minimum frequencies should be in the same ratio as the CATV frequencies. The latter choice is simpler to do since you do not need to build anything. To build the former, you will have to provide your own Tee, which can be made from a coupler by removing the lumped circuit elements and by wiring together the three connectors. CATV Channel Length _ Witnessed (This is for the design, not the test of the hardware.) K. A. Connor 4

ECSE-2100 Performance (7 pts) Build and test your design or do an equivalent experiment in the studio. CATV Channel Length _ Witnessed This is for the test of a CATV channel blocker. For the equivalent test in the studio, describe the method you used to take the data and discuss the features of the data you have obtained. For example, explain the voltage levels observed. Be sure that you explain why the measurements you have made demonstrate that your model is sufficient to build an actual channel blocker. Have your experimental data signed by a TA or instructor. Personal Responsibilities (2 pts) -- A short paragraph should be written describing what each group member did to develop and implement the final design. Creativity (0-5 pts) Any exceptionally creative approaches to implementation, analysis and/or design will be rewarded with up to 5 additional points. Please note that this category is reserved for exceptionally creative work. Appendix (2 pts): Include any background materials you used in the preparation of your design. K. A. Connor 5